sdhci-bcm-kona.c 9.3 KB

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  1. /*
  2. * Copyright (C) 2013 Broadcom Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation version 2.
  7. *
  8. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  9. * kind, whether express or implied; without even the implied warranty
  10. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/delay.h>
  16. #include <linux/highmem.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/io.h>
  20. #include <linux/gpio.h>
  21. #include <linux/clk.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/of_gpio.h>
  26. #include <linux/mmc/slot-gpio.h>
  27. #include "sdhci-pltfm.h"
  28. #include "sdhci.h"
  29. #define SDHCI_SOFT_RESET 0x01000000
  30. #define KONA_SDHOST_CORECTRL 0x8000
  31. #define KONA_SDHOST_CD_PINCTRL 0x00000008
  32. #define KONA_SDHOST_STOP_HCLK 0x00000004
  33. #define KONA_SDHOST_RESET 0x00000002
  34. #define KONA_SDHOST_EN 0x00000001
  35. #define KONA_SDHOST_CORESTAT 0x8004
  36. #define KONA_SDHOST_WP 0x00000002
  37. #define KONA_SDHOST_CD_SW 0x00000001
  38. #define KONA_SDHOST_COREIMR 0x8008
  39. #define KONA_SDHOST_IP 0x00000001
  40. #define KONA_SDHOST_COREISR 0x800C
  41. #define KONA_SDHOST_COREIMSR 0x8010
  42. #define KONA_SDHOST_COREDBG1 0x8014
  43. #define KONA_SDHOST_COREGPO_MASK 0x8018
  44. #define SD_DETECT_GPIO_DEBOUNCE_128MS 128
  45. #define KONA_MMC_AUTOSUSPEND_DELAY (50)
  46. struct sdhci_bcm_kona_dev {
  47. struct mutex write_lock; /* protect back to back writes */
  48. };
  49. static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
  50. {
  51. unsigned int val;
  52. unsigned long timeout;
  53. /* This timeout should be sufficent for core to reset */
  54. timeout = jiffies + msecs_to_jiffies(100);
  55. /* reset the host using the top level reset */
  56. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  57. val |= KONA_SDHOST_RESET;
  58. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  59. while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
  60. if (time_is_before_jiffies(timeout)) {
  61. pr_err("Error: sd host is stuck in reset!!!\n");
  62. return -EFAULT;
  63. }
  64. }
  65. /* bring the host out of reset */
  66. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  67. val &= ~KONA_SDHOST_RESET;
  68. /*
  69. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  70. * Back-to-Back writes to same register needs delay when SD bus clock
  71. * is very low w.r.t AHB clock, mainly during boot-time and during card
  72. * insert-removal.
  73. */
  74. usleep_range(1000, 5000);
  75. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  76. return 0;
  77. }
  78. static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
  79. {
  80. unsigned int val;
  81. /* enable the interrupt from the IP core */
  82. val = sdhci_readl(host, KONA_SDHOST_COREIMR);
  83. val |= KONA_SDHOST_IP;
  84. sdhci_writel(host, val, KONA_SDHOST_COREIMR);
  85. /* Enable the AHB clock gating module to the host */
  86. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  87. val |= KONA_SDHOST_EN;
  88. /*
  89. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  90. * Back-to-Back writes to same register needs delay when SD bus clock
  91. * is very low w.r.t AHB clock, mainly during boot-time and during card
  92. * insert-removal.
  93. */
  94. usleep_range(1000, 5000);
  95. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  96. }
  97. /*
  98. * Software emulation of the SD card insertion/removal. Set insert=1 for insert
  99. * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
  100. * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
  101. * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
  102. */
  103. static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
  104. {
  105. struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
  106. struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
  107. u32 val;
  108. /*
  109. * Back-to-Back register write needs a delay of min 10uS.
  110. * Back-to-Back writes to same register needs delay when SD bus clock
  111. * is very low w.r.t AHB clock, mainly during boot-time and during card
  112. * insert-removal.
  113. * We keep 20uS
  114. */
  115. mutex_lock(&kona_dev->write_lock);
  116. udelay(20);
  117. val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
  118. if (insert) {
  119. int ret;
  120. ret = mmc_gpio_get_ro(host->mmc);
  121. if (ret >= 0)
  122. val = (val & ~KONA_SDHOST_WP) |
  123. ((ret) ? KONA_SDHOST_WP : 0);
  124. val |= KONA_SDHOST_CD_SW;
  125. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  126. } else {
  127. val &= ~KONA_SDHOST_CD_SW;
  128. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  129. }
  130. mutex_unlock(&kona_dev->write_lock);
  131. return 0;
  132. }
  133. /*
  134. * SD card interrupt event callback
  135. */
  136. static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
  137. {
  138. if (mmc_gpio_get_cd(host->mmc) > 0) {
  139. dev_dbg(mmc_dev(host->mmc),
  140. "card inserted\n");
  141. sdhci_bcm_kona_sd_card_emulate(host, 1);
  142. } else {
  143. dev_dbg(mmc_dev(host->mmc),
  144. "card removed\n");
  145. sdhci_bcm_kona_sd_card_emulate(host, 0);
  146. }
  147. }
  148. /*
  149. * Get the base clock. Use central clock source for now. Not sure if different
  150. * clock speed to each dev is allowed
  151. */
  152. static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
  153. {
  154. struct sdhci_bcm_kona_dev *kona_dev;
  155. struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
  156. kona_dev = sdhci_pltfm_priv(pltfm_priv);
  157. return host->mmc->f_max;
  158. }
  159. static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
  160. {
  161. return sdhci_bcm_kona_get_max_clk(host);
  162. }
  163. static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
  164. u8 power_mode)
  165. {
  166. /*
  167. * JEDEC and SD spec specify supplying 74 continuous clocks to
  168. * device after power up. With minimum bus (100KHz) that
  169. * that translates to 740us
  170. */
  171. if (power_mode != MMC_POWER_OFF)
  172. udelay(740);
  173. }
  174. static struct sdhci_ops sdhci_bcm_kona_ops = {
  175. .get_max_clock = sdhci_bcm_kona_get_max_clk,
  176. .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
  177. .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
  178. .card_event = sdhci_bcm_kona_card_event,
  179. };
  180. static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
  181. .ops = &sdhci_bcm_kona_ops,
  182. .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
  183. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
  184. SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
  185. SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
  186. SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
  187. };
  188. static struct __initconst of_device_id sdhci_bcm_kona_of_match[] = {
  189. { .compatible = "brcm,kona-sdhci"},
  190. { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
  191. {}
  192. };
  193. MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
  194. static int sdhci_bcm_kona_probe(struct platform_device *pdev)
  195. {
  196. struct sdhci_bcm_kona_dev *kona_dev = NULL;
  197. struct sdhci_pltfm_host *pltfm_priv;
  198. struct device *dev = &pdev->dev;
  199. struct sdhci_host *host;
  200. int ret;
  201. ret = 0;
  202. host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
  203. sizeof(*kona_dev));
  204. if (IS_ERR(host))
  205. return PTR_ERR(host);
  206. dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
  207. pltfm_priv = sdhci_priv(host);
  208. kona_dev = sdhci_pltfm_priv(pltfm_priv);
  209. mutex_init(&kona_dev->write_lock);
  210. mmc_of_parse(host->mmc);
  211. if (!host->mmc->f_max) {
  212. dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
  213. ret = -ENXIO;
  214. goto err_pltfm_free;
  215. }
  216. dev_dbg(dev, "non-removable=%c\n",
  217. (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
  218. dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
  219. (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
  220. (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
  221. if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
  222. host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  223. dev_dbg(dev, "is_8bit=%c\n",
  224. (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
  225. ret = sdhci_bcm_kona_sd_reset(host);
  226. if (ret)
  227. goto err_pltfm_free;
  228. sdhci_bcm_kona_sd_init(host);
  229. ret = sdhci_add_host(host);
  230. if (ret) {
  231. dev_err(dev, "Failed sdhci_add_host\n");
  232. goto err_reset;
  233. }
  234. /* if device is eMMC, emulate card insert right here */
  235. if (host->mmc->caps & MMC_CAP_NONREMOVABLE) {
  236. ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
  237. if (ret) {
  238. dev_err(dev,
  239. "unable to emulate card insertion\n");
  240. goto err_remove_host;
  241. }
  242. }
  243. /*
  244. * Since the card detection GPIO interrupt is configured to be
  245. * edge sensitive, check the initial GPIO value here, emulate
  246. * only if the card is present
  247. */
  248. if (mmc_gpio_get_cd(host->mmc) > 0)
  249. sdhci_bcm_kona_sd_card_emulate(host, 1);
  250. dev_dbg(dev, "initialized properly\n");
  251. return 0;
  252. err_remove_host:
  253. sdhci_remove_host(host, 0);
  254. err_reset:
  255. sdhci_bcm_kona_sd_reset(host);
  256. err_pltfm_free:
  257. sdhci_pltfm_free(pdev);
  258. dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
  259. return ret;
  260. }
  261. static int __exit sdhci_bcm_kona_remove(struct platform_device *pdev)
  262. {
  263. struct sdhci_host *host = platform_get_drvdata(pdev);
  264. int dead;
  265. u32 scratch;
  266. dead = 0;
  267. scratch = readl(host->ioaddr + SDHCI_INT_STATUS);
  268. if (scratch == (u32)-1)
  269. dead = 1;
  270. sdhci_remove_host(host, dead);
  271. sdhci_free_host(host);
  272. return 0;
  273. }
  274. static struct platform_driver sdhci_bcm_kona_driver = {
  275. .driver = {
  276. .name = "sdhci-kona",
  277. .owner = THIS_MODULE,
  278. .pm = SDHCI_PLTFM_PMOPS,
  279. .of_match_table = sdhci_bcm_kona_of_match,
  280. },
  281. .probe = sdhci_bcm_kona_probe,
  282. .remove = sdhci_bcm_kona_remove,
  283. };
  284. module_platform_driver(sdhci_bcm_kona_driver);
  285. MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
  286. MODULE_AUTHOR("Broadcom");
  287. MODULE_LICENSE("GPL v2");