mx1_camera.c 21 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/sched.h>
  30. #include <linux/slab.h>
  31. #include <linux/time.h>
  32. #include <linux/videodev2.h>
  33. #include <media/soc_camera.h>
  34. #include <media/v4l2-common.h>
  35. #include <media/v4l2-dev.h>
  36. #include <media/videobuf-dma-contig.h>
  37. #include <media/soc_mediabus.h>
  38. #include <asm/dma.h>
  39. #include <asm/fiq.h>
  40. #include <mach/dma-mx1-mx2.h>
  41. #include <mach/hardware.h>
  42. #include <mach/irqs.h>
  43. #include <linux/platform_data/camera-mx1.h>
  44. /*
  45. * CSI registers
  46. */
  47. #define CSICR1 0x00 /* CSI Control Register 1 */
  48. #define CSISR 0x08 /* CSI Status Register */
  49. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  50. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  51. #define CSICR1_SOF_POL (1 << 17)
  52. #define CSICR1_SOF_INTEN (1 << 16)
  53. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  54. #define CSICR1_MCLKEN (1 << 9)
  55. #define CSICR1_FCC (1 << 8)
  56. #define CSICR1_BIG_ENDIAN (1 << 7)
  57. #define CSICR1_CLR_RXFIFO (1 << 5)
  58. #define CSICR1_GCLK_MODE (1 << 4)
  59. #define CSICR1_DATA_POL (1 << 2)
  60. #define CSICR1_REDGE (1 << 1)
  61. #define CSICR1_EN (1 << 0)
  62. #define CSISR_SFF_OR_INT (1 << 25)
  63. #define CSISR_RFF_OR_INT (1 << 24)
  64. #define CSISR_STATFF_INT (1 << 21)
  65. #define CSISR_RXFF_INT (1 << 18)
  66. #define CSISR_SOF_INT (1 << 16)
  67. #define CSISR_DRDY (1 << 0)
  68. #define DRIVER_VERSION "0.0.2"
  69. #define DRIVER_NAME "mx1-camera"
  70. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  71. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  72. #define CSI_BUS_FLAGS (V4L2_MBUS_MASTER | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  73. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  74. V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | \
  75. V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_LOW)
  76. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  77. /*
  78. * Structures
  79. */
  80. /* buffer for one video frame */
  81. struct mx1_buffer {
  82. /* common v4l buffer stuff -- must be first */
  83. struct videobuf_buffer vb;
  84. enum v4l2_mbus_pixelcode code;
  85. int inwork;
  86. };
  87. /*
  88. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  89. * Interface. If anyone ever builds hardware to enable more than
  90. * one camera, they will have to modify this driver too
  91. */
  92. struct mx1_camera_dev {
  93. struct soc_camera_host soc_host;
  94. struct mx1_camera_pdata *pdata;
  95. struct mx1_buffer *active;
  96. struct resource *res;
  97. struct clk *clk;
  98. struct list_head capture;
  99. void __iomem *base;
  100. int dma_chan;
  101. unsigned int irq;
  102. unsigned long mclk;
  103. spinlock_t lock;
  104. };
  105. /*
  106. * Videobuf operations
  107. */
  108. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  109. unsigned int *size)
  110. {
  111. struct soc_camera_device *icd = vq->priv_data;
  112. *size = icd->sizeimage;
  113. if (!*count)
  114. *count = 32;
  115. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  116. *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
  117. dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size);
  118. return 0;
  119. }
  120. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  121. {
  122. struct soc_camera_device *icd = vq->priv_data;
  123. struct videobuf_buffer *vb = &buf->vb;
  124. BUG_ON(in_interrupt());
  125. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  126. vb, vb->baddr, vb->bsize);
  127. /*
  128. * This waits until this buffer is out of danger, i.e., until it is no
  129. * longer in STATE_QUEUED or STATE_ACTIVE
  130. */
  131. videobuf_waiton(vq, vb, 0, 0);
  132. videobuf_dma_contig_free(vq, vb);
  133. vb->state = VIDEOBUF_NEEDS_INIT;
  134. }
  135. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  136. struct videobuf_buffer *vb, enum v4l2_field field)
  137. {
  138. struct soc_camera_device *icd = vq->priv_data;
  139. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  140. int ret;
  141. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  142. vb, vb->baddr, vb->bsize);
  143. /* Added list head initialization on alloc */
  144. WARN_ON(!list_empty(&vb->queue));
  145. BUG_ON(NULL == icd->current_fmt);
  146. /*
  147. * I think, in buf_prepare you only have to protect global data,
  148. * the actual buffer is yours
  149. */
  150. buf->inwork = 1;
  151. if (buf->code != icd->current_fmt->code ||
  152. vb->width != icd->user_width ||
  153. vb->height != icd->user_height ||
  154. vb->field != field) {
  155. buf->code = icd->current_fmt->code;
  156. vb->width = icd->user_width;
  157. vb->height = icd->user_height;
  158. vb->field = field;
  159. vb->state = VIDEOBUF_NEEDS_INIT;
  160. }
  161. vb->size = icd->sizeimage;
  162. if (0 != vb->baddr && vb->bsize < vb->size) {
  163. ret = -EINVAL;
  164. goto out;
  165. }
  166. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  167. ret = videobuf_iolock(vq, vb, NULL);
  168. if (ret)
  169. goto fail;
  170. vb->state = VIDEOBUF_PREPARED;
  171. }
  172. buf->inwork = 0;
  173. return 0;
  174. fail:
  175. free_buffer(vq, buf);
  176. out:
  177. buf->inwork = 0;
  178. return ret;
  179. }
  180. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  181. {
  182. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  183. struct device *dev = pcdev->soc_host.icd->parent;
  184. int ret;
  185. if (unlikely(!pcdev->active)) {
  186. dev_err(dev, "DMA End IRQ with no active buffer\n");
  187. return -EFAULT;
  188. }
  189. /* setup sg list for future DMA */
  190. ret = imx_dma_setup_single(pcdev->dma_chan,
  191. videobuf_to_dma_contig(vbuf),
  192. vbuf->size, pcdev->res->start +
  193. CSIRXR, DMA_MODE_READ);
  194. if (unlikely(ret))
  195. dev_err(dev, "Failed to setup DMA sg list\n");
  196. return ret;
  197. }
  198. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  199. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  200. struct videobuf_buffer *vb)
  201. {
  202. struct soc_camera_device *icd = vq->priv_data;
  203. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  204. struct mx1_camera_dev *pcdev = ici->priv;
  205. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  206. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  207. vb, vb->baddr, vb->bsize);
  208. list_add_tail(&vb->queue, &pcdev->capture);
  209. vb->state = VIDEOBUF_ACTIVE;
  210. if (!pcdev->active) {
  211. pcdev->active = buf;
  212. /* setup sg list for future DMA */
  213. if (!mx1_camera_setup_dma(pcdev)) {
  214. unsigned int temp;
  215. /* enable SOF irq */
  216. temp = __raw_readl(pcdev->base + CSICR1) |
  217. CSICR1_SOF_INTEN;
  218. __raw_writel(temp, pcdev->base + CSICR1);
  219. }
  220. }
  221. }
  222. static void mx1_videobuf_release(struct videobuf_queue *vq,
  223. struct videobuf_buffer *vb)
  224. {
  225. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  226. #ifdef DEBUG
  227. struct soc_camera_device *icd = vq->priv_data;
  228. struct device *dev = icd->parent;
  229. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  230. vb, vb->baddr, vb->bsize);
  231. switch (vb->state) {
  232. case VIDEOBUF_ACTIVE:
  233. dev_dbg(dev, "%s (active)\n", __func__);
  234. break;
  235. case VIDEOBUF_QUEUED:
  236. dev_dbg(dev, "%s (queued)\n", __func__);
  237. break;
  238. case VIDEOBUF_PREPARED:
  239. dev_dbg(dev, "%s (prepared)\n", __func__);
  240. break;
  241. default:
  242. dev_dbg(dev, "%s (unknown)\n", __func__);
  243. break;
  244. }
  245. #endif
  246. free_buffer(vq, buf);
  247. }
  248. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  249. struct videobuf_buffer *vb,
  250. struct mx1_buffer *buf)
  251. {
  252. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  253. list_del_init(&vb->queue);
  254. vb->state = VIDEOBUF_DONE;
  255. v4l2_get_timestamp(&vb->ts);
  256. vb->field_count++;
  257. wake_up(&vb->done);
  258. if (list_empty(&pcdev->capture)) {
  259. pcdev->active = NULL;
  260. return;
  261. }
  262. pcdev->active = list_entry(pcdev->capture.next,
  263. struct mx1_buffer, vb.queue);
  264. /* setup sg list for future DMA */
  265. if (likely(!mx1_camera_setup_dma(pcdev))) {
  266. unsigned int temp;
  267. /* enable SOF irq */
  268. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  269. __raw_writel(temp, pcdev->base + CSICR1);
  270. }
  271. }
  272. static void mx1_camera_dma_irq(int channel, void *data)
  273. {
  274. struct mx1_camera_dev *pcdev = data;
  275. struct device *dev = pcdev->soc_host.icd->parent;
  276. struct mx1_buffer *buf;
  277. struct videobuf_buffer *vb;
  278. unsigned long flags;
  279. spin_lock_irqsave(&pcdev->lock, flags);
  280. imx_dma_disable(channel);
  281. if (unlikely(!pcdev->active)) {
  282. dev_err(dev, "DMA End IRQ with no active buffer\n");
  283. goto out;
  284. }
  285. vb = &pcdev->active->vb;
  286. buf = container_of(vb, struct mx1_buffer, vb);
  287. WARN_ON(buf->inwork || list_empty(&vb->queue));
  288. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  289. vb, vb->baddr, vb->bsize);
  290. mx1_camera_wakeup(pcdev, vb, buf);
  291. out:
  292. spin_unlock_irqrestore(&pcdev->lock, flags);
  293. }
  294. static struct videobuf_queue_ops mx1_videobuf_ops = {
  295. .buf_setup = mx1_videobuf_setup,
  296. .buf_prepare = mx1_videobuf_prepare,
  297. .buf_queue = mx1_videobuf_queue,
  298. .buf_release = mx1_videobuf_release,
  299. };
  300. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  301. struct soc_camera_device *icd)
  302. {
  303. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  304. struct mx1_camera_dev *pcdev = ici->priv;
  305. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->parent,
  306. &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  307. V4L2_FIELD_NONE,
  308. sizeof(struct mx1_buffer), icd, &ici->host_lock);
  309. }
  310. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  311. {
  312. unsigned int mclk = pcdev->mclk;
  313. unsigned long div;
  314. unsigned long lcdclk;
  315. lcdclk = clk_get_rate(pcdev->clk);
  316. /*
  317. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  318. * they get a nice Oops
  319. */
  320. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  321. dev_dbg(pcdev->soc_host.icd->parent,
  322. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  323. lcdclk / 1000, mclk / 1000, div);
  324. return div;
  325. }
  326. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  327. {
  328. unsigned int csicr1 = CSICR1_EN;
  329. dev_dbg(pcdev->soc_host.v4l2_dev.dev, "Activate device\n");
  330. clk_prepare_enable(pcdev->clk);
  331. /* enable CSI before doing anything else */
  332. __raw_writel(csicr1, pcdev->base + CSICR1);
  333. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  334. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  335. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  336. __raw_writel(csicr1, pcdev->base + CSICR1);
  337. }
  338. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  339. {
  340. dev_dbg(pcdev->soc_host.v4l2_dev.dev, "Deactivate device\n");
  341. /* Disable all CSI interface */
  342. __raw_writel(0x00, pcdev->base + CSICR1);
  343. clk_disable_unprepare(pcdev->clk);
  344. }
  345. static int mx1_camera_add_device(struct soc_camera_device *icd)
  346. {
  347. dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n",
  348. icd->devnum);
  349. return 0;
  350. }
  351. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  352. {
  353. dev_info(icd->parent, "MX1 Camera driver detached from camera %d\n",
  354. icd->devnum);
  355. }
  356. /*
  357. * The following two functions absolutely depend on the fact, that
  358. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  359. */
  360. static int mx1_camera_clock_start(struct soc_camera_host *ici)
  361. {
  362. struct mx1_camera_dev *pcdev = ici->priv;
  363. mx1_camera_activate(pcdev);
  364. return 0;
  365. }
  366. static void mx1_camera_clock_stop(struct soc_camera_host *ici)
  367. {
  368. struct mx1_camera_dev *pcdev = ici->priv;
  369. unsigned int csicr1;
  370. /* disable interrupts */
  371. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  372. __raw_writel(csicr1, pcdev->base + CSICR1);
  373. /* Stop DMA engine */
  374. imx_dma_disable(pcdev->dma_chan);
  375. mx1_camera_deactivate(pcdev);
  376. }
  377. static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
  378. {
  379. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  380. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  381. struct mx1_camera_dev *pcdev = ici->priv;
  382. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  383. unsigned long common_flags;
  384. unsigned int csicr1;
  385. int ret;
  386. /* MX1 supports only 8bit buswidth */
  387. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  388. if (!ret) {
  389. common_flags = soc_mbus_config_compatible(&cfg, CSI_BUS_FLAGS);
  390. if (!common_flags) {
  391. dev_warn(icd->parent,
  392. "Flags incompatible: camera 0x%x, host 0x%x\n",
  393. cfg.flags, CSI_BUS_FLAGS);
  394. return -EINVAL;
  395. }
  396. } else if (ret != -ENOIOCTLCMD) {
  397. return ret;
  398. } else {
  399. common_flags = CSI_BUS_FLAGS;
  400. }
  401. /* Make choises, based on platform choice */
  402. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  403. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  404. if (!pcdev->pdata ||
  405. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  406. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  407. else
  408. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  409. }
  410. if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
  411. (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
  412. if (!pcdev->pdata ||
  413. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  414. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
  415. else
  416. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
  417. }
  418. if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
  419. (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
  420. if (!pcdev->pdata ||
  421. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  422. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
  423. else
  424. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
  425. }
  426. cfg.flags = common_flags;
  427. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  428. if (ret < 0 && ret != -ENOIOCTLCMD) {
  429. dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
  430. common_flags, ret);
  431. return ret;
  432. }
  433. csicr1 = __raw_readl(pcdev->base + CSICR1);
  434. if (common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
  435. csicr1 |= CSICR1_REDGE;
  436. if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
  437. csicr1 |= CSICR1_SOF_POL;
  438. if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
  439. csicr1 |= CSICR1_DATA_POL;
  440. __raw_writel(csicr1, pcdev->base + CSICR1);
  441. return 0;
  442. }
  443. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  444. struct v4l2_format *f)
  445. {
  446. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  447. const struct soc_camera_format_xlate *xlate;
  448. struct v4l2_pix_format *pix = &f->fmt.pix;
  449. struct v4l2_mbus_framefmt mf;
  450. int ret, buswidth;
  451. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  452. if (!xlate) {
  453. dev_warn(icd->parent, "Format %x not found\n",
  454. pix->pixelformat);
  455. return -EINVAL;
  456. }
  457. buswidth = xlate->host_fmt->bits_per_sample;
  458. if (buswidth > 8) {
  459. dev_warn(icd->parent,
  460. "bits-per-sample %d for format %x unsupported\n",
  461. buswidth, pix->pixelformat);
  462. return -EINVAL;
  463. }
  464. mf.width = pix->width;
  465. mf.height = pix->height;
  466. mf.field = pix->field;
  467. mf.colorspace = pix->colorspace;
  468. mf.code = xlate->code;
  469. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  470. if (ret < 0)
  471. return ret;
  472. if (mf.code != xlate->code)
  473. return -EINVAL;
  474. pix->width = mf.width;
  475. pix->height = mf.height;
  476. pix->field = mf.field;
  477. pix->colorspace = mf.colorspace;
  478. icd->current_fmt = xlate;
  479. return ret;
  480. }
  481. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  482. struct v4l2_format *f)
  483. {
  484. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  485. const struct soc_camera_format_xlate *xlate;
  486. struct v4l2_pix_format *pix = &f->fmt.pix;
  487. struct v4l2_mbus_framefmt mf;
  488. int ret;
  489. /* TODO: limit to mx1 hardware capabilities */
  490. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  491. if (!xlate) {
  492. dev_warn(icd->parent, "Format %x not found\n",
  493. pix->pixelformat);
  494. return -EINVAL;
  495. }
  496. mf.width = pix->width;
  497. mf.height = pix->height;
  498. mf.field = pix->field;
  499. mf.colorspace = pix->colorspace;
  500. mf.code = xlate->code;
  501. /* limit to sensor capabilities */
  502. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  503. if (ret < 0)
  504. return ret;
  505. pix->width = mf.width;
  506. pix->height = mf.height;
  507. pix->field = mf.field;
  508. pix->colorspace = mf.colorspace;
  509. return 0;
  510. }
  511. static int mx1_camera_reqbufs(struct soc_camera_device *icd,
  512. struct v4l2_requestbuffers *p)
  513. {
  514. int i;
  515. /*
  516. * This is for locking debugging only. I removed spinlocks and now I
  517. * check whether .prepare is ever called on a linked buffer, or whether
  518. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  519. * it hadn't triggered
  520. */
  521. for (i = 0; i < p->count; i++) {
  522. struct mx1_buffer *buf = container_of(icd->vb_vidq.bufs[i],
  523. struct mx1_buffer, vb);
  524. buf->inwork = 0;
  525. INIT_LIST_HEAD(&buf->vb.queue);
  526. }
  527. return 0;
  528. }
  529. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  530. {
  531. struct soc_camera_device *icd = file->private_data;
  532. struct mx1_buffer *buf;
  533. buf = list_entry(icd->vb_vidq.stream.next, struct mx1_buffer,
  534. vb.stream);
  535. poll_wait(file, &buf->vb.done, pt);
  536. if (buf->vb.state == VIDEOBUF_DONE ||
  537. buf->vb.state == VIDEOBUF_ERROR)
  538. return POLLIN | POLLRDNORM;
  539. return 0;
  540. }
  541. static int mx1_camera_querycap(struct soc_camera_host *ici,
  542. struct v4l2_capability *cap)
  543. {
  544. /* cap->name is set by the friendly caller:-> */
  545. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  546. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  547. return 0;
  548. }
  549. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  550. .owner = THIS_MODULE,
  551. .add = mx1_camera_add_device,
  552. .remove = mx1_camera_remove_device,
  553. .clock_start = mx1_camera_clock_start,
  554. .clock_stop = mx1_camera_clock_stop,
  555. .set_bus_param = mx1_camera_set_bus_param,
  556. .set_fmt = mx1_camera_set_fmt,
  557. .try_fmt = mx1_camera_try_fmt,
  558. .init_videobuf = mx1_camera_init_videobuf,
  559. .reqbufs = mx1_camera_reqbufs,
  560. .poll = mx1_camera_poll,
  561. .querycap = mx1_camera_querycap,
  562. };
  563. static struct fiq_handler fh = {
  564. .name = "csi_sof"
  565. };
  566. static int __init mx1_camera_probe(struct platform_device *pdev)
  567. {
  568. struct mx1_camera_dev *pcdev;
  569. struct resource *res;
  570. struct pt_regs regs;
  571. struct clk *clk;
  572. void __iomem *base;
  573. unsigned int irq;
  574. int err = 0;
  575. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  576. irq = platform_get_irq(pdev, 0);
  577. if (!res || (int)irq <= 0) {
  578. err = -ENODEV;
  579. goto exit;
  580. }
  581. clk = clk_get(&pdev->dev, "csi_clk");
  582. if (IS_ERR(clk)) {
  583. err = PTR_ERR(clk);
  584. goto exit;
  585. }
  586. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  587. if (!pcdev) {
  588. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  589. err = -ENOMEM;
  590. goto exit_put_clk;
  591. }
  592. pcdev->res = res;
  593. pcdev->clk = clk;
  594. pcdev->pdata = pdev->dev.platform_data;
  595. if (pcdev->pdata)
  596. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  597. if (!pcdev->mclk) {
  598. dev_warn(&pdev->dev,
  599. "mclk_10khz == 0! Please, fix your platform data. "
  600. "Using default 20MHz\n");
  601. pcdev->mclk = 20000000;
  602. }
  603. INIT_LIST_HEAD(&pcdev->capture);
  604. spin_lock_init(&pcdev->lock);
  605. /*
  606. * Request the regions.
  607. */
  608. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  609. err = -EBUSY;
  610. goto exit_kfree;
  611. }
  612. base = ioremap(res->start, resource_size(res));
  613. if (!base) {
  614. err = -ENOMEM;
  615. goto exit_release;
  616. }
  617. pcdev->irq = irq;
  618. pcdev->base = base;
  619. /* request dma */
  620. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  621. if (pcdev->dma_chan < 0) {
  622. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  623. err = -EBUSY;
  624. goto exit_iounmap;
  625. }
  626. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  627. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  628. pcdev);
  629. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  630. IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
  631. /* burst length : 16 words = 64 bytes */
  632. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  633. /* request irq */
  634. err = claim_fiq(&fh);
  635. if (err) {
  636. dev_err(&pdev->dev, "Camera interrupt register failed\n");
  637. goto exit_free_dma;
  638. }
  639. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  640. &mx1_camera_sof_fiq_start);
  641. regs.ARM_r8 = (long)MX1_DMA_DIMR;
  642. regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
  643. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  644. regs.ARM_fp = (long)pcdev->base + CSISR;
  645. regs.ARM_sp = 1 << pcdev->dma_chan;
  646. set_fiq_regs(&regs);
  647. mxc_set_irq_fiq(irq, 1);
  648. enable_fiq(irq);
  649. pcdev->soc_host.drv_name = DRIVER_NAME;
  650. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  651. pcdev->soc_host.priv = pcdev;
  652. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  653. pcdev->soc_host.nr = pdev->id;
  654. err = soc_camera_host_register(&pcdev->soc_host);
  655. if (err)
  656. goto exit_free_irq;
  657. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  658. return 0;
  659. exit_free_irq:
  660. disable_fiq(irq);
  661. mxc_set_irq_fiq(irq, 0);
  662. release_fiq(&fh);
  663. exit_free_dma:
  664. imx_dma_free(pcdev->dma_chan);
  665. exit_iounmap:
  666. iounmap(base);
  667. exit_release:
  668. release_mem_region(res->start, resource_size(res));
  669. exit_kfree:
  670. kfree(pcdev);
  671. exit_put_clk:
  672. clk_put(clk);
  673. exit:
  674. return err;
  675. }
  676. static int __exit mx1_camera_remove(struct platform_device *pdev)
  677. {
  678. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  679. struct mx1_camera_dev *pcdev = container_of(soc_host,
  680. struct mx1_camera_dev, soc_host);
  681. struct resource *res;
  682. imx_dma_free(pcdev->dma_chan);
  683. disable_fiq(pcdev->irq);
  684. mxc_set_irq_fiq(pcdev->irq, 0);
  685. release_fiq(&fh);
  686. clk_put(pcdev->clk);
  687. soc_camera_host_unregister(soc_host);
  688. iounmap(pcdev->base);
  689. res = pcdev->res;
  690. release_mem_region(res->start, resource_size(res));
  691. kfree(pcdev);
  692. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  693. return 0;
  694. }
  695. static struct platform_driver mx1_camera_driver = {
  696. .driver = {
  697. .name = DRIVER_NAME,
  698. },
  699. .remove = __exit_p(mx1_camera_remove),
  700. };
  701. module_platform_driver_probe(mx1_camera_driver, mx1_camera_probe);
  702. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  703. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  704. MODULE_LICENSE("GPL v2");
  705. MODULE_VERSION(DRIVER_VERSION);
  706. MODULE_ALIAS("platform:" DRIVER_NAME);