isp.c 61 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  14. * Sakari Ailus <sakari.ailus@iki.fi>
  15. * David Cohen <dacohen@gmail.com>
  16. * Stanimir Varbanov <svarbanov@mm-sol.com>
  17. * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
  18. * Tuukka Toivonen <tuukkat76@gmail.com>
  19. * Sergio Aguirre <saaguirre@ti.com>
  20. * Antti Koskipaa <akoskipa@gmail.com>
  21. * Ivan T. Ivanov <iivanov@mm-sol.com>
  22. * RaniSuneela <r-m@ti.com>
  23. * Atanas Filipov <afilipov@mm-sol.com>
  24. * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
  25. * Hiroshi DOYU <hiroshi.doyu@nokia.com>
  26. * Nayden Kanchev <nkanchev@mm-sol.com>
  27. * Phil Carmody <ext-phil.2.carmody@nokia.com>
  28. * Artem Bityutskiy <artem.bityutskiy@nokia.com>
  29. * Dominic Curran <dcurran@ti.com>
  30. * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
  31. * Pallavi Kulkarni <p-kulkarni@ti.com>
  32. * Vaibhav Hiremath <hvaibhav@ti.com>
  33. * Mohit Jalori <mjalori@ti.com>
  34. * Sameer Venkatraman <sameerv@ti.com>
  35. * Senthilvadivu Guruswamy <svadivu@ti.com>
  36. * Thara Gopinath <thara@ti.com>
  37. * Toni Leinonen <toni.leinonen@nokia.com>
  38. * Troy Laramy <t-laramy@ti.com>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. *
  44. * This program is distributed in the hope that it will be useful, but
  45. * WITHOUT ANY WARRANTY; without even the implied warranty of
  46. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  47. * General Public License for more details.
  48. *
  49. * You should have received a copy of the GNU General Public License
  50. * along with this program; if not, write to the Free Software
  51. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  52. * 02110-1301 USA
  53. */
  54. #include <asm/cacheflush.h>
  55. #include <linux/clk.h>
  56. #include <linux/clkdev.h>
  57. #include <linux/delay.h>
  58. #include <linux/device.h>
  59. #include <linux/dma-mapping.h>
  60. #include <linux/i2c.h>
  61. #include <linux/interrupt.h>
  62. #include <linux/module.h>
  63. #include <linux/omap-iommu.h>
  64. #include <linux/platform_device.h>
  65. #include <linux/regulator/consumer.h>
  66. #include <linux/slab.h>
  67. #include <linux/sched.h>
  68. #include <linux/vmalloc.h>
  69. #include <media/v4l2-common.h>
  70. #include <media/v4l2-device.h>
  71. #include "isp.h"
  72. #include "ispreg.h"
  73. #include "ispccdc.h"
  74. #include "isppreview.h"
  75. #include "ispresizer.h"
  76. #include "ispcsi2.h"
  77. #include "ispccp2.h"
  78. #include "isph3a.h"
  79. #include "isphist.h"
  80. static unsigned int autoidle;
  81. module_param(autoidle, int, 0444);
  82. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  83. static void isp_save_ctx(struct isp_device *isp);
  84. static void isp_restore_ctx(struct isp_device *isp);
  85. static const struct isp_res_mapping isp_res_maps[] = {
  86. {
  87. .isp_rev = ISP_REVISION_2_0,
  88. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  89. 1 << OMAP3_ISP_IOMEM_CCP2 |
  90. 1 << OMAP3_ISP_IOMEM_CCDC |
  91. 1 << OMAP3_ISP_IOMEM_HIST |
  92. 1 << OMAP3_ISP_IOMEM_H3A |
  93. 1 << OMAP3_ISP_IOMEM_PREV |
  94. 1 << OMAP3_ISP_IOMEM_RESZ |
  95. 1 << OMAP3_ISP_IOMEM_SBL |
  96. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  97. 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
  98. 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
  99. },
  100. {
  101. .isp_rev = ISP_REVISION_15_0,
  102. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  103. 1 << OMAP3_ISP_IOMEM_CCP2 |
  104. 1 << OMAP3_ISP_IOMEM_CCDC |
  105. 1 << OMAP3_ISP_IOMEM_HIST |
  106. 1 << OMAP3_ISP_IOMEM_H3A |
  107. 1 << OMAP3_ISP_IOMEM_PREV |
  108. 1 << OMAP3_ISP_IOMEM_RESZ |
  109. 1 << OMAP3_ISP_IOMEM_SBL |
  110. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  111. 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
  112. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
  113. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
  114. 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
  115. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
  116. 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
  117. },
  118. };
  119. /* Structure for saving/restoring ISP module registers */
  120. static struct isp_reg isp_reg_list[] = {
  121. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  122. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  123. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  124. {0, ISP_TOK_TERM, 0}
  125. };
  126. /*
  127. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  128. * @isp: OMAP3 ISP device
  129. *
  130. * In order to force posting of pending writes, we need to write and
  131. * readback the same register, in this case the revision register.
  132. *
  133. * See this link for reference:
  134. * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
  135. */
  136. void omap3isp_flush(struct isp_device *isp)
  137. {
  138. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  139. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  140. }
  141. /* -----------------------------------------------------------------------------
  142. * XCLK
  143. */
  144. #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
  145. static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
  146. {
  147. switch (xclk->id) {
  148. case ISP_XCLK_A:
  149. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  150. ISPTCTRL_CTRL_DIVA_MASK,
  151. divider << ISPTCTRL_CTRL_DIVA_SHIFT);
  152. break;
  153. case ISP_XCLK_B:
  154. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  155. ISPTCTRL_CTRL_DIVB_MASK,
  156. divider << ISPTCTRL_CTRL_DIVB_SHIFT);
  157. break;
  158. }
  159. }
  160. static int isp_xclk_prepare(struct clk_hw *hw)
  161. {
  162. struct isp_xclk *xclk = to_isp_xclk(hw);
  163. omap3isp_get(xclk->isp);
  164. return 0;
  165. }
  166. static void isp_xclk_unprepare(struct clk_hw *hw)
  167. {
  168. struct isp_xclk *xclk = to_isp_xclk(hw);
  169. omap3isp_put(xclk->isp);
  170. }
  171. static int isp_xclk_enable(struct clk_hw *hw)
  172. {
  173. struct isp_xclk *xclk = to_isp_xclk(hw);
  174. unsigned long flags;
  175. spin_lock_irqsave(&xclk->lock, flags);
  176. isp_xclk_update(xclk, xclk->divider);
  177. xclk->enabled = true;
  178. spin_unlock_irqrestore(&xclk->lock, flags);
  179. return 0;
  180. }
  181. static void isp_xclk_disable(struct clk_hw *hw)
  182. {
  183. struct isp_xclk *xclk = to_isp_xclk(hw);
  184. unsigned long flags;
  185. spin_lock_irqsave(&xclk->lock, flags);
  186. isp_xclk_update(xclk, 0);
  187. xclk->enabled = false;
  188. spin_unlock_irqrestore(&xclk->lock, flags);
  189. }
  190. static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
  191. unsigned long parent_rate)
  192. {
  193. struct isp_xclk *xclk = to_isp_xclk(hw);
  194. return parent_rate / xclk->divider;
  195. }
  196. static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
  197. {
  198. u32 divider;
  199. if (*rate >= parent_rate) {
  200. *rate = parent_rate;
  201. return ISPTCTRL_CTRL_DIV_BYPASS;
  202. }
  203. divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
  204. if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
  205. divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  206. *rate = parent_rate / divider;
  207. return divider;
  208. }
  209. static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
  210. unsigned long *parent_rate)
  211. {
  212. isp_xclk_calc_divider(&rate, *parent_rate);
  213. return rate;
  214. }
  215. static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
  216. unsigned long parent_rate)
  217. {
  218. struct isp_xclk *xclk = to_isp_xclk(hw);
  219. unsigned long flags;
  220. u32 divider;
  221. divider = isp_xclk_calc_divider(&rate, parent_rate);
  222. spin_lock_irqsave(&xclk->lock, flags);
  223. xclk->divider = divider;
  224. if (xclk->enabled)
  225. isp_xclk_update(xclk, divider);
  226. spin_unlock_irqrestore(&xclk->lock, flags);
  227. dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
  228. __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
  229. return 0;
  230. }
  231. static const struct clk_ops isp_xclk_ops = {
  232. .prepare = isp_xclk_prepare,
  233. .unprepare = isp_xclk_unprepare,
  234. .enable = isp_xclk_enable,
  235. .disable = isp_xclk_disable,
  236. .recalc_rate = isp_xclk_recalc_rate,
  237. .round_rate = isp_xclk_round_rate,
  238. .set_rate = isp_xclk_set_rate,
  239. };
  240. static const char *isp_xclk_parent_name = "cam_mclk";
  241. static const struct clk_init_data isp_xclk_init_data = {
  242. .name = "cam_xclk",
  243. .ops = &isp_xclk_ops,
  244. .parent_names = &isp_xclk_parent_name,
  245. .num_parents = 1,
  246. };
  247. static int isp_xclk_init(struct isp_device *isp)
  248. {
  249. struct isp_platform_data *pdata = isp->pdata;
  250. struct clk_init_data init;
  251. unsigned int i;
  252. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  253. struct isp_xclk *xclk = &isp->xclks[i];
  254. struct clk *clk;
  255. xclk->isp = isp;
  256. xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
  257. xclk->divider = 1;
  258. spin_lock_init(&xclk->lock);
  259. init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
  260. init.ops = &isp_xclk_ops;
  261. init.parent_names = &isp_xclk_parent_name;
  262. init.num_parents = 1;
  263. xclk->hw.init = &init;
  264. clk = devm_clk_register(isp->dev, &xclk->hw);
  265. if (IS_ERR(clk))
  266. return PTR_ERR(clk);
  267. if (pdata->xclks[i].con_id == NULL &&
  268. pdata->xclks[i].dev_id == NULL)
  269. continue;
  270. xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
  271. if (xclk->lookup == NULL)
  272. return -ENOMEM;
  273. xclk->lookup->con_id = pdata->xclks[i].con_id;
  274. xclk->lookup->dev_id = pdata->xclks[i].dev_id;
  275. xclk->lookup->clk = clk;
  276. clkdev_add(xclk->lookup);
  277. }
  278. return 0;
  279. }
  280. static void isp_xclk_cleanup(struct isp_device *isp)
  281. {
  282. unsigned int i;
  283. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  284. struct isp_xclk *xclk = &isp->xclks[i];
  285. if (xclk->lookup)
  286. clkdev_drop(xclk->lookup);
  287. }
  288. }
  289. /* -----------------------------------------------------------------------------
  290. * Interrupts
  291. */
  292. /*
  293. * isp_enable_interrupts - Enable ISP interrupts.
  294. * @isp: OMAP3 ISP device
  295. */
  296. static void isp_enable_interrupts(struct isp_device *isp)
  297. {
  298. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  299. | IRQ0ENABLE_CSIB_IRQ
  300. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  301. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  302. | IRQ0ENABLE_CCDC_VD0_IRQ
  303. | IRQ0ENABLE_CCDC_VD1_IRQ
  304. | IRQ0ENABLE_HS_VS_IRQ
  305. | IRQ0ENABLE_HIST_DONE_IRQ
  306. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  307. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  308. | IRQ0ENABLE_PRV_DONE_IRQ
  309. | IRQ0ENABLE_RSZ_DONE_IRQ;
  310. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  311. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  312. }
  313. /*
  314. * isp_disable_interrupts - Disable ISP interrupts.
  315. * @isp: OMAP3 ISP device
  316. */
  317. static void isp_disable_interrupts(struct isp_device *isp)
  318. {
  319. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  320. }
  321. /*
  322. * isp_core_init - ISP core settings
  323. * @isp: OMAP3 ISP device
  324. * @idle: Consider idle state.
  325. *
  326. * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
  327. * interrupt source.
  328. *
  329. * We need to configure the HS/VS interrupt source before interrupts get
  330. * enabled, as the sensor might be free-running and the ISP default setting
  331. * (HS edge) would put an unnecessary burden on the CPU.
  332. */
  333. static void isp_core_init(struct isp_device *isp, int idle)
  334. {
  335. isp_reg_writel(isp,
  336. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  337. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  338. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  339. ((isp->revision == ISP_REVISION_15_0) ?
  340. ISP_SYSCONFIG_AUTOIDLE : 0),
  341. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  342. isp_reg_writel(isp,
  343. (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
  344. ISPCTRL_SYNC_DETECT_VSRISE,
  345. OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  346. }
  347. /*
  348. * Configure the bridge and lane shifter. Valid inputs are
  349. *
  350. * CCDC_INPUT_PARALLEL: Parallel interface
  351. * CCDC_INPUT_CSI2A: CSI2a receiver
  352. * CCDC_INPUT_CCP2B: CCP2b receiver
  353. * CCDC_INPUT_CSI2C: CSI2c receiver
  354. *
  355. * The bridge and lane shifter are configured according to the selected input
  356. * and the ISP platform data.
  357. */
  358. void omap3isp_configure_bridge(struct isp_device *isp,
  359. enum ccdc_input_entity input,
  360. const struct isp_parallel_platform_data *pdata,
  361. unsigned int shift, unsigned int bridge)
  362. {
  363. u32 ispctrl_val;
  364. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  365. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  366. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  367. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  368. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  369. ispctrl_val |= bridge;
  370. switch (input) {
  371. case CCDC_INPUT_PARALLEL:
  372. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  373. ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  374. shift += pdata->data_lane_shift * 2;
  375. break;
  376. case CCDC_INPUT_CSI2A:
  377. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  378. break;
  379. case CCDC_INPUT_CCP2B:
  380. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  381. break;
  382. case CCDC_INPUT_CSI2C:
  383. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  384. break;
  385. default:
  386. return;
  387. }
  388. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  389. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  390. }
  391. void omap3isp_hist_dma_done(struct isp_device *isp)
  392. {
  393. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  394. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  395. /* Histogram cannot be enabled in this frame anymore */
  396. atomic_set(&isp->isp_hist.buf_err, 1);
  397. dev_dbg(isp->dev, "hist: Out of synchronization with "
  398. "CCDC. Ignoring next buffer.\n");
  399. }
  400. }
  401. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  402. {
  403. static const char *name[] = {
  404. "CSIA_IRQ",
  405. "res1",
  406. "res2",
  407. "CSIB_LCM_IRQ",
  408. "CSIB_IRQ",
  409. "res5",
  410. "res6",
  411. "res7",
  412. "CCDC_VD0_IRQ",
  413. "CCDC_VD1_IRQ",
  414. "CCDC_VD2_IRQ",
  415. "CCDC_ERR_IRQ",
  416. "H3A_AF_DONE_IRQ",
  417. "H3A_AWB_DONE_IRQ",
  418. "res14",
  419. "res15",
  420. "HIST_DONE_IRQ",
  421. "CCDC_LSC_DONE",
  422. "CCDC_LSC_PREFETCH_COMPLETED",
  423. "CCDC_LSC_PREFETCH_ERROR",
  424. "PRV_DONE_IRQ",
  425. "CBUFF_IRQ",
  426. "res22",
  427. "res23",
  428. "RSZ_DONE_IRQ",
  429. "OVF_IRQ",
  430. "res26",
  431. "res27",
  432. "MMU_ERR_IRQ",
  433. "OCP_ERR_IRQ",
  434. "SEC_ERR_IRQ",
  435. "HS_VS_IRQ",
  436. };
  437. int i;
  438. dev_dbg(isp->dev, "ISP IRQ: ");
  439. for (i = 0; i < ARRAY_SIZE(name); i++) {
  440. if ((1 << i) & irqstatus)
  441. printk(KERN_CONT "%s ", name[i]);
  442. }
  443. printk(KERN_CONT "\n");
  444. }
  445. static void isp_isr_sbl(struct isp_device *isp)
  446. {
  447. struct device *dev = isp->dev;
  448. struct isp_pipeline *pipe;
  449. u32 sbl_pcr;
  450. /*
  451. * Handle shared buffer logic overflows for video buffers.
  452. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  453. */
  454. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  455. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  456. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  457. if (sbl_pcr)
  458. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  459. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  460. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  461. if (pipe != NULL)
  462. pipe->error = true;
  463. }
  464. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  465. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  466. if (pipe != NULL)
  467. pipe->error = true;
  468. }
  469. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  470. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  471. if (pipe != NULL)
  472. pipe->error = true;
  473. }
  474. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  475. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  476. if (pipe != NULL)
  477. pipe->error = true;
  478. }
  479. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  480. | ISPSBL_PCR_RSZ2_WBL_OVF
  481. | ISPSBL_PCR_RSZ3_WBL_OVF
  482. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  483. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  484. if (pipe != NULL)
  485. pipe->error = true;
  486. }
  487. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  488. omap3isp_stat_sbl_overflow(&isp->isp_af);
  489. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  490. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  491. }
  492. /*
  493. * isp_isr - Interrupt Service Routine for Camera ISP module.
  494. * @irq: Not used currently.
  495. * @_isp: Pointer to the OMAP3 ISP device
  496. *
  497. * Handles the corresponding callback if plugged in.
  498. *
  499. * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
  500. * IRQ wasn't handled.
  501. */
  502. static irqreturn_t isp_isr(int irq, void *_isp)
  503. {
  504. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  505. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  506. IRQ0STATUS_CCDC_VD0_IRQ |
  507. IRQ0STATUS_CCDC_VD1_IRQ |
  508. IRQ0STATUS_HS_VS_IRQ;
  509. struct isp_device *isp = _isp;
  510. u32 irqstatus;
  511. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  512. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  513. isp_isr_sbl(isp);
  514. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  515. omap3isp_csi2_isr(&isp->isp_csi2a);
  516. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  517. omap3isp_ccp2_isr(&isp->isp_ccp2);
  518. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  519. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  520. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  521. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  522. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  523. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  524. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  525. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  526. }
  527. if (irqstatus & ccdc_events)
  528. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  529. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  530. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  531. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  532. omap3isp_preview_isr(&isp->isp_prev);
  533. }
  534. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  535. omap3isp_resizer_isr(&isp->isp_res);
  536. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  537. omap3isp_stat_isr(&isp->isp_aewb);
  538. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  539. omap3isp_stat_isr(&isp->isp_af);
  540. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  541. omap3isp_stat_isr(&isp->isp_hist);
  542. omap3isp_flush(isp);
  543. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  544. isp_isr_dbg(isp, irqstatus);
  545. #endif
  546. return IRQ_HANDLED;
  547. }
  548. /* -----------------------------------------------------------------------------
  549. * Pipeline power management
  550. *
  551. * Entities must be powered up when part of a pipeline that contains at least
  552. * one open video device node.
  553. *
  554. * To achieve this use the entity use_count field to track the number of users.
  555. * For entities corresponding to video device nodes the use_count field stores
  556. * the users count of the node. For entities corresponding to subdevs the
  557. * use_count field stores the total number of users of all video device nodes
  558. * in the pipeline.
  559. *
  560. * The omap3isp_pipeline_pm_use() function must be called in the open() and
  561. * close() handlers of video device nodes. It increments or decrements the use
  562. * count of all subdev entities in the pipeline.
  563. *
  564. * To react to link management on powered pipelines, the link setup notification
  565. * callback updates the use count of all entities in the source and sink sides
  566. * of the link.
  567. */
  568. /*
  569. * isp_pipeline_pm_use_count - Count the number of users of a pipeline
  570. * @entity: The entity
  571. *
  572. * Return the total number of users of all video device nodes in the pipeline.
  573. */
  574. static int isp_pipeline_pm_use_count(struct media_entity *entity)
  575. {
  576. struct media_entity_graph graph;
  577. int use = 0;
  578. media_entity_graph_walk_start(&graph, entity);
  579. while ((entity = media_entity_graph_walk_next(&graph))) {
  580. if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
  581. use += entity->use_count;
  582. }
  583. return use;
  584. }
  585. /*
  586. * isp_pipeline_pm_power_one - Apply power change to an entity
  587. * @entity: The entity
  588. * @change: Use count change
  589. *
  590. * Change the entity use count by @change. If the entity is a subdev update its
  591. * power state by calling the core::s_power operation when the use count goes
  592. * from 0 to != 0 or from != 0 to 0.
  593. *
  594. * Return 0 on success or a negative error code on failure.
  595. */
  596. static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
  597. {
  598. struct v4l2_subdev *subdev;
  599. int ret;
  600. subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
  601. ? media_entity_to_v4l2_subdev(entity) : NULL;
  602. if (entity->use_count == 0 && change > 0 && subdev != NULL) {
  603. ret = v4l2_subdev_call(subdev, core, s_power, 1);
  604. if (ret < 0 && ret != -ENOIOCTLCMD)
  605. return ret;
  606. }
  607. entity->use_count += change;
  608. WARN_ON(entity->use_count < 0);
  609. if (entity->use_count == 0 && change < 0 && subdev != NULL)
  610. v4l2_subdev_call(subdev, core, s_power, 0);
  611. return 0;
  612. }
  613. /*
  614. * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
  615. * @entity: The entity
  616. * @change: Use count change
  617. *
  618. * Walk the pipeline to update the use count and the power state of all non-node
  619. * entities.
  620. *
  621. * Return 0 on success or a negative error code on failure.
  622. */
  623. static int isp_pipeline_pm_power(struct media_entity *entity, int change)
  624. {
  625. struct media_entity_graph graph;
  626. struct media_entity *first = entity;
  627. int ret = 0;
  628. if (!change)
  629. return 0;
  630. media_entity_graph_walk_start(&graph, entity);
  631. while (!ret && (entity = media_entity_graph_walk_next(&graph)))
  632. if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
  633. ret = isp_pipeline_pm_power_one(entity, change);
  634. if (!ret)
  635. return 0;
  636. media_entity_graph_walk_start(&graph, first);
  637. while ((first = media_entity_graph_walk_next(&graph))
  638. && first != entity)
  639. if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
  640. isp_pipeline_pm_power_one(first, -change);
  641. return ret;
  642. }
  643. /*
  644. * omap3isp_pipeline_pm_use - Update the use count of an entity
  645. * @entity: The entity
  646. * @use: Use (1) or stop using (0) the entity
  647. *
  648. * Update the use count of all entities in the pipeline and power entities on or
  649. * off accordingly.
  650. *
  651. * Return 0 on success or a negative error code on failure. Powering entities
  652. * off is assumed to never fail. No failure can occur when the use parameter is
  653. * set to 0.
  654. */
  655. int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
  656. {
  657. int change = use ? 1 : -1;
  658. int ret;
  659. mutex_lock(&entity->parent->graph_mutex);
  660. /* Apply use count to node. */
  661. entity->use_count += change;
  662. WARN_ON(entity->use_count < 0);
  663. /* Apply power change to connected non-nodes. */
  664. ret = isp_pipeline_pm_power(entity, change);
  665. if (ret < 0)
  666. entity->use_count -= change;
  667. mutex_unlock(&entity->parent->graph_mutex);
  668. return ret;
  669. }
  670. /*
  671. * isp_pipeline_link_notify - Link management notification callback
  672. * @link: The link
  673. * @flags: New link flags that will be applied
  674. * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
  675. *
  676. * React to link management on powered pipelines by updating the use count of
  677. * all entities in the source and sink sides of the link. Entities are powered
  678. * on or off accordingly.
  679. *
  680. * Return 0 on success or a negative error code on failure. Powering entities
  681. * off is assumed to never fail. This function will not fail for disconnection
  682. * events.
  683. */
  684. static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
  685. unsigned int notification)
  686. {
  687. struct media_entity *source = link->source->entity;
  688. struct media_entity *sink = link->sink->entity;
  689. int source_use = isp_pipeline_pm_use_count(source);
  690. int sink_use = isp_pipeline_pm_use_count(sink);
  691. int ret;
  692. if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
  693. !(link->flags & MEDIA_LNK_FL_ENABLED)) {
  694. /* Powering off entities is assumed to never fail. */
  695. isp_pipeline_pm_power(source, -sink_use);
  696. isp_pipeline_pm_power(sink, -source_use);
  697. return 0;
  698. }
  699. if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
  700. (flags & MEDIA_LNK_FL_ENABLED)) {
  701. ret = isp_pipeline_pm_power(source, sink_use);
  702. if (ret < 0)
  703. return ret;
  704. ret = isp_pipeline_pm_power(sink, source_use);
  705. if (ret < 0)
  706. isp_pipeline_pm_power(source, -sink_use);
  707. return ret;
  708. }
  709. return 0;
  710. }
  711. /* -----------------------------------------------------------------------------
  712. * Pipeline stream management
  713. */
  714. /*
  715. * isp_pipeline_enable - Enable streaming on a pipeline
  716. * @pipe: ISP pipeline
  717. * @mode: Stream mode (single shot or continuous)
  718. *
  719. * Walk the entities chain starting at the pipeline output video node and start
  720. * all modules in the chain in the given mode.
  721. *
  722. * Return 0 if successful, or the return value of the failed video::s_stream
  723. * operation otherwise.
  724. */
  725. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  726. enum isp_pipeline_stream_state mode)
  727. {
  728. struct isp_device *isp = pipe->output->isp;
  729. struct media_entity *entity;
  730. struct media_pad *pad;
  731. struct v4l2_subdev *subdev;
  732. unsigned long flags;
  733. int ret;
  734. /* If the preview engine crashed it might not respond to read/write
  735. * operations on the L4 bus. This would result in a bus fault and a
  736. * kernel oops. Refuse to start streaming in that case. This check must
  737. * be performed before the loop below to avoid starting entities if the
  738. * pipeline won't start anyway (those entities would then likely fail to
  739. * stop, making the problem worse).
  740. */
  741. if ((pipe->entities & isp->crashed) &
  742. (1U << isp->isp_prev.subdev.entity.id))
  743. return -EIO;
  744. spin_lock_irqsave(&pipe->lock, flags);
  745. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  746. spin_unlock_irqrestore(&pipe->lock, flags);
  747. pipe->do_propagation = false;
  748. entity = &pipe->output->video.entity;
  749. while (1) {
  750. pad = &entity->pads[0];
  751. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  752. break;
  753. pad = media_entity_remote_pad(pad);
  754. if (pad == NULL ||
  755. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  756. break;
  757. entity = pad->entity;
  758. subdev = media_entity_to_v4l2_subdev(entity);
  759. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  760. if (ret < 0 && ret != -ENOIOCTLCMD)
  761. return ret;
  762. if (subdev == &isp->isp_ccdc.subdev) {
  763. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  764. s_stream, mode);
  765. v4l2_subdev_call(&isp->isp_af.subdev, video,
  766. s_stream, mode);
  767. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  768. s_stream, mode);
  769. pipe->do_propagation = true;
  770. }
  771. }
  772. return 0;
  773. }
  774. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  775. {
  776. return omap3isp_resizer_busy(&isp->isp_res);
  777. }
  778. static int isp_pipeline_wait_preview(struct isp_device *isp)
  779. {
  780. return omap3isp_preview_busy(&isp->isp_prev);
  781. }
  782. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  783. {
  784. return omap3isp_stat_busy(&isp->isp_af)
  785. || omap3isp_stat_busy(&isp->isp_aewb)
  786. || omap3isp_stat_busy(&isp->isp_hist)
  787. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  788. }
  789. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  790. static int isp_pipeline_wait(struct isp_device *isp,
  791. int(*busy)(struct isp_device *isp))
  792. {
  793. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  794. while (!time_after(jiffies, timeout)) {
  795. if (!busy(isp))
  796. return 0;
  797. }
  798. return 1;
  799. }
  800. /*
  801. * isp_pipeline_disable - Disable streaming on a pipeline
  802. * @pipe: ISP pipeline
  803. *
  804. * Walk the entities chain starting at the pipeline output video node and stop
  805. * all modules in the chain. Wait synchronously for the modules to be stopped if
  806. * necessary.
  807. *
  808. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  809. * can't be stopped (in which case a software reset of the ISP is probably
  810. * necessary).
  811. */
  812. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  813. {
  814. struct isp_device *isp = pipe->output->isp;
  815. struct media_entity *entity;
  816. struct media_pad *pad;
  817. struct v4l2_subdev *subdev;
  818. int failure = 0;
  819. int ret;
  820. /*
  821. * We need to stop all the modules after CCDC first or they'll
  822. * never stop since they may not get a full frame from CCDC.
  823. */
  824. entity = &pipe->output->video.entity;
  825. while (1) {
  826. pad = &entity->pads[0];
  827. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  828. break;
  829. pad = media_entity_remote_pad(pad);
  830. if (pad == NULL ||
  831. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  832. break;
  833. entity = pad->entity;
  834. subdev = media_entity_to_v4l2_subdev(entity);
  835. if (subdev == &isp->isp_ccdc.subdev) {
  836. v4l2_subdev_call(&isp->isp_aewb.subdev,
  837. video, s_stream, 0);
  838. v4l2_subdev_call(&isp->isp_af.subdev,
  839. video, s_stream, 0);
  840. v4l2_subdev_call(&isp->isp_hist.subdev,
  841. video, s_stream, 0);
  842. }
  843. v4l2_subdev_call(subdev, video, s_stream, 0);
  844. if (subdev == &isp->isp_res.subdev)
  845. ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  846. else if (subdev == &isp->isp_prev.subdev)
  847. ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  848. else if (subdev == &isp->isp_ccdc.subdev)
  849. ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  850. else
  851. ret = 0;
  852. if (ret) {
  853. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  854. /* If the entity failed to stopped, assume it has
  855. * crashed. Mark it as such, the ISP will be reset when
  856. * applications will release it.
  857. */
  858. isp->crashed |= 1U << subdev->entity.id;
  859. failure = -ETIMEDOUT;
  860. }
  861. }
  862. return failure;
  863. }
  864. /*
  865. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  866. * @pipe: ISP pipeline
  867. * @state: Stream state (stopped, single shot or continuous)
  868. *
  869. * Set the pipeline to the given stream state. Pipelines can be started in
  870. * single-shot or continuous mode.
  871. *
  872. * Return 0 if successful, or the return value of the failed video::s_stream
  873. * operation otherwise. The pipeline state is not updated when the operation
  874. * fails, except when stopping the pipeline.
  875. */
  876. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  877. enum isp_pipeline_stream_state state)
  878. {
  879. int ret;
  880. if (state == ISP_PIPELINE_STREAM_STOPPED)
  881. ret = isp_pipeline_disable(pipe);
  882. else
  883. ret = isp_pipeline_enable(pipe, state);
  884. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  885. pipe->stream_state = state;
  886. return ret;
  887. }
  888. /*
  889. * isp_pipeline_resume - Resume streaming on a pipeline
  890. * @pipe: ISP pipeline
  891. *
  892. * Resume video output and input and re-enable pipeline.
  893. */
  894. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  895. {
  896. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  897. omap3isp_video_resume(pipe->output, !singleshot);
  898. if (singleshot)
  899. omap3isp_video_resume(pipe->input, 0);
  900. isp_pipeline_enable(pipe, pipe->stream_state);
  901. }
  902. /*
  903. * isp_pipeline_suspend - Suspend streaming on a pipeline
  904. * @pipe: ISP pipeline
  905. *
  906. * Suspend pipeline.
  907. */
  908. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  909. {
  910. isp_pipeline_disable(pipe);
  911. }
  912. /*
  913. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  914. * video node
  915. * @me: ISP module's media entity
  916. *
  917. * Returns 1 if the entity has an enabled link to the output video node or 0
  918. * otherwise. It's true only while pipeline can have no more than one output
  919. * node.
  920. */
  921. static int isp_pipeline_is_last(struct media_entity *me)
  922. {
  923. struct isp_pipeline *pipe;
  924. struct media_pad *pad;
  925. if (!me->pipe)
  926. return 0;
  927. pipe = to_isp_pipeline(me);
  928. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  929. return 0;
  930. pad = media_entity_remote_pad(&pipe->output->pad);
  931. return pad->entity == me;
  932. }
  933. /*
  934. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  935. * @me: ISP module's media entity
  936. *
  937. * Suspend the whole pipeline if module's entity has an enabled link to the
  938. * output video node. It works only while pipeline can have no more than one
  939. * output node.
  940. */
  941. static void isp_suspend_module_pipeline(struct media_entity *me)
  942. {
  943. if (isp_pipeline_is_last(me))
  944. isp_pipeline_suspend(to_isp_pipeline(me));
  945. }
  946. /*
  947. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  948. * @me: ISP module's media entity
  949. *
  950. * Resume the whole pipeline if module's entity has an enabled link to the
  951. * output video node. It works only while pipeline can have no more than one
  952. * output node.
  953. */
  954. static void isp_resume_module_pipeline(struct media_entity *me)
  955. {
  956. if (isp_pipeline_is_last(me))
  957. isp_pipeline_resume(to_isp_pipeline(me));
  958. }
  959. /*
  960. * isp_suspend_modules - Suspend ISP submodules.
  961. * @isp: OMAP3 ISP device
  962. *
  963. * Returns 0 if suspend left in idle state all the submodules properly,
  964. * or returns 1 if a general Reset is required to suspend the submodules.
  965. */
  966. static int isp_suspend_modules(struct isp_device *isp)
  967. {
  968. unsigned long timeout;
  969. omap3isp_stat_suspend(&isp->isp_aewb);
  970. omap3isp_stat_suspend(&isp->isp_af);
  971. omap3isp_stat_suspend(&isp->isp_hist);
  972. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  973. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  974. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  975. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  976. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  977. timeout = jiffies + ISP_STOP_TIMEOUT;
  978. while (omap3isp_stat_busy(&isp->isp_af)
  979. || omap3isp_stat_busy(&isp->isp_aewb)
  980. || omap3isp_stat_busy(&isp->isp_hist)
  981. || omap3isp_preview_busy(&isp->isp_prev)
  982. || omap3isp_resizer_busy(&isp->isp_res)
  983. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  984. if (time_after(jiffies, timeout)) {
  985. dev_info(isp->dev, "can't stop modules.\n");
  986. return 1;
  987. }
  988. msleep(1);
  989. }
  990. return 0;
  991. }
  992. /*
  993. * isp_resume_modules - Resume ISP submodules.
  994. * @isp: OMAP3 ISP device
  995. */
  996. static void isp_resume_modules(struct isp_device *isp)
  997. {
  998. omap3isp_stat_resume(&isp->isp_aewb);
  999. omap3isp_stat_resume(&isp->isp_af);
  1000. omap3isp_stat_resume(&isp->isp_hist);
  1001. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  1002. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  1003. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  1004. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  1005. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  1006. }
  1007. /*
  1008. * isp_reset - Reset ISP with a timeout wait for idle.
  1009. * @isp: OMAP3 ISP device
  1010. */
  1011. static int isp_reset(struct isp_device *isp)
  1012. {
  1013. unsigned long timeout = 0;
  1014. isp_reg_writel(isp,
  1015. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  1016. | ISP_SYSCONFIG_SOFTRESET,
  1017. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  1018. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  1019. ISP_SYSSTATUS) & 0x1)) {
  1020. if (timeout++ > 10000) {
  1021. dev_alert(isp->dev, "cannot reset ISP\n");
  1022. return -ETIMEDOUT;
  1023. }
  1024. udelay(1);
  1025. }
  1026. isp->crashed = 0;
  1027. return 0;
  1028. }
  1029. /*
  1030. * isp_save_context - Saves the values of the ISP module registers.
  1031. * @isp: OMAP3 ISP device
  1032. * @reg_list: Structure containing pairs of register address and value to
  1033. * modify on OMAP.
  1034. */
  1035. static void
  1036. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  1037. {
  1038. struct isp_reg *next = reg_list;
  1039. for (; next->reg != ISP_TOK_TERM; next++)
  1040. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  1041. }
  1042. /*
  1043. * isp_restore_context - Restores the values of the ISP module registers.
  1044. * @isp: OMAP3 ISP device
  1045. * @reg_list: Structure containing pairs of register address and value to
  1046. * modify on OMAP.
  1047. */
  1048. static void
  1049. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  1050. {
  1051. struct isp_reg *next = reg_list;
  1052. for (; next->reg != ISP_TOK_TERM; next++)
  1053. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  1054. }
  1055. /*
  1056. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1057. * @isp: OMAP3 ISP device
  1058. *
  1059. * Routine for saving the context of each module in the ISP.
  1060. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1061. */
  1062. static void isp_save_ctx(struct isp_device *isp)
  1063. {
  1064. isp_save_context(isp, isp_reg_list);
  1065. omap_iommu_save_ctx(isp->dev);
  1066. }
  1067. /*
  1068. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1069. * @isp: OMAP3 ISP device
  1070. *
  1071. * Routine for restoring the context of each module in the ISP.
  1072. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1073. */
  1074. static void isp_restore_ctx(struct isp_device *isp)
  1075. {
  1076. isp_restore_context(isp, isp_reg_list);
  1077. omap_iommu_restore_ctx(isp->dev);
  1078. omap3isp_ccdc_restore_context(isp);
  1079. omap3isp_preview_restore_context(isp);
  1080. }
  1081. /* -----------------------------------------------------------------------------
  1082. * SBL resources management
  1083. */
  1084. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  1085. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  1086. OMAP3_ISP_SBL_PREVIEW_READ | \
  1087. OMAP3_ISP_SBL_RESIZER_READ)
  1088. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  1089. OMAP3_ISP_SBL_CSI2A_WRITE | \
  1090. OMAP3_ISP_SBL_CSI2C_WRITE | \
  1091. OMAP3_ISP_SBL_CCDC_WRITE | \
  1092. OMAP3_ISP_SBL_PREVIEW_WRITE)
  1093. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  1094. {
  1095. u32 sbl = 0;
  1096. isp->sbl_resources |= res;
  1097. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  1098. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1099. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  1100. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1101. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  1102. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1103. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  1104. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1105. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  1106. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1107. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  1108. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1109. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1110. }
  1111. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  1112. {
  1113. u32 sbl = 0;
  1114. isp->sbl_resources &= ~res;
  1115. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  1116. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1117. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  1118. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1119. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  1120. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1121. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  1122. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1123. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  1124. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1125. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  1126. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1127. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1128. }
  1129. /*
  1130. * isp_module_sync_idle - Helper to sync module with its idle state
  1131. * @me: ISP submodule's media entity
  1132. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1133. * @stopping: flag which tells module wants to stop
  1134. *
  1135. * This function checks if ISP submodule needs to wait for next interrupt. If
  1136. * yes, makes the caller to sleep while waiting for such event.
  1137. */
  1138. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1139. atomic_t *stopping)
  1140. {
  1141. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1142. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1143. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1144. !isp_pipeline_ready(pipe)))
  1145. return 0;
  1146. /*
  1147. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1148. * scenario. We'll call it here to avoid race conditions.
  1149. */
  1150. atomic_set(stopping, 1);
  1151. smp_mb();
  1152. /*
  1153. * If module is the last one, it's writing to memory. In this case,
  1154. * it's necessary to check if the module is already paused due to
  1155. * DMA queue underrun or if it has to wait for next interrupt to be
  1156. * idle.
  1157. * If it isn't the last one, the function won't sleep but *stopping
  1158. * will still be set to warn next submodule caller's interrupt the
  1159. * module wants to be idle.
  1160. */
  1161. if (isp_pipeline_is_last(me)) {
  1162. struct isp_video *video = pipe->output;
  1163. unsigned long flags;
  1164. spin_lock_irqsave(&video->queue->irqlock, flags);
  1165. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1166. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1167. atomic_set(stopping, 0);
  1168. smp_mb();
  1169. return 0;
  1170. }
  1171. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1172. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1173. msecs_to_jiffies(1000))) {
  1174. atomic_set(stopping, 0);
  1175. smp_mb();
  1176. return -ETIMEDOUT;
  1177. }
  1178. }
  1179. return 0;
  1180. }
  1181. /*
  1182. * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
  1183. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1184. * @stopping: flag which tells module wants to stop
  1185. *
  1186. * This function checks if ISP submodule was stopping. In case of yes, it
  1187. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1188. * Returns 1 if it was stopping or 0 otherwise.
  1189. */
  1190. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1191. atomic_t *stopping)
  1192. {
  1193. if (atomic_cmpxchg(stopping, 1, 0)) {
  1194. wake_up(wait);
  1195. return 1;
  1196. }
  1197. return 0;
  1198. }
  1199. /* --------------------------------------------------------------------------
  1200. * Clock management
  1201. */
  1202. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1203. ISPCTRL_HIST_CLK_EN | \
  1204. ISPCTRL_RSZ_CLK_EN | \
  1205. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1206. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1207. static void __isp_subclk_update(struct isp_device *isp)
  1208. {
  1209. u32 clk = 0;
  1210. /* AEWB and AF share the same clock. */
  1211. if (isp->subclk_resources &
  1212. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1213. clk |= ISPCTRL_H3A_CLK_EN;
  1214. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1215. clk |= ISPCTRL_HIST_CLK_EN;
  1216. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1217. clk |= ISPCTRL_RSZ_CLK_EN;
  1218. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1219. * RAM as well.
  1220. */
  1221. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1222. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1223. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1224. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1225. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1226. ISPCTRL_CLKS_MASK, clk);
  1227. }
  1228. void omap3isp_subclk_enable(struct isp_device *isp,
  1229. enum isp_subclk_resource res)
  1230. {
  1231. isp->subclk_resources |= res;
  1232. __isp_subclk_update(isp);
  1233. }
  1234. void omap3isp_subclk_disable(struct isp_device *isp,
  1235. enum isp_subclk_resource res)
  1236. {
  1237. isp->subclk_resources &= ~res;
  1238. __isp_subclk_update(isp);
  1239. }
  1240. /*
  1241. * isp_enable_clocks - Enable ISP clocks
  1242. * @isp: OMAP3 ISP device
  1243. *
  1244. * Return 0 if successful, or clk_prepare_enable return value if any of them
  1245. * fails.
  1246. */
  1247. static int isp_enable_clocks(struct isp_device *isp)
  1248. {
  1249. int r;
  1250. unsigned long rate;
  1251. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1252. if (r) {
  1253. dev_err(isp->dev, "failed to enable cam_ick clock\n");
  1254. goto out_clk_enable_ick;
  1255. }
  1256. r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
  1257. if (r) {
  1258. dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
  1259. goto out_clk_enable_mclk;
  1260. }
  1261. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1262. if (r) {
  1263. dev_err(isp->dev, "failed to enable cam_mclk clock\n");
  1264. goto out_clk_enable_mclk;
  1265. }
  1266. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1267. if (rate != CM_CAM_MCLK_HZ)
  1268. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1269. " expected : %d\n"
  1270. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1271. r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1272. if (r) {
  1273. dev_err(isp->dev, "failed to enable csi2_fck clock\n");
  1274. goto out_clk_enable_csi2_fclk;
  1275. }
  1276. return 0;
  1277. out_clk_enable_csi2_fclk:
  1278. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1279. out_clk_enable_mclk:
  1280. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1281. out_clk_enable_ick:
  1282. return r;
  1283. }
  1284. /*
  1285. * isp_disable_clocks - Disable ISP clocks
  1286. * @isp: OMAP3 ISP device
  1287. */
  1288. static void isp_disable_clocks(struct isp_device *isp)
  1289. {
  1290. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1291. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1292. clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
  1293. }
  1294. static const char *isp_clocks[] = {
  1295. "cam_ick",
  1296. "cam_mclk",
  1297. "csi2_96m_fck",
  1298. "l3_ick",
  1299. };
  1300. static int isp_get_clocks(struct isp_device *isp)
  1301. {
  1302. struct clk *clk;
  1303. unsigned int i;
  1304. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1305. clk = devm_clk_get(isp->dev, isp_clocks[i]);
  1306. if (IS_ERR(clk)) {
  1307. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1308. return PTR_ERR(clk);
  1309. }
  1310. isp->clock[i] = clk;
  1311. }
  1312. return 0;
  1313. }
  1314. /*
  1315. * omap3isp_get - Acquire the ISP resource.
  1316. *
  1317. * Initializes the clocks for the first acquire.
  1318. *
  1319. * Increment the reference count on the ISP. If the first reference is taken,
  1320. * enable clocks and power-up all submodules.
  1321. *
  1322. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1323. */
  1324. static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
  1325. {
  1326. struct isp_device *__isp = isp;
  1327. if (isp == NULL)
  1328. return NULL;
  1329. mutex_lock(&isp->isp_mutex);
  1330. if (isp->ref_count > 0)
  1331. goto out;
  1332. if (isp_enable_clocks(isp) < 0) {
  1333. __isp = NULL;
  1334. goto out;
  1335. }
  1336. /* We don't want to restore context before saving it! */
  1337. if (isp->has_context)
  1338. isp_restore_ctx(isp);
  1339. if (irq)
  1340. isp_enable_interrupts(isp);
  1341. out:
  1342. if (__isp != NULL)
  1343. isp->ref_count++;
  1344. mutex_unlock(&isp->isp_mutex);
  1345. return __isp;
  1346. }
  1347. struct isp_device *omap3isp_get(struct isp_device *isp)
  1348. {
  1349. return __omap3isp_get(isp, true);
  1350. }
  1351. /*
  1352. * omap3isp_put - Release the ISP
  1353. *
  1354. * Decrement the reference count on the ISP. If the last reference is released,
  1355. * power-down all submodules, disable clocks and free temporary buffers.
  1356. */
  1357. void omap3isp_put(struct isp_device *isp)
  1358. {
  1359. if (isp == NULL)
  1360. return;
  1361. mutex_lock(&isp->isp_mutex);
  1362. BUG_ON(isp->ref_count == 0);
  1363. if (--isp->ref_count == 0) {
  1364. isp_disable_interrupts(isp);
  1365. if (isp->domain) {
  1366. isp_save_ctx(isp);
  1367. isp->has_context = 1;
  1368. }
  1369. /* Reset the ISP if an entity has failed to stop. This is the
  1370. * only way to recover from such conditions.
  1371. */
  1372. if (isp->crashed)
  1373. isp_reset(isp);
  1374. isp_disable_clocks(isp);
  1375. }
  1376. mutex_unlock(&isp->isp_mutex);
  1377. }
  1378. /* --------------------------------------------------------------------------
  1379. * Platform device driver
  1380. */
  1381. /*
  1382. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1383. * @isp: OMAP3 ISP device
  1384. */
  1385. #define ISP_PRINT_REGISTER(isp, name)\
  1386. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1387. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1388. #define SBL_PRINT_REGISTER(isp, name)\
  1389. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1390. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1391. void omap3isp_print_status(struct isp_device *isp)
  1392. {
  1393. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1394. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1395. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1396. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1397. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1398. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1399. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1400. ISP_PRINT_REGISTER(isp, CTRL);
  1401. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1402. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1403. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1404. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1405. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1406. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1407. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1408. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1409. SBL_PRINT_REGISTER(isp, PCR);
  1410. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1411. dev_dbg(isp->dev, "--------------------------------------------\n");
  1412. }
  1413. #ifdef CONFIG_PM
  1414. /*
  1415. * Power management support.
  1416. *
  1417. * As the ISP can't properly handle an input video stream interruption on a non
  1418. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1419. * suspended. However, as suspending the sensors can require a running clock,
  1420. * which can be provided by the ISP, the ISP can't be completely suspended
  1421. * before the sensor.
  1422. *
  1423. * To solve this problem power management support is split into prepare/complete
  1424. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1425. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1426. * resume(), and the the pipelines are restarted in complete().
  1427. *
  1428. * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
  1429. * yet.
  1430. */
  1431. static int isp_pm_prepare(struct device *dev)
  1432. {
  1433. struct isp_device *isp = dev_get_drvdata(dev);
  1434. int reset;
  1435. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1436. if (isp->ref_count == 0)
  1437. return 0;
  1438. reset = isp_suspend_modules(isp);
  1439. isp_disable_interrupts(isp);
  1440. isp_save_ctx(isp);
  1441. if (reset)
  1442. isp_reset(isp);
  1443. return 0;
  1444. }
  1445. static int isp_pm_suspend(struct device *dev)
  1446. {
  1447. struct isp_device *isp = dev_get_drvdata(dev);
  1448. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1449. if (isp->ref_count)
  1450. isp_disable_clocks(isp);
  1451. return 0;
  1452. }
  1453. static int isp_pm_resume(struct device *dev)
  1454. {
  1455. struct isp_device *isp = dev_get_drvdata(dev);
  1456. if (isp->ref_count == 0)
  1457. return 0;
  1458. return isp_enable_clocks(isp);
  1459. }
  1460. static void isp_pm_complete(struct device *dev)
  1461. {
  1462. struct isp_device *isp = dev_get_drvdata(dev);
  1463. if (isp->ref_count == 0)
  1464. return;
  1465. isp_restore_ctx(isp);
  1466. isp_enable_interrupts(isp);
  1467. isp_resume_modules(isp);
  1468. }
  1469. #else
  1470. #define isp_pm_prepare NULL
  1471. #define isp_pm_suspend NULL
  1472. #define isp_pm_resume NULL
  1473. #define isp_pm_complete NULL
  1474. #endif /* CONFIG_PM */
  1475. static void isp_unregister_entities(struct isp_device *isp)
  1476. {
  1477. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1478. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1479. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1480. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1481. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1482. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1483. omap3isp_stat_unregister_entities(&isp->isp_af);
  1484. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1485. v4l2_device_unregister(&isp->v4l2_dev);
  1486. media_device_unregister(&isp->media_dev);
  1487. }
  1488. /*
  1489. * isp_register_subdev_group - Register a group of subdevices
  1490. * @isp: OMAP3 ISP device
  1491. * @board_info: I2C subdevs board information array
  1492. *
  1493. * Register all I2C subdevices in the board_info array. The array must be
  1494. * terminated by a NULL entry, and the first entry must be the sensor.
  1495. *
  1496. * Return a pointer to the sensor media entity if it has been successfully
  1497. * registered, or NULL otherwise.
  1498. */
  1499. static struct v4l2_subdev *
  1500. isp_register_subdev_group(struct isp_device *isp,
  1501. struct isp_subdev_i2c_board_info *board_info)
  1502. {
  1503. struct v4l2_subdev *sensor = NULL;
  1504. unsigned int first;
  1505. if (board_info->board_info == NULL)
  1506. return NULL;
  1507. for (first = 1; board_info->board_info; ++board_info, first = 0) {
  1508. struct v4l2_subdev *subdev;
  1509. struct i2c_adapter *adapter;
  1510. adapter = i2c_get_adapter(board_info->i2c_adapter_id);
  1511. if (adapter == NULL) {
  1512. dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
  1513. "device %s\n", __func__,
  1514. board_info->i2c_adapter_id,
  1515. board_info->board_info->type);
  1516. continue;
  1517. }
  1518. subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
  1519. board_info->board_info, NULL);
  1520. if (subdev == NULL) {
  1521. dev_err(isp->dev, "%s: Unable to register subdev %s\n",
  1522. __func__, board_info->board_info->type);
  1523. continue;
  1524. }
  1525. if (first)
  1526. sensor = subdev;
  1527. }
  1528. return sensor;
  1529. }
  1530. static int isp_register_entities(struct isp_device *isp)
  1531. {
  1532. struct isp_platform_data *pdata = isp->pdata;
  1533. struct isp_v4l2_subdevs_group *subdevs;
  1534. int ret;
  1535. isp->media_dev.dev = isp->dev;
  1536. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1537. sizeof(isp->media_dev.model));
  1538. isp->media_dev.hw_revision = isp->revision;
  1539. isp->media_dev.link_notify = isp_pipeline_link_notify;
  1540. ret = media_device_register(&isp->media_dev);
  1541. if (ret < 0) {
  1542. dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
  1543. __func__, ret);
  1544. return ret;
  1545. }
  1546. isp->v4l2_dev.mdev = &isp->media_dev;
  1547. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1548. if (ret < 0) {
  1549. dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
  1550. __func__, ret);
  1551. goto done;
  1552. }
  1553. /* Register internal entities */
  1554. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1555. if (ret < 0)
  1556. goto done;
  1557. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1558. if (ret < 0)
  1559. goto done;
  1560. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1561. if (ret < 0)
  1562. goto done;
  1563. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1564. &isp->v4l2_dev);
  1565. if (ret < 0)
  1566. goto done;
  1567. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1568. if (ret < 0)
  1569. goto done;
  1570. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1571. if (ret < 0)
  1572. goto done;
  1573. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1574. if (ret < 0)
  1575. goto done;
  1576. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1577. if (ret < 0)
  1578. goto done;
  1579. /* Register external entities */
  1580. for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
  1581. struct v4l2_subdev *sensor;
  1582. struct media_entity *input;
  1583. unsigned int flags;
  1584. unsigned int pad;
  1585. unsigned int i;
  1586. sensor = isp_register_subdev_group(isp, subdevs->subdevs);
  1587. if (sensor == NULL)
  1588. continue;
  1589. sensor->host_priv = subdevs;
  1590. /* Connect the sensor to the correct interface module. Parallel
  1591. * sensors are connected directly to the CCDC, while serial
  1592. * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
  1593. * through CSIPHY1 or CSIPHY2.
  1594. */
  1595. switch (subdevs->interface) {
  1596. case ISP_INTERFACE_PARALLEL:
  1597. input = &isp->isp_ccdc.subdev.entity;
  1598. pad = CCDC_PAD_SINK;
  1599. flags = 0;
  1600. break;
  1601. case ISP_INTERFACE_CSI2A_PHY2:
  1602. input = &isp->isp_csi2a.subdev.entity;
  1603. pad = CSI2_PAD_SINK;
  1604. flags = MEDIA_LNK_FL_IMMUTABLE
  1605. | MEDIA_LNK_FL_ENABLED;
  1606. break;
  1607. case ISP_INTERFACE_CCP2B_PHY1:
  1608. case ISP_INTERFACE_CCP2B_PHY2:
  1609. input = &isp->isp_ccp2.subdev.entity;
  1610. pad = CCP2_PAD_SINK;
  1611. flags = 0;
  1612. break;
  1613. case ISP_INTERFACE_CSI2C_PHY1:
  1614. input = &isp->isp_csi2c.subdev.entity;
  1615. pad = CSI2_PAD_SINK;
  1616. flags = MEDIA_LNK_FL_IMMUTABLE
  1617. | MEDIA_LNK_FL_ENABLED;
  1618. break;
  1619. default:
  1620. dev_err(isp->dev, "%s: invalid interface type %u\n",
  1621. __func__, subdevs->interface);
  1622. ret = -EINVAL;
  1623. goto done;
  1624. }
  1625. for (i = 0; i < sensor->entity.num_pads; i++) {
  1626. if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
  1627. break;
  1628. }
  1629. if (i == sensor->entity.num_pads) {
  1630. dev_err(isp->dev,
  1631. "%s: no source pad in external entity\n",
  1632. __func__);
  1633. ret = -EINVAL;
  1634. goto done;
  1635. }
  1636. ret = media_entity_create_link(&sensor->entity, i, input, pad,
  1637. flags);
  1638. if (ret < 0)
  1639. goto done;
  1640. }
  1641. ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1642. done:
  1643. if (ret < 0)
  1644. isp_unregister_entities(isp);
  1645. return ret;
  1646. }
  1647. static void isp_cleanup_modules(struct isp_device *isp)
  1648. {
  1649. omap3isp_h3a_aewb_cleanup(isp);
  1650. omap3isp_h3a_af_cleanup(isp);
  1651. omap3isp_hist_cleanup(isp);
  1652. omap3isp_resizer_cleanup(isp);
  1653. omap3isp_preview_cleanup(isp);
  1654. omap3isp_ccdc_cleanup(isp);
  1655. omap3isp_ccp2_cleanup(isp);
  1656. omap3isp_csi2_cleanup(isp);
  1657. }
  1658. static int isp_initialize_modules(struct isp_device *isp)
  1659. {
  1660. int ret;
  1661. ret = omap3isp_csiphy_init(isp);
  1662. if (ret < 0) {
  1663. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1664. goto error_csiphy;
  1665. }
  1666. ret = omap3isp_csi2_init(isp);
  1667. if (ret < 0) {
  1668. dev_err(isp->dev, "CSI2 initialization failed\n");
  1669. goto error_csi2;
  1670. }
  1671. ret = omap3isp_ccp2_init(isp);
  1672. if (ret < 0) {
  1673. dev_err(isp->dev, "CCP2 initialization failed\n");
  1674. goto error_ccp2;
  1675. }
  1676. ret = omap3isp_ccdc_init(isp);
  1677. if (ret < 0) {
  1678. dev_err(isp->dev, "CCDC initialization failed\n");
  1679. goto error_ccdc;
  1680. }
  1681. ret = omap3isp_preview_init(isp);
  1682. if (ret < 0) {
  1683. dev_err(isp->dev, "Preview initialization failed\n");
  1684. goto error_preview;
  1685. }
  1686. ret = omap3isp_resizer_init(isp);
  1687. if (ret < 0) {
  1688. dev_err(isp->dev, "Resizer initialization failed\n");
  1689. goto error_resizer;
  1690. }
  1691. ret = omap3isp_hist_init(isp);
  1692. if (ret < 0) {
  1693. dev_err(isp->dev, "Histogram initialization failed\n");
  1694. goto error_hist;
  1695. }
  1696. ret = omap3isp_h3a_aewb_init(isp);
  1697. if (ret < 0) {
  1698. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1699. goto error_h3a_aewb;
  1700. }
  1701. ret = omap3isp_h3a_af_init(isp);
  1702. if (ret < 0) {
  1703. dev_err(isp->dev, "H3A AF initialization failed\n");
  1704. goto error_h3a_af;
  1705. }
  1706. /* Connect the submodules. */
  1707. ret = media_entity_create_link(
  1708. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1709. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1710. if (ret < 0)
  1711. goto error_link;
  1712. ret = media_entity_create_link(
  1713. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1714. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1715. if (ret < 0)
  1716. goto error_link;
  1717. ret = media_entity_create_link(
  1718. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1719. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1720. if (ret < 0)
  1721. goto error_link;
  1722. ret = media_entity_create_link(
  1723. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1724. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1725. if (ret < 0)
  1726. goto error_link;
  1727. ret = media_entity_create_link(
  1728. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1729. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1730. if (ret < 0)
  1731. goto error_link;
  1732. ret = media_entity_create_link(
  1733. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1734. &isp->isp_aewb.subdev.entity, 0,
  1735. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1736. if (ret < 0)
  1737. goto error_link;
  1738. ret = media_entity_create_link(
  1739. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1740. &isp->isp_af.subdev.entity, 0,
  1741. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1742. if (ret < 0)
  1743. goto error_link;
  1744. ret = media_entity_create_link(
  1745. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1746. &isp->isp_hist.subdev.entity, 0,
  1747. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1748. if (ret < 0)
  1749. goto error_link;
  1750. return 0;
  1751. error_link:
  1752. omap3isp_h3a_af_cleanup(isp);
  1753. error_h3a_af:
  1754. omap3isp_h3a_aewb_cleanup(isp);
  1755. error_h3a_aewb:
  1756. omap3isp_hist_cleanup(isp);
  1757. error_hist:
  1758. omap3isp_resizer_cleanup(isp);
  1759. error_resizer:
  1760. omap3isp_preview_cleanup(isp);
  1761. error_preview:
  1762. omap3isp_ccdc_cleanup(isp);
  1763. error_ccdc:
  1764. omap3isp_ccp2_cleanup(isp);
  1765. error_ccp2:
  1766. omap3isp_csi2_cleanup(isp);
  1767. error_csi2:
  1768. error_csiphy:
  1769. return ret;
  1770. }
  1771. /*
  1772. * isp_remove - Remove ISP platform device
  1773. * @pdev: Pointer to ISP platform device
  1774. *
  1775. * Always returns 0.
  1776. */
  1777. static int isp_remove(struct platform_device *pdev)
  1778. {
  1779. struct isp_device *isp = platform_get_drvdata(pdev);
  1780. isp_unregister_entities(isp);
  1781. isp_cleanup_modules(isp);
  1782. isp_xclk_cleanup(isp);
  1783. __omap3isp_get(isp, false);
  1784. iommu_detach_device(isp->domain, &pdev->dev);
  1785. iommu_domain_free(isp->domain);
  1786. isp->domain = NULL;
  1787. omap3isp_put(isp);
  1788. return 0;
  1789. }
  1790. static int isp_map_mem_resource(struct platform_device *pdev,
  1791. struct isp_device *isp,
  1792. enum isp_mem_resources res)
  1793. {
  1794. struct resource *mem;
  1795. /* request the mem region for the camera registers */
  1796. mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
  1797. if (!mem) {
  1798. dev_err(isp->dev, "no mem resource?\n");
  1799. return -ENODEV;
  1800. }
  1801. if (!devm_request_mem_region(isp->dev, mem->start, resource_size(mem),
  1802. pdev->name)) {
  1803. dev_err(isp->dev,
  1804. "cannot reserve camera register I/O region\n");
  1805. return -ENODEV;
  1806. }
  1807. isp->mmio_base_phys[res] = mem->start;
  1808. isp->mmio_size[res] = resource_size(mem);
  1809. /* map the region */
  1810. isp->mmio_base[res] = devm_ioremap_nocache(isp->dev,
  1811. isp->mmio_base_phys[res],
  1812. isp->mmio_size[res]);
  1813. if (!isp->mmio_base[res]) {
  1814. dev_err(isp->dev, "cannot map camera register I/O region\n");
  1815. return -ENODEV;
  1816. }
  1817. return 0;
  1818. }
  1819. /*
  1820. * isp_probe - Probe ISP platform device
  1821. * @pdev: Pointer to ISP platform device
  1822. *
  1823. * Returns 0 if successful,
  1824. * -ENOMEM if no memory available,
  1825. * -ENODEV if no platform device resources found
  1826. * or no space for remapping registers,
  1827. * -EINVAL if couldn't install ISR,
  1828. * or clk_get return error value.
  1829. */
  1830. static int isp_probe(struct platform_device *pdev)
  1831. {
  1832. struct isp_platform_data *pdata = pdev->dev.platform_data;
  1833. struct isp_device *isp;
  1834. int ret;
  1835. int i, m;
  1836. if (pdata == NULL)
  1837. return -EINVAL;
  1838. isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
  1839. if (!isp) {
  1840. dev_err(&pdev->dev, "could not allocate memory\n");
  1841. return -ENOMEM;
  1842. }
  1843. isp->autoidle = autoidle;
  1844. mutex_init(&isp->isp_mutex);
  1845. spin_lock_init(&isp->stat_lock);
  1846. isp->dev = &pdev->dev;
  1847. isp->pdata = pdata;
  1848. isp->ref_count = 0;
  1849. isp->raw_dmamask = DMA_BIT_MASK(32);
  1850. isp->dev->dma_mask = &isp->raw_dmamask;
  1851. isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  1852. platform_set_drvdata(pdev, isp);
  1853. /* Regulators */
  1854. isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
  1855. isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
  1856. /* Clocks
  1857. *
  1858. * The ISP clock tree is revision-dependent. We thus need to enable ICLK
  1859. * manually to read the revision before calling __omap3isp_get().
  1860. */
  1861. ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
  1862. if (ret < 0)
  1863. goto error;
  1864. ret = isp_get_clocks(isp);
  1865. if (ret < 0)
  1866. goto error;
  1867. ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1868. if (ret < 0)
  1869. goto error;
  1870. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  1871. dev_info(isp->dev, "Revision %d.%d found\n",
  1872. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  1873. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  1874. if (__omap3isp_get(isp, false) == NULL) {
  1875. ret = -ENODEV;
  1876. goto error;
  1877. }
  1878. ret = isp_reset(isp);
  1879. if (ret < 0)
  1880. goto error_isp;
  1881. ret = isp_xclk_init(isp);
  1882. if (ret < 0)
  1883. goto error_isp;
  1884. /* Memory resources */
  1885. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  1886. if (isp->revision == isp_res_maps[m].isp_rev)
  1887. break;
  1888. if (m == ARRAY_SIZE(isp_res_maps)) {
  1889. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  1890. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  1891. ret = -ENODEV;
  1892. goto error_isp;
  1893. }
  1894. for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
  1895. if (isp_res_maps[m].map & 1 << i) {
  1896. ret = isp_map_mem_resource(pdev, isp, i);
  1897. if (ret)
  1898. goto error_isp;
  1899. }
  1900. }
  1901. isp->domain = iommu_domain_alloc(pdev->dev.bus);
  1902. if (!isp->domain) {
  1903. dev_err(isp->dev, "can't alloc iommu domain\n");
  1904. ret = -ENOMEM;
  1905. goto error_isp;
  1906. }
  1907. ret = iommu_attach_device(isp->domain, &pdev->dev);
  1908. if (ret) {
  1909. dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
  1910. ret = -EPROBE_DEFER;
  1911. goto free_domain;
  1912. }
  1913. /* Interrupt */
  1914. isp->irq_num = platform_get_irq(pdev, 0);
  1915. if (isp->irq_num <= 0) {
  1916. dev_err(isp->dev, "No IRQ resource\n");
  1917. ret = -ENODEV;
  1918. goto detach_dev;
  1919. }
  1920. if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
  1921. "OMAP3 ISP", isp)) {
  1922. dev_err(isp->dev, "Unable to request IRQ\n");
  1923. ret = -EINVAL;
  1924. goto detach_dev;
  1925. }
  1926. /* Entities */
  1927. ret = isp_initialize_modules(isp);
  1928. if (ret < 0)
  1929. goto detach_dev;
  1930. ret = isp_register_entities(isp);
  1931. if (ret < 0)
  1932. goto error_modules;
  1933. isp_core_init(isp, 1);
  1934. omap3isp_put(isp);
  1935. return 0;
  1936. error_modules:
  1937. isp_cleanup_modules(isp);
  1938. detach_dev:
  1939. iommu_detach_device(isp->domain, &pdev->dev);
  1940. free_domain:
  1941. iommu_domain_free(isp->domain);
  1942. isp->domain = NULL;
  1943. error_isp:
  1944. isp_xclk_cleanup(isp);
  1945. omap3isp_put(isp);
  1946. error:
  1947. mutex_destroy(&isp->isp_mutex);
  1948. return ret;
  1949. }
  1950. static const struct dev_pm_ops omap3isp_pm_ops = {
  1951. .prepare = isp_pm_prepare,
  1952. .suspend = isp_pm_suspend,
  1953. .resume = isp_pm_resume,
  1954. .complete = isp_pm_complete,
  1955. };
  1956. static struct platform_device_id omap3isp_id_table[] = {
  1957. { "omap3isp", 0 },
  1958. { },
  1959. };
  1960. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  1961. static struct platform_driver omap3isp_driver = {
  1962. .probe = isp_probe,
  1963. .remove = isp_remove,
  1964. .id_table = omap3isp_id_table,
  1965. .driver = {
  1966. .owner = THIS_MODULE,
  1967. .name = "omap3isp",
  1968. .pm = &omap3isp_pm_ops,
  1969. },
  1970. };
  1971. module_platform_driver(omap3isp_driver);
  1972. MODULE_AUTHOR("Nokia Corporation");
  1973. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  1974. MODULE_LICENSE("GPL");
  1975. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);