adv7180.c 18 KB

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  1. /*
  2. * adv7180.c Analog Devices ADV7180 video decoder driver
  3. * Copyright (c) 2009 Intel Corporation
  4. * Copyright (C) 2013 Cogent Embedded, Inc.
  5. * Copyright (C) 2013 Renesas Solutions Corp.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/errno.h>
  23. #include <linux/kernel.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/i2c.h>
  26. #include <linux/slab.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <linux/videodev2.h>
  29. #include <media/v4l2-device.h>
  30. #include <media/v4l2-ctrls.h>
  31. #include <linux/mutex.h>
  32. #define ADV7180_INPUT_CONTROL_REG 0x00
  33. #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM 0x00
  34. #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM_PED 0x10
  35. #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_J_SECAM 0x20
  36. #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_M_SECAM 0x30
  37. #define ADV7180_INPUT_CONTROL_NTSC_J 0x40
  38. #define ADV7180_INPUT_CONTROL_NTSC_M 0x50
  39. #define ADV7180_INPUT_CONTROL_PAL60 0x60
  40. #define ADV7180_INPUT_CONTROL_NTSC_443 0x70
  41. #define ADV7180_INPUT_CONTROL_PAL_BG 0x80
  42. #define ADV7180_INPUT_CONTROL_PAL_N 0x90
  43. #define ADV7180_INPUT_CONTROL_PAL_M 0xa0
  44. #define ADV7180_INPUT_CONTROL_PAL_M_PED 0xb0
  45. #define ADV7180_INPUT_CONTROL_PAL_COMB_N 0xc0
  46. #define ADV7180_INPUT_CONTROL_PAL_COMB_N_PED 0xd0
  47. #define ADV7180_INPUT_CONTROL_PAL_SECAM 0xe0
  48. #define ADV7180_INPUT_CONTROL_PAL_SECAM_PED 0xf0
  49. #define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
  50. #define ADV7180_EXTENDED_OUTPUT_CONTROL_REG 0x04
  51. #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
  52. #define ADV7180_AUTODETECT_ENABLE_REG 0x07
  53. #define ADV7180_AUTODETECT_DEFAULT 0x7f
  54. /* Contrast */
  55. #define ADV7180_CON_REG 0x08 /*Unsigned */
  56. #define ADV7180_CON_MIN 0
  57. #define ADV7180_CON_DEF 128
  58. #define ADV7180_CON_MAX 255
  59. /* Brightness*/
  60. #define ADV7180_BRI_REG 0x0a /*Signed */
  61. #define ADV7180_BRI_MIN -128
  62. #define ADV7180_BRI_DEF 0
  63. #define ADV7180_BRI_MAX 127
  64. /* Hue */
  65. #define ADV7180_HUE_REG 0x0b /*Signed, inverted */
  66. #define ADV7180_HUE_MIN -127
  67. #define ADV7180_HUE_DEF 0
  68. #define ADV7180_HUE_MAX 128
  69. #define ADV7180_ADI_CTRL_REG 0x0e
  70. #define ADV7180_ADI_CTRL_IRQ_SPACE 0x20
  71. #define ADV7180_PWR_MAN_REG 0x0f
  72. #define ADV7180_PWR_MAN_ON 0x04
  73. #define ADV7180_PWR_MAN_OFF 0x24
  74. #define ADV7180_PWR_MAN_RES 0x80
  75. #define ADV7180_STATUS1_REG 0x10
  76. #define ADV7180_STATUS1_IN_LOCK 0x01
  77. #define ADV7180_STATUS1_AUTOD_MASK 0x70
  78. #define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
  79. #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
  80. #define ADV7180_STATUS1_AUTOD_PAL_M 0x20
  81. #define ADV7180_STATUS1_AUTOD_PAL_60 0x30
  82. #define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
  83. #define ADV7180_STATUS1_AUTOD_SECAM 0x50
  84. #define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
  85. #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
  86. #define ADV7180_IDENT_REG 0x11
  87. #define ADV7180_ID_7180 0x18
  88. #define ADV7180_ICONF1_ADI 0x40
  89. #define ADV7180_ICONF1_ACTIVE_LOW 0x01
  90. #define ADV7180_ICONF1_PSYNC_ONLY 0x10
  91. #define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
  92. /* Saturation */
  93. #define ADV7180_SD_SAT_CB_REG 0xe3 /*Unsigned */
  94. #define ADV7180_SD_SAT_CR_REG 0xe4 /*Unsigned */
  95. #define ADV7180_SAT_MIN 0
  96. #define ADV7180_SAT_DEF 128
  97. #define ADV7180_SAT_MAX 255
  98. #define ADV7180_IRQ1_LOCK 0x01
  99. #define ADV7180_IRQ1_UNLOCK 0x02
  100. #define ADV7180_ISR1_ADI 0x42
  101. #define ADV7180_ICR1_ADI 0x43
  102. #define ADV7180_IMR1_ADI 0x44
  103. #define ADV7180_IMR2_ADI 0x48
  104. #define ADV7180_IRQ3_AD_CHANGE 0x08
  105. #define ADV7180_ISR3_ADI 0x4A
  106. #define ADV7180_ICR3_ADI 0x4B
  107. #define ADV7180_IMR3_ADI 0x4C
  108. #define ADV7180_IMR4_ADI 0x50
  109. #define ADV7180_NTSC_V_BIT_END_REG 0xE6
  110. #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
  111. struct adv7180_state {
  112. struct v4l2_ctrl_handler ctrl_hdl;
  113. struct v4l2_subdev sd;
  114. struct work_struct work;
  115. struct mutex mutex; /* mutual excl. when accessing chip */
  116. int irq;
  117. v4l2_std_id curr_norm;
  118. bool autodetect;
  119. u8 input;
  120. };
  121. #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
  122. struct adv7180_state, \
  123. ctrl_hdl)->sd)
  124. static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
  125. {
  126. /* in case V4L2_IN_ST_NO_SIGNAL */
  127. if (!(status1 & ADV7180_STATUS1_IN_LOCK))
  128. return V4L2_STD_UNKNOWN;
  129. switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
  130. case ADV7180_STATUS1_AUTOD_NTSM_M_J:
  131. return V4L2_STD_NTSC;
  132. case ADV7180_STATUS1_AUTOD_NTSC_4_43:
  133. return V4L2_STD_NTSC_443;
  134. case ADV7180_STATUS1_AUTOD_PAL_M:
  135. return V4L2_STD_PAL_M;
  136. case ADV7180_STATUS1_AUTOD_PAL_60:
  137. return V4L2_STD_PAL_60;
  138. case ADV7180_STATUS1_AUTOD_PAL_B_G:
  139. return V4L2_STD_PAL;
  140. case ADV7180_STATUS1_AUTOD_SECAM:
  141. return V4L2_STD_SECAM;
  142. case ADV7180_STATUS1_AUTOD_PAL_COMB:
  143. return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
  144. case ADV7180_STATUS1_AUTOD_SECAM_525:
  145. return V4L2_STD_SECAM;
  146. default:
  147. return V4L2_STD_UNKNOWN;
  148. }
  149. }
  150. static int v4l2_std_to_adv7180(v4l2_std_id std)
  151. {
  152. if (std == V4L2_STD_PAL_60)
  153. return ADV7180_INPUT_CONTROL_PAL60;
  154. if (std == V4L2_STD_NTSC_443)
  155. return ADV7180_INPUT_CONTROL_NTSC_443;
  156. if (std == V4L2_STD_PAL_N)
  157. return ADV7180_INPUT_CONTROL_PAL_N;
  158. if (std == V4L2_STD_PAL_M)
  159. return ADV7180_INPUT_CONTROL_PAL_M;
  160. if (std == V4L2_STD_PAL_Nc)
  161. return ADV7180_INPUT_CONTROL_PAL_COMB_N;
  162. if (std & V4L2_STD_PAL)
  163. return ADV7180_INPUT_CONTROL_PAL_BG;
  164. if (std & V4L2_STD_NTSC)
  165. return ADV7180_INPUT_CONTROL_NTSC_M;
  166. if (std & V4L2_STD_SECAM)
  167. return ADV7180_INPUT_CONTROL_PAL_SECAM;
  168. return -EINVAL;
  169. }
  170. static u32 adv7180_status_to_v4l2(u8 status1)
  171. {
  172. if (!(status1 & ADV7180_STATUS1_IN_LOCK))
  173. return V4L2_IN_ST_NO_SIGNAL;
  174. return 0;
  175. }
  176. static int __adv7180_status(struct i2c_client *client, u32 *status,
  177. v4l2_std_id *std)
  178. {
  179. int status1 = i2c_smbus_read_byte_data(client, ADV7180_STATUS1_REG);
  180. if (status1 < 0)
  181. return status1;
  182. if (status)
  183. *status = adv7180_status_to_v4l2(status1);
  184. if (std)
  185. *std = adv7180_std_to_v4l2(status1);
  186. return 0;
  187. }
  188. static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
  189. {
  190. return container_of(sd, struct adv7180_state, sd);
  191. }
  192. static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
  193. {
  194. struct adv7180_state *state = to_state(sd);
  195. int err = mutex_lock_interruptible(&state->mutex);
  196. if (err)
  197. return err;
  198. /* when we are interrupt driven we know the state */
  199. if (!state->autodetect || state->irq > 0)
  200. *std = state->curr_norm;
  201. else
  202. err = __adv7180_status(v4l2_get_subdevdata(sd), NULL, std);
  203. mutex_unlock(&state->mutex);
  204. return err;
  205. }
  206. static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
  207. u32 output, u32 config)
  208. {
  209. struct adv7180_state *state = to_state(sd);
  210. int ret = mutex_lock_interruptible(&state->mutex);
  211. struct i2c_client *client = v4l2_get_subdevdata(sd);
  212. if (ret)
  213. return ret;
  214. /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
  215. * all inputs and let the card driver take care of validation
  216. */
  217. if ((input & ADV7180_INPUT_CONTROL_INSEL_MASK) != input)
  218. goto out;
  219. ret = i2c_smbus_read_byte_data(client, ADV7180_INPUT_CONTROL_REG);
  220. if (ret < 0)
  221. goto out;
  222. ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
  223. ret = i2c_smbus_write_byte_data(client,
  224. ADV7180_INPUT_CONTROL_REG, ret | input);
  225. state->input = input;
  226. out:
  227. mutex_unlock(&state->mutex);
  228. return ret;
  229. }
  230. static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
  231. {
  232. struct adv7180_state *state = to_state(sd);
  233. int ret = mutex_lock_interruptible(&state->mutex);
  234. if (ret)
  235. return ret;
  236. ret = __adv7180_status(v4l2_get_subdevdata(sd), status, NULL);
  237. mutex_unlock(&state->mutex);
  238. return ret;
  239. }
  240. static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  241. {
  242. struct adv7180_state *state = to_state(sd);
  243. struct i2c_client *client = v4l2_get_subdevdata(sd);
  244. int ret = mutex_lock_interruptible(&state->mutex);
  245. if (ret)
  246. return ret;
  247. /* all standards -> autodetect */
  248. if (std == V4L2_STD_ALL) {
  249. ret =
  250. i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
  251. ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM
  252. | state->input);
  253. if (ret < 0)
  254. goto out;
  255. __adv7180_status(client, NULL, &state->curr_norm);
  256. state->autodetect = true;
  257. } else {
  258. ret = v4l2_std_to_adv7180(std);
  259. if (ret < 0)
  260. goto out;
  261. ret = i2c_smbus_write_byte_data(client,
  262. ADV7180_INPUT_CONTROL_REG,
  263. ret | state->input);
  264. if (ret < 0)
  265. goto out;
  266. state->curr_norm = std;
  267. state->autodetect = false;
  268. }
  269. ret = 0;
  270. out:
  271. mutex_unlock(&state->mutex);
  272. return ret;
  273. }
  274. static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
  275. {
  276. struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
  277. struct adv7180_state *state = to_state(sd);
  278. struct i2c_client *client = v4l2_get_subdevdata(sd);
  279. int ret = mutex_lock_interruptible(&state->mutex);
  280. int val;
  281. if (ret)
  282. return ret;
  283. val = ctrl->val;
  284. switch (ctrl->id) {
  285. case V4L2_CID_BRIGHTNESS:
  286. ret = i2c_smbus_write_byte_data(client, ADV7180_BRI_REG, val);
  287. break;
  288. case V4L2_CID_HUE:
  289. /*Hue is inverted according to HSL chart */
  290. ret = i2c_smbus_write_byte_data(client, ADV7180_HUE_REG, -val);
  291. break;
  292. case V4L2_CID_CONTRAST:
  293. ret = i2c_smbus_write_byte_data(client, ADV7180_CON_REG, val);
  294. break;
  295. case V4L2_CID_SATURATION:
  296. /*
  297. *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
  298. *Let's not confuse the user, everybody understands saturation
  299. */
  300. ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CB_REG,
  301. val);
  302. if (ret < 0)
  303. break;
  304. ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CR_REG,
  305. val);
  306. break;
  307. default:
  308. ret = -EINVAL;
  309. }
  310. mutex_unlock(&state->mutex);
  311. return ret;
  312. }
  313. static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
  314. .s_ctrl = adv7180_s_ctrl,
  315. };
  316. static int adv7180_init_controls(struct adv7180_state *state)
  317. {
  318. v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
  319. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  320. V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
  321. ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
  322. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  323. V4L2_CID_CONTRAST, ADV7180_CON_MIN,
  324. ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
  325. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  326. V4L2_CID_SATURATION, ADV7180_SAT_MIN,
  327. ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
  328. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  329. V4L2_CID_HUE, ADV7180_HUE_MIN,
  330. ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
  331. state->sd.ctrl_handler = &state->ctrl_hdl;
  332. if (state->ctrl_hdl.error) {
  333. int err = state->ctrl_hdl.error;
  334. v4l2_ctrl_handler_free(&state->ctrl_hdl);
  335. return err;
  336. }
  337. v4l2_ctrl_handler_setup(&state->ctrl_hdl);
  338. return 0;
  339. }
  340. static void adv7180_exit_controls(struct adv7180_state *state)
  341. {
  342. v4l2_ctrl_handler_free(&state->ctrl_hdl);
  343. }
  344. static int adv7180_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
  345. enum v4l2_mbus_pixelcode *code)
  346. {
  347. if (index > 0)
  348. return -EINVAL;
  349. *code = V4L2_MBUS_FMT_YUYV8_2X8;
  350. return 0;
  351. }
  352. static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
  353. struct v4l2_mbus_framefmt *fmt)
  354. {
  355. struct adv7180_state *state = to_state(sd);
  356. fmt->code = V4L2_MBUS_FMT_YUYV8_2X8;
  357. fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
  358. fmt->field = V4L2_FIELD_INTERLACED;
  359. fmt->width = 720;
  360. fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
  361. return 0;
  362. }
  363. static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
  364. struct v4l2_mbus_config *cfg)
  365. {
  366. /*
  367. * The ADV7180 sensor supports BT.601/656 output modes.
  368. * The BT.656 is default and not yet configurable by s/w.
  369. */
  370. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  371. V4L2_MBUS_DATA_ACTIVE_HIGH;
  372. cfg->type = V4L2_MBUS_BT656;
  373. return 0;
  374. }
  375. static const struct v4l2_subdev_video_ops adv7180_video_ops = {
  376. .querystd = adv7180_querystd,
  377. .g_input_status = adv7180_g_input_status,
  378. .s_routing = adv7180_s_routing,
  379. .enum_mbus_fmt = adv7180_enum_mbus_fmt,
  380. .try_mbus_fmt = adv7180_mbus_fmt,
  381. .g_mbus_fmt = adv7180_mbus_fmt,
  382. .s_mbus_fmt = adv7180_mbus_fmt,
  383. .g_mbus_config = adv7180_g_mbus_config,
  384. };
  385. static const struct v4l2_subdev_core_ops adv7180_core_ops = {
  386. .s_std = adv7180_s_std,
  387. };
  388. static const struct v4l2_subdev_ops adv7180_ops = {
  389. .core = &adv7180_core_ops,
  390. .video = &adv7180_video_ops,
  391. };
  392. static void adv7180_work(struct work_struct *work)
  393. {
  394. struct adv7180_state *state = container_of(work, struct adv7180_state,
  395. work);
  396. struct i2c_client *client = v4l2_get_subdevdata(&state->sd);
  397. u8 isr3;
  398. mutex_lock(&state->mutex);
  399. i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
  400. ADV7180_ADI_CTRL_IRQ_SPACE);
  401. isr3 = i2c_smbus_read_byte_data(client, ADV7180_ISR3_ADI);
  402. /* clear */
  403. i2c_smbus_write_byte_data(client, ADV7180_ICR3_ADI, isr3);
  404. i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, 0);
  405. if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
  406. __adv7180_status(client, NULL, &state->curr_norm);
  407. mutex_unlock(&state->mutex);
  408. enable_irq(state->irq);
  409. }
  410. static irqreturn_t adv7180_irq(int irq, void *devid)
  411. {
  412. struct adv7180_state *state = devid;
  413. schedule_work(&state->work);
  414. disable_irq_nosync(state->irq);
  415. return IRQ_HANDLED;
  416. }
  417. static int init_device(struct i2c_client *client, struct adv7180_state *state)
  418. {
  419. int ret;
  420. /* Initialize adv7180 */
  421. /* Enable autodetection */
  422. if (state->autodetect) {
  423. ret =
  424. i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
  425. ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM
  426. | state->input);
  427. if (ret < 0)
  428. return ret;
  429. ret =
  430. i2c_smbus_write_byte_data(client,
  431. ADV7180_AUTODETECT_ENABLE_REG,
  432. ADV7180_AUTODETECT_DEFAULT);
  433. if (ret < 0)
  434. return ret;
  435. } else {
  436. ret = v4l2_std_to_adv7180(state->curr_norm);
  437. if (ret < 0)
  438. return ret;
  439. ret =
  440. i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
  441. ret | state->input);
  442. if (ret < 0)
  443. return ret;
  444. }
  445. /* ITU-R BT.656-4 compatible */
  446. ret = i2c_smbus_write_byte_data(client,
  447. ADV7180_EXTENDED_OUTPUT_CONTROL_REG,
  448. ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
  449. if (ret < 0)
  450. return ret;
  451. /* Manually set V bit end position in NTSC mode */
  452. ret = i2c_smbus_write_byte_data(client,
  453. ADV7180_NTSC_V_BIT_END_REG,
  454. ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
  455. if (ret < 0)
  456. return ret;
  457. /* read current norm */
  458. __adv7180_status(client, NULL, &state->curr_norm);
  459. /* register for interrupts */
  460. if (state->irq > 0) {
  461. ret = request_irq(state->irq, adv7180_irq, 0, KBUILD_MODNAME,
  462. state);
  463. if (ret)
  464. return ret;
  465. ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
  466. ADV7180_ADI_CTRL_IRQ_SPACE);
  467. if (ret < 0)
  468. return ret;
  469. /* config the Interrupt pin to be active low */
  470. ret = i2c_smbus_write_byte_data(client, ADV7180_ICONF1_ADI,
  471. ADV7180_ICONF1_ACTIVE_LOW |
  472. ADV7180_ICONF1_PSYNC_ONLY);
  473. if (ret < 0)
  474. return ret;
  475. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR1_ADI, 0);
  476. if (ret < 0)
  477. return ret;
  478. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR2_ADI, 0);
  479. if (ret < 0)
  480. return ret;
  481. /* enable AD change interrupts interrupts */
  482. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR3_ADI,
  483. ADV7180_IRQ3_AD_CHANGE);
  484. if (ret < 0)
  485. return ret;
  486. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR4_ADI, 0);
  487. if (ret < 0)
  488. return ret;
  489. ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
  490. 0);
  491. if (ret < 0)
  492. return ret;
  493. }
  494. return 0;
  495. }
  496. static int adv7180_probe(struct i2c_client *client,
  497. const struct i2c_device_id *id)
  498. {
  499. struct adv7180_state *state;
  500. struct v4l2_subdev *sd;
  501. int ret;
  502. /* Check if the adapter supports the needed features */
  503. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  504. return -EIO;
  505. v4l_info(client, "chip found @ 0x%02x (%s)\n",
  506. client->addr, client->adapter->name);
  507. state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
  508. if (state == NULL) {
  509. ret = -ENOMEM;
  510. goto err;
  511. }
  512. state->irq = client->irq;
  513. INIT_WORK(&state->work, adv7180_work);
  514. mutex_init(&state->mutex);
  515. state->autodetect = true;
  516. state->input = 0;
  517. sd = &state->sd;
  518. v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
  519. ret = adv7180_init_controls(state);
  520. if (ret)
  521. goto err_unreg_subdev;
  522. ret = init_device(client, state);
  523. if (ret)
  524. goto err_free_ctrl;
  525. return 0;
  526. err_free_ctrl:
  527. adv7180_exit_controls(state);
  528. err_unreg_subdev:
  529. mutex_destroy(&state->mutex);
  530. v4l2_device_unregister_subdev(sd);
  531. err:
  532. printk(KERN_ERR KBUILD_MODNAME ": Failed to probe: %d\n", ret);
  533. return ret;
  534. }
  535. static int adv7180_remove(struct i2c_client *client)
  536. {
  537. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  538. struct adv7180_state *state = to_state(sd);
  539. if (state->irq > 0) {
  540. free_irq(client->irq, state);
  541. if (cancel_work_sync(&state->work)) {
  542. /*
  543. * Work was pending, therefore we need to enable
  544. * IRQ here to balance the disable_irq() done in the
  545. * interrupt handler.
  546. */
  547. enable_irq(state->irq);
  548. }
  549. }
  550. mutex_destroy(&state->mutex);
  551. v4l2_device_unregister_subdev(sd);
  552. return 0;
  553. }
  554. static const struct i2c_device_id adv7180_id[] = {
  555. {KBUILD_MODNAME, 0},
  556. {},
  557. };
  558. #ifdef CONFIG_PM_SLEEP
  559. static int adv7180_suspend(struct device *dev)
  560. {
  561. struct i2c_client *client = to_i2c_client(dev);
  562. int ret;
  563. ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG,
  564. ADV7180_PWR_MAN_OFF);
  565. if (ret < 0)
  566. return ret;
  567. return 0;
  568. }
  569. static int adv7180_resume(struct device *dev)
  570. {
  571. struct i2c_client *client = to_i2c_client(dev);
  572. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  573. struct adv7180_state *state = to_state(sd);
  574. int ret;
  575. ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG,
  576. ADV7180_PWR_MAN_ON);
  577. if (ret < 0)
  578. return ret;
  579. ret = init_device(client, state);
  580. if (ret < 0)
  581. return ret;
  582. return 0;
  583. }
  584. static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
  585. #define ADV7180_PM_OPS (&adv7180_pm_ops)
  586. #else
  587. #define ADV7180_PM_OPS NULL
  588. #endif
  589. MODULE_DEVICE_TABLE(i2c, adv7180_id);
  590. static struct i2c_driver adv7180_driver = {
  591. .driver = {
  592. .owner = THIS_MODULE,
  593. .name = KBUILD_MODNAME,
  594. .pm = ADV7180_PM_OPS,
  595. },
  596. .probe = adv7180_probe,
  597. .remove = adv7180_remove,
  598. .id_table = adv7180_id,
  599. };
  600. module_i2c_driver(adv7180_driver);
  601. MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
  602. MODULE_AUTHOR("Mocean Laboratories");
  603. MODULE_LICENSE("GPL v2");