nouveau_drm.c 26 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/vga_switcheroo.h>
  29. #include "drmP.h"
  30. #include "drm_crtc_helper.h"
  31. #include <core/device.h>
  32. #include <core/client.h>
  33. #include <core/gpuobj.h>
  34. #include <core/class.h>
  35. #include <engine/device.h>
  36. #include <engine/disp.h>
  37. #include <engine/fifo.h>
  38. #include <subdev/vm.h>
  39. #include "nouveau_drm.h"
  40. #include "nouveau_dma.h"
  41. #include "nouveau_ttm.h"
  42. #include "nouveau_gem.h"
  43. #include "nouveau_agp.h"
  44. #include "nouveau_vga.h"
  45. #include "nouveau_pm.h"
  46. #include "nouveau_acpi.h"
  47. #include "nouveau_bios.h"
  48. #include "nouveau_ioctl.h"
  49. #include "nouveau_abi16.h"
  50. #include "nouveau_fbcon.h"
  51. #include "nouveau_fence.h"
  52. #include "nouveau_debugfs.h"
  53. MODULE_PARM_DESC(config, "option string to pass to driver core");
  54. static char *nouveau_config;
  55. module_param_named(config, nouveau_config, charp, 0400);
  56. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  57. static char *nouveau_debug;
  58. module_param_named(debug, nouveau_debug, charp, 0400);
  59. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  60. static int nouveau_noaccel = 0;
  61. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  62. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  63. "0 = disabled, 1 = enabled, 2 = headless)");
  64. int nouveau_modeset = -1;
  65. module_param_named(modeset, nouveau_modeset, int, 0400);
  66. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  67. int nouveau_runtime_pm = -1;
  68. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  69. static struct drm_driver driver;
  70. static int
  71. nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
  72. {
  73. struct nouveau_drm *drm =
  74. container_of(event, struct nouveau_drm, vblank[head]);
  75. drm_handle_vblank(drm->dev, head);
  76. return NVKM_EVENT_KEEP;
  77. }
  78. static int
  79. nouveau_drm_vblank_enable(struct drm_device *dev, int head)
  80. {
  81. struct nouveau_drm *drm = nouveau_drm(dev);
  82. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  83. if (WARN_ON_ONCE(head > ARRAY_SIZE(drm->vblank)))
  84. return -EIO;
  85. WARN_ON_ONCE(drm->vblank[head].func);
  86. drm->vblank[head].func = nouveau_drm_vblank_handler;
  87. nouveau_event_get(pdisp->vblank, head, &drm->vblank[head]);
  88. return 0;
  89. }
  90. static void
  91. nouveau_drm_vblank_disable(struct drm_device *dev, int head)
  92. {
  93. struct nouveau_drm *drm = nouveau_drm(dev);
  94. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  95. if (drm->vblank[head].func)
  96. nouveau_event_put(pdisp->vblank, head, &drm->vblank[head]);
  97. else
  98. WARN_ON_ONCE(1);
  99. drm->vblank[head].func = NULL;
  100. }
  101. static u64
  102. nouveau_name(struct pci_dev *pdev)
  103. {
  104. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  105. name |= pdev->bus->number << 16;
  106. name |= PCI_SLOT(pdev->devfn) << 8;
  107. return name | PCI_FUNC(pdev->devfn);
  108. }
  109. static int
  110. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  111. int size, void **pcli)
  112. {
  113. struct nouveau_cli *cli;
  114. int ret;
  115. *pcli = NULL;
  116. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  117. nouveau_debug, size, pcli);
  118. cli = *pcli;
  119. if (ret) {
  120. if (cli)
  121. nouveau_client_destroy(&cli->base);
  122. *pcli = NULL;
  123. return ret;
  124. }
  125. mutex_init(&cli->mutex);
  126. return 0;
  127. }
  128. static void
  129. nouveau_cli_destroy(struct nouveau_cli *cli)
  130. {
  131. struct nouveau_object *client = nv_object(cli);
  132. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  133. nouveau_client_fini(&cli->base, false);
  134. atomic_set(&client->refcount, 1);
  135. nouveau_object_ref(NULL, &client);
  136. }
  137. static void
  138. nouveau_accel_fini(struct nouveau_drm *drm)
  139. {
  140. nouveau_gpuobj_ref(NULL, &drm->notify);
  141. nouveau_channel_del(&drm->channel);
  142. nouveau_channel_del(&drm->cechan);
  143. if (drm->fence)
  144. nouveau_fence(drm)->dtor(drm);
  145. }
  146. static void
  147. nouveau_accel_init(struct nouveau_drm *drm)
  148. {
  149. struct nouveau_device *device = nv_device(drm->device);
  150. struct nouveau_object *object;
  151. u32 arg0, arg1;
  152. int ret;
  153. if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
  154. return;
  155. /* initialise synchronisation routines */
  156. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  157. else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
  158. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  159. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  160. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  161. else ret = nvc0_fence_create(drm);
  162. if (ret) {
  163. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  164. nouveau_accel_fini(drm);
  165. return;
  166. }
  167. if (device->card_type >= NV_E0) {
  168. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  169. NVDRM_CHAN + 1,
  170. NVE0_CHANNEL_IND_ENGINE_CE0 |
  171. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  172. &drm->cechan);
  173. if (ret)
  174. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  175. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  176. arg1 = 1;
  177. } else
  178. if (device->chipset >= 0xa3 &&
  179. device->chipset != 0xaa &&
  180. device->chipset != 0xac) {
  181. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  182. NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
  183. &drm->cechan);
  184. if (ret)
  185. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  186. arg0 = NvDmaFB;
  187. arg1 = NvDmaTT;
  188. } else {
  189. arg0 = NvDmaFB;
  190. arg1 = NvDmaTT;
  191. }
  192. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  193. arg0, arg1, &drm->channel);
  194. if (ret) {
  195. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  196. nouveau_accel_fini(drm);
  197. return;
  198. }
  199. if (device->card_type < NV_C0) {
  200. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  201. &drm->notify);
  202. if (ret) {
  203. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  204. nouveau_accel_fini(drm);
  205. return;
  206. }
  207. ret = nouveau_object_new(nv_object(drm),
  208. drm->channel->handle, NvNotify0,
  209. 0x003d, &(struct nv_dma_class) {
  210. .flags = NV_DMA_TARGET_VRAM |
  211. NV_DMA_ACCESS_RDWR,
  212. .start = drm->notify->addr,
  213. .limit = drm->notify->addr + 31
  214. }, sizeof(struct nv_dma_class),
  215. &object);
  216. if (ret) {
  217. nouveau_accel_fini(drm);
  218. return;
  219. }
  220. }
  221. nouveau_bo_move_init(drm);
  222. }
  223. static int nouveau_drm_probe(struct pci_dev *pdev,
  224. const struct pci_device_id *pent)
  225. {
  226. struct nouveau_device *device;
  227. struct apertures_struct *aper;
  228. bool boot = false;
  229. int ret;
  230. /* remove conflicting drivers (vesafb, efifb etc) */
  231. aper = alloc_apertures(3);
  232. if (!aper)
  233. return -ENOMEM;
  234. aper->ranges[0].base = pci_resource_start(pdev, 1);
  235. aper->ranges[0].size = pci_resource_len(pdev, 1);
  236. aper->count = 1;
  237. if (pci_resource_len(pdev, 2)) {
  238. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  239. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  240. aper->count++;
  241. }
  242. if (pci_resource_len(pdev, 3)) {
  243. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  244. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  245. aper->count++;
  246. }
  247. #ifdef CONFIG_X86
  248. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  249. #endif
  250. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  251. kfree(aper);
  252. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  253. nouveau_config, nouveau_debug, &device);
  254. if (ret)
  255. return ret;
  256. pci_set_master(pdev);
  257. ret = drm_get_pci_dev(pdev, pent, &driver);
  258. if (ret) {
  259. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  260. return ret;
  261. }
  262. return 0;
  263. }
  264. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  265. static void
  266. nouveau_get_hdmi_dev(struct drm_device *dev)
  267. {
  268. struct nouveau_drm *drm = dev->dev_private;
  269. struct pci_dev *pdev = dev->pdev;
  270. /* subfunction one is a hdmi audio device? */
  271. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  272. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  273. if (!drm->hdmi_device) {
  274. DRM_INFO("hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  275. return;
  276. }
  277. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  278. DRM_INFO("possible hdmi device not audio %d\n", drm->hdmi_device->class);
  279. pci_dev_put(drm->hdmi_device);
  280. drm->hdmi_device = NULL;
  281. return;
  282. }
  283. }
  284. static int
  285. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  286. {
  287. struct pci_dev *pdev = dev->pdev;
  288. struct nouveau_device *device;
  289. struct nouveau_drm *drm;
  290. int ret;
  291. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  292. if (ret)
  293. return ret;
  294. dev->dev_private = drm;
  295. drm->dev = dev;
  296. INIT_LIST_HEAD(&drm->clients);
  297. spin_lock_init(&drm->tile.lock);
  298. nouveau_get_hdmi_dev(dev);
  299. /* make sure AGP controller is in a consistent state before we
  300. * (possibly) execute vbios init tables (see nouveau_agp.h)
  301. */
  302. if (drm_pci_device_is_agp(dev) && dev->agp) {
  303. /* dummy device object, doesn't init anything, but allows
  304. * agp code access to registers
  305. */
  306. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  307. NVDRM_DEVICE, 0x0080,
  308. &(struct nv_device_class) {
  309. .device = ~0,
  310. .disable =
  311. ~(NV_DEVICE_DISABLE_MMIO |
  312. NV_DEVICE_DISABLE_IDENTIFY),
  313. .debug0 = ~0,
  314. }, sizeof(struct nv_device_class),
  315. &drm->device);
  316. if (ret)
  317. goto fail_device;
  318. nouveau_agp_reset(drm);
  319. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  320. }
  321. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  322. 0x0080, &(struct nv_device_class) {
  323. .device = ~0,
  324. .disable = 0,
  325. .debug0 = 0,
  326. }, sizeof(struct nv_device_class),
  327. &drm->device);
  328. if (ret)
  329. goto fail_device;
  330. /* workaround an odd issue on nvc1 by disabling the device's
  331. * nosnoop capability. hopefully won't cause issues until a
  332. * better fix is found - assuming there is one...
  333. */
  334. device = nv_device(drm->device);
  335. if (nv_device(drm->device)->chipset == 0xc1)
  336. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  337. nouveau_vga_init(drm);
  338. nouveau_agp_init(drm);
  339. if (device->card_type >= NV_50) {
  340. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  341. 0x1000, &drm->client.base.vm);
  342. if (ret)
  343. goto fail_device;
  344. }
  345. ret = nouveau_ttm_init(drm);
  346. if (ret)
  347. goto fail_ttm;
  348. ret = nouveau_bios_init(dev);
  349. if (ret)
  350. goto fail_bios;
  351. ret = nouveau_display_create(dev);
  352. if (ret)
  353. goto fail_dispctor;
  354. if (dev->mode_config.num_crtc) {
  355. ret = nouveau_display_init(dev);
  356. if (ret)
  357. goto fail_dispinit;
  358. }
  359. nouveau_pm_init(dev);
  360. nouveau_accel_init(drm);
  361. nouveau_fbcon_init(dev);
  362. if (nouveau_runtime_pm != 0) {
  363. pm_runtime_use_autosuspend(dev->dev);
  364. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  365. pm_runtime_set_active(dev->dev);
  366. pm_runtime_allow(dev->dev);
  367. pm_runtime_mark_last_busy(dev->dev);
  368. pm_runtime_put(dev->dev);
  369. }
  370. return 0;
  371. fail_dispinit:
  372. nouveau_display_destroy(dev);
  373. fail_dispctor:
  374. nouveau_bios_takedown(dev);
  375. fail_bios:
  376. nouveau_ttm_fini(drm);
  377. fail_ttm:
  378. nouveau_agp_fini(drm);
  379. nouveau_vga_fini(drm);
  380. fail_device:
  381. nouveau_cli_destroy(&drm->client);
  382. return ret;
  383. }
  384. static int
  385. nouveau_drm_unload(struct drm_device *dev)
  386. {
  387. struct nouveau_drm *drm = nouveau_drm(dev);
  388. pm_runtime_get_sync(dev->dev);
  389. nouveau_fbcon_fini(dev);
  390. nouveau_accel_fini(drm);
  391. nouveau_pm_fini(dev);
  392. if (dev->mode_config.num_crtc)
  393. nouveau_display_fini(dev);
  394. nouveau_display_destroy(dev);
  395. nouveau_bios_takedown(dev);
  396. nouveau_ttm_fini(drm);
  397. nouveau_agp_fini(drm);
  398. nouveau_vga_fini(drm);
  399. if (drm->hdmi_device)
  400. pci_dev_put(drm->hdmi_device);
  401. nouveau_cli_destroy(&drm->client);
  402. return 0;
  403. }
  404. static void
  405. nouveau_drm_remove(struct pci_dev *pdev)
  406. {
  407. struct drm_device *dev = pci_get_drvdata(pdev);
  408. struct nouveau_drm *drm = nouveau_drm(dev);
  409. struct nouveau_object *device;
  410. device = drm->client.base.device;
  411. drm_put_dev(dev);
  412. nouveau_object_ref(NULL, &device);
  413. nouveau_object_debug();
  414. }
  415. static int
  416. nouveau_do_suspend(struct drm_device *dev)
  417. {
  418. struct nouveau_drm *drm = nouveau_drm(dev);
  419. struct nouveau_cli *cli;
  420. int ret;
  421. if (dev->mode_config.num_crtc) {
  422. NV_SUSPEND(drm, "suspending display...\n");
  423. ret = nouveau_display_suspend(dev);
  424. if (ret)
  425. return ret;
  426. }
  427. NV_SUSPEND(drm, "evicting buffers...\n");
  428. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  429. NV_SUSPEND(drm, "waiting for kernel channels to go idle...\n");
  430. if (drm->cechan) {
  431. ret = nouveau_channel_idle(drm->cechan);
  432. if (ret)
  433. return ret;
  434. }
  435. if (drm->channel) {
  436. ret = nouveau_channel_idle(drm->channel);
  437. if (ret)
  438. return ret;
  439. }
  440. NV_SUSPEND(drm, "suspending client object trees...\n");
  441. if (drm->fence && nouveau_fence(drm)->suspend) {
  442. if (!nouveau_fence(drm)->suspend(drm))
  443. return -ENOMEM;
  444. }
  445. list_for_each_entry(cli, &drm->clients, head) {
  446. ret = nouveau_client_fini(&cli->base, true);
  447. if (ret)
  448. goto fail_client;
  449. }
  450. NV_SUSPEND(drm, "suspending kernel object tree...\n");
  451. ret = nouveau_client_fini(&drm->client.base, true);
  452. if (ret)
  453. goto fail_client;
  454. nouveau_agp_fini(drm);
  455. return 0;
  456. fail_client:
  457. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  458. nouveau_client_init(&cli->base);
  459. }
  460. if (dev->mode_config.num_crtc) {
  461. NV_SUSPEND(drm, "resuming display...\n");
  462. nouveau_display_resume(dev);
  463. }
  464. return ret;
  465. }
  466. int nouveau_pmops_suspend(struct device *dev)
  467. {
  468. struct pci_dev *pdev = to_pci_dev(dev);
  469. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  470. int ret;
  471. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  472. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  473. return 0;
  474. if (drm_dev->mode_config.num_crtc)
  475. nouveau_fbcon_set_suspend(drm_dev, 1);
  476. nv_suspend_set_printk_level(NV_DBG_INFO);
  477. ret = nouveau_do_suspend(drm_dev);
  478. if (ret)
  479. return ret;
  480. pci_save_state(pdev);
  481. pci_disable_device(pdev);
  482. pci_set_power_state(pdev, PCI_D3hot);
  483. nv_suspend_set_printk_level(NV_DBG_DEBUG);
  484. return 0;
  485. }
  486. static int
  487. nouveau_do_resume(struct drm_device *dev)
  488. {
  489. struct nouveau_drm *drm = nouveau_drm(dev);
  490. struct nouveau_cli *cli;
  491. NV_SUSPEND(drm, "re-enabling device...\n");
  492. nouveau_agp_reset(drm);
  493. NV_SUSPEND(drm, "resuming kernel object tree...\n");
  494. nouveau_client_init(&drm->client.base);
  495. nouveau_agp_init(drm);
  496. NV_SUSPEND(drm, "resuming client object trees...\n");
  497. if (drm->fence && nouveau_fence(drm)->resume)
  498. nouveau_fence(drm)->resume(drm);
  499. list_for_each_entry(cli, &drm->clients, head) {
  500. nouveau_client_init(&cli->base);
  501. }
  502. nouveau_run_vbios_init(dev);
  503. nouveau_pm_resume(dev);
  504. if (dev->mode_config.num_crtc) {
  505. NV_SUSPEND(drm, "resuming display...\n");
  506. nouveau_display_repin(dev);
  507. }
  508. return 0;
  509. }
  510. int nouveau_pmops_resume(struct device *dev)
  511. {
  512. struct pci_dev *pdev = to_pci_dev(dev);
  513. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  514. int ret;
  515. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  516. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  517. return 0;
  518. pci_set_power_state(pdev, PCI_D0);
  519. pci_restore_state(pdev);
  520. ret = pci_enable_device(pdev);
  521. if (ret)
  522. return ret;
  523. pci_set_master(pdev);
  524. nv_suspend_set_printk_level(NV_DBG_INFO);
  525. ret = nouveau_do_resume(drm_dev);
  526. if (ret) {
  527. nv_suspend_set_printk_level(NV_DBG_DEBUG);
  528. return ret;
  529. }
  530. if (drm_dev->mode_config.num_crtc)
  531. nouveau_fbcon_set_suspend(drm_dev, 0);
  532. nouveau_fbcon_zfill_all(drm_dev);
  533. if (drm_dev->mode_config.num_crtc)
  534. nouveau_display_resume(drm_dev);
  535. nv_suspend_set_printk_level(NV_DBG_DEBUG);
  536. return 0;
  537. }
  538. static int nouveau_pmops_freeze(struct device *dev)
  539. {
  540. struct pci_dev *pdev = to_pci_dev(dev);
  541. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  542. int ret;
  543. nv_suspend_set_printk_level(NV_DBG_INFO);
  544. if (drm_dev->mode_config.num_crtc)
  545. nouveau_fbcon_set_suspend(drm_dev, 1);
  546. ret = nouveau_do_suspend(drm_dev);
  547. nv_suspend_set_printk_level(NV_DBG_DEBUG);
  548. return ret;
  549. }
  550. static int nouveau_pmops_thaw(struct device *dev)
  551. {
  552. struct pci_dev *pdev = to_pci_dev(dev);
  553. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  554. int ret;
  555. nv_suspend_set_printk_level(NV_DBG_INFO);
  556. ret = nouveau_do_resume(drm_dev);
  557. if (ret) {
  558. nv_suspend_set_printk_level(NV_DBG_DEBUG);
  559. return ret;
  560. }
  561. if (drm_dev->mode_config.num_crtc)
  562. nouveau_fbcon_set_suspend(drm_dev, 0);
  563. nouveau_fbcon_zfill_all(drm_dev);
  564. if (drm_dev->mode_config.num_crtc)
  565. nouveau_display_resume(drm_dev);
  566. nv_suspend_set_printk_level(NV_DBG_DEBUG);
  567. return 0;
  568. }
  569. static int
  570. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  571. {
  572. struct pci_dev *pdev = dev->pdev;
  573. struct nouveau_drm *drm = nouveau_drm(dev);
  574. struct nouveau_cli *cli;
  575. char name[32], tmpname[TASK_COMM_LEN];
  576. int ret;
  577. /* need to bring up power immediately if opening device */
  578. ret = pm_runtime_get_sync(dev->dev);
  579. if (ret < 0)
  580. return ret;
  581. get_task_comm(tmpname, current);
  582. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  583. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  584. if (ret)
  585. goto out_suspend;
  586. if (nv_device(drm->device)->card_type >= NV_50) {
  587. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  588. 0x1000, &cli->base.vm);
  589. if (ret) {
  590. nouveau_cli_destroy(cli);
  591. goto out_suspend;
  592. }
  593. }
  594. fpriv->driver_priv = cli;
  595. mutex_lock(&drm->client.mutex);
  596. list_add(&cli->head, &drm->clients);
  597. mutex_unlock(&drm->client.mutex);
  598. out_suspend:
  599. pm_runtime_mark_last_busy(dev->dev);
  600. pm_runtime_put_autosuspend(dev->dev);
  601. return ret;
  602. }
  603. static void
  604. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  605. {
  606. struct nouveau_cli *cli = nouveau_cli(fpriv);
  607. struct nouveau_drm *drm = nouveau_drm(dev);
  608. pm_runtime_get_sync(dev->dev);
  609. if (cli->abi16)
  610. nouveau_abi16_fini(cli->abi16);
  611. mutex_lock(&drm->client.mutex);
  612. list_del(&cli->head);
  613. mutex_unlock(&drm->client.mutex);
  614. }
  615. static void
  616. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  617. {
  618. struct nouveau_cli *cli = nouveau_cli(fpriv);
  619. nouveau_cli_destroy(cli);
  620. pm_runtime_mark_last_busy(dev->dev);
  621. pm_runtime_put_autosuspend(dev->dev);
  622. }
  623. static const struct drm_ioctl_desc
  624. nouveau_ioctls[] = {
  625. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  626. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  627. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  628. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  629. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  630. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  631. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  632. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  633. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  634. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  635. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  636. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  637. };
  638. long nouveau_drm_ioctl(struct file *filp,
  639. unsigned int cmd, unsigned long arg)
  640. {
  641. struct drm_file *file_priv = filp->private_data;
  642. struct drm_device *dev;
  643. long ret;
  644. dev = file_priv->minor->dev;
  645. ret = pm_runtime_get_sync(dev->dev);
  646. if (ret < 0)
  647. return ret;
  648. ret = drm_ioctl(filp, cmd, arg);
  649. pm_runtime_mark_last_busy(dev->dev);
  650. pm_runtime_put_autosuspend(dev->dev);
  651. return ret;
  652. }
  653. static const struct file_operations
  654. nouveau_driver_fops = {
  655. .owner = THIS_MODULE,
  656. .open = drm_open,
  657. .release = drm_release,
  658. .unlocked_ioctl = nouveau_drm_ioctl,
  659. .mmap = nouveau_ttm_mmap,
  660. .poll = drm_poll,
  661. .read = drm_read,
  662. #if defined(CONFIG_COMPAT)
  663. .compat_ioctl = nouveau_compat_ioctl,
  664. #endif
  665. .llseek = noop_llseek,
  666. };
  667. static struct drm_driver
  668. driver = {
  669. .driver_features =
  670. DRIVER_USE_AGP |
  671. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
  672. .load = nouveau_drm_load,
  673. .unload = nouveau_drm_unload,
  674. .open = nouveau_drm_open,
  675. .preclose = nouveau_drm_preclose,
  676. .postclose = nouveau_drm_postclose,
  677. .lastclose = nouveau_vga_lastclose,
  678. #if defined(CONFIG_DEBUG_FS)
  679. .debugfs_init = nouveau_debugfs_init,
  680. .debugfs_cleanup = nouveau_debugfs_takedown,
  681. #endif
  682. .get_vblank_counter = drm_vblank_count,
  683. .enable_vblank = nouveau_drm_vblank_enable,
  684. .disable_vblank = nouveau_drm_vblank_disable,
  685. .ioctls = nouveau_ioctls,
  686. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  687. .fops = &nouveau_driver_fops,
  688. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  689. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  690. .gem_prime_export = drm_gem_prime_export,
  691. .gem_prime_import = drm_gem_prime_import,
  692. .gem_prime_pin = nouveau_gem_prime_pin,
  693. .gem_prime_unpin = nouveau_gem_prime_unpin,
  694. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  695. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  696. .gem_prime_vmap = nouveau_gem_prime_vmap,
  697. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  698. .gem_init_object = nouveau_gem_object_new,
  699. .gem_free_object = nouveau_gem_object_del,
  700. .gem_open_object = nouveau_gem_object_open,
  701. .gem_close_object = nouveau_gem_object_close,
  702. .dumb_create = nouveau_display_dumb_create,
  703. .dumb_map_offset = nouveau_display_dumb_map_offset,
  704. .dumb_destroy = drm_gem_dumb_destroy,
  705. .name = DRIVER_NAME,
  706. .desc = DRIVER_DESC,
  707. #ifdef GIT_REVISION
  708. .date = GIT_REVISION,
  709. #else
  710. .date = DRIVER_DATE,
  711. #endif
  712. .major = DRIVER_MAJOR,
  713. .minor = DRIVER_MINOR,
  714. .patchlevel = DRIVER_PATCHLEVEL,
  715. };
  716. static struct pci_device_id
  717. nouveau_drm_pci_table[] = {
  718. {
  719. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  720. .class = PCI_BASE_CLASS_DISPLAY << 16,
  721. .class_mask = 0xff << 16,
  722. },
  723. {
  724. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  725. .class = PCI_BASE_CLASS_DISPLAY << 16,
  726. .class_mask = 0xff << 16,
  727. },
  728. {}
  729. };
  730. static int nouveau_pmops_runtime_suspend(struct device *dev)
  731. {
  732. struct pci_dev *pdev = to_pci_dev(dev);
  733. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  734. int ret;
  735. if (nouveau_runtime_pm == 0)
  736. return -EINVAL;
  737. drm_kms_helper_poll_disable(drm_dev);
  738. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  739. nouveau_switcheroo_optimus_dsm();
  740. ret = nouveau_do_suspend(drm_dev);
  741. pci_save_state(pdev);
  742. pci_disable_device(pdev);
  743. pci_set_power_state(pdev, PCI_D3cold);
  744. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  745. return ret;
  746. }
  747. static int nouveau_pmops_runtime_resume(struct device *dev)
  748. {
  749. struct pci_dev *pdev = to_pci_dev(dev);
  750. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  751. struct nouveau_device *device = nouveau_dev(drm_dev);
  752. int ret;
  753. if (nouveau_runtime_pm == 0)
  754. return -EINVAL;
  755. pci_set_power_state(pdev, PCI_D0);
  756. pci_restore_state(pdev);
  757. ret = pci_enable_device(pdev);
  758. if (ret)
  759. return ret;
  760. pci_set_master(pdev);
  761. ret = nouveau_do_resume(drm_dev);
  762. if (drm_dev->mode_config.num_crtc)
  763. nouveau_display_resume(drm_dev);
  764. drm_kms_helper_poll_enable(drm_dev);
  765. /* do magic */
  766. nv_mask(device, 0x88488, (1 << 25), (1 << 25));
  767. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  768. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  769. return ret;
  770. }
  771. static int nouveau_pmops_runtime_idle(struct device *dev)
  772. {
  773. struct pci_dev *pdev = to_pci_dev(dev);
  774. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  775. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  776. struct drm_crtc *crtc;
  777. if (nouveau_runtime_pm == 0)
  778. return -EBUSY;
  779. /* are we optimus enabled? */
  780. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  781. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  782. return -EBUSY;
  783. }
  784. /* if we have a hdmi audio device - make sure it has a driver loaded */
  785. if (drm->hdmi_device) {
  786. if (!drm->hdmi_device->driver) {
  787. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  788. pm_runtime_mark_last_busy(dev);
  789. return -EBUSY;
  790. }
  791. }
  792. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  793. if (crtc->enabled) {
  794. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  795. return -EBUSY;
  796. }
  797. }
  798. pm_runtime_mark_last_busy(dev);
  799. pm_runtime_autosuspend(dev);
  800. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  801. return 1;
  802. }
  803. static const struct dev_pm_ops nouveau_pm_ops = {
  804. .suspend = nouveau_pmops_suspend,
  805. .resume = nouveau_pmops_resume,
  806. .freeze = nouveau_pmops_freeze,
  807. .thaw = nouveau_pmops_thaw,
  808. .poweroff = nouveau_pmops_freeze,
  809. .restore = nouveau_pmops_resume,
  810. .runtime_suspend = nouveau_pmops_runtime_suspend,
  811. .runtime_resume = nouveau_pmops_runtime_resume,
  812. .runtime_idle = nouveau_pmops_runtime_idle,
  813. };
  814. static struct pci_driver
  815. nouveau_drm_pci_driver = {
  816. .name = "nouveau",
  817. .id_table = nouveau_drm_pci_table,
  818. .probe = nouveau_drm_probe,
  819. .remove = nouveau_drm_remove,
  820. .driver.pm = &nouveau_pm_ops,
  821. };
  822. static int __init
  823. nouveau_drm_init(void)
  824. {
  825. if (nouveau_modeset == -1) {
  826. #ifdef CONFIG_VGA_CONSOLE
  827. if (vgacon_text_force())
  828. nouveau_modeset = 0;
  829. #endif
  830. }
  831. if (!nouveau_modeset)
  832. return 0;
  833. nouveau_register_dsm_handler();
  834. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  835. }
  836. static void __exit
  837. nouveau_drm_exit(void)
  838. {
  839. if (!nouveau_modeset)
  840. return;
  841. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  842. nouveau_unregister_dsm_handler();
  843. }
  844. module_init(nouveau_drm_init);
  845. module_exit(nouveau_drm_exit);
  846. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  847. MODULE_AUTHOR(DRIVER_AUTHOR);
  848. MODULE_DESCRIPTION(DRIVER_DESC);
  849. MODULE_LICENSE("GPL and additional rights");