adreno_gpu.h 3.6 KB

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  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __ADRENO_GPU_H__
  18. #define __ADRENO_GPU_H__
  19. #include <linux/firmware.h>
  20. #include "msm_gpu.h"
  21. #include "adreno_common.xml.h"
  22. #include "adreno_pm4.xml.h"
  23. struct adreno_rev {
  24. uint8_t core;
  25. uint8_t major;
  26. uint8_t minor;
  27. uint8_t patchid;
  28. };
  29. #define ADRENO_REV(core, major, minor, patchid) \
  30. ((struct adreno_rev){ core, major, minor, patchid })
  31. struct adreno_gpu_funcs {
  32. struct msm_gpu_funcs base;
  33. };
  34. struct adreno_info;
  35. struct adreno_rbmemptrs {
  36. volatile uint32_t rptr;
  37. volatile uint32_t wptr;
  38. volatile uint32_t fence;
  39. };
  40. struct adreno_gpu {
  41. struct msm_gpu base;
  42. struct adreno_rev rev;
  43. const struct adreno_info *info;
  44. uint32_t revn; /* numeric revision name */
  45. const struct adreno_gpu_funcs *funcs;
  46. /* firmware: */
  47. const struct firmware *pm4, *pfp;
  48. /* ringbuffer rptr/wptr: */
  49. // TODO should this be in msm_ringbuffer? I think it would be
  50. // different for z180..
  51. struct adreno_rbmemptrs *memptrs;
  52. struct drm_gem_object *memptrs_bo;
  53. uint32_t memptrs_iova;
  54. };
  55. #define to_adreno_gpu(x) container_of(x, struct adreno_gpu, base)
  56. /* platform config data (ie. from DT, or pdata) */
  57. struct adreno_platform_config {
  58. struct adreno_rev rev;
  59. uint32_t fast_rate, slow_rate, bus_freq;
  60. };
  61. #define ADRENO_IDLE_TIMEOUT (20 * 1000)
  62. static inline bool adreno_is_a3xx(struct adreno_gpu *gpu)
  63. {
  64. return (gpu->revn >= 300) && (gpu->revn < 400);
  65. }
  66. static inline bool adreno_is_a305(struct adreno_gpu *gpu)
  67. {
  68. return gpu->revn == 305;
  69. }
  70. static inline bool adreno_is_a320(struct adreno_gpu *gpu)
  71. {
  72. return gpu->revn == 320;
  73. }
  74. static inline bool adreno_is_a330(struct adreno_gpu *gpu)
  75. {
  76. return gpu->revn == 330;
  77. }
  78. int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
  79. int adreno_hw_init(struct msm_gpu *gpu);
  80. uint32_t adreno_last_fence(struct msm_gpu *gpu);
  81. void adreno_recover(struct msm_gpu *gpu);
  82. int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
  83. struct msm_file_private *ctx);
  84. void adreno_flush(struct msm_gpu *gpu);
  85. void adreno_idle(struct msm_gpu *gpu);
  86. #ifdef CONFIG_DEBUG_FS
  87. void adreno_show(struct msm_gpu *gpu, struct seq_file *m);
  88. #endif
  89. void adreno_wait_ring(struct msm_gpu *gpu, uint32_t ndwords);
  90. int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
  91. struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs,
  92. struct adreno_rev rev);
  93. void adreno_gpu_cleanup(struct adreno_gpu *gpu);
  94. /* ringbuffer helpers (the parts that are adreno specific) */
  95. static inline void
  96. OUT_PKT0(struct msm_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
  97. {
  98. adreno_wait_ring(ring->gpu, cnt+1);
  99. OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
  100. }
  101. /* no-op packet: */
  102. static inline void
  103. OUT_PKT2(struct msm_ringbuffer *ring)
  104. {
  105. adreno_wait_ring(ring->gpu, 1);
  106. OUT_RING(ring, CP_TYPE2_PKT);
  107. }
  108. static inline void
  109. OUT_PKT3(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
  110. {
  111. adreno_wait_ring(ring->gpu, cnt+1);
  112. OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
  113. }
  114. #endif /* __ADRENO_GPU_H__ */