gpio-sch.c 6.9 KB

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  1. /*
  2. * GPIO interface for Intel Poulsbo SCH
  3. *
  4. * Copyright (c) 2010 CompuLab Ltd
  5. * Author: Denis Turischev <denis@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License 2 as published
  9. * by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; see the file COPYING. If not, write to
  18. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/init.h>
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/io.h>
  24. #include <linux/errno.h>
  25. #include <linux/acpi.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/pci_ids.h>
  28. #include <linux/gpio.h>
  29. static DEFINE_SPINLOCK(gpio_lock);
  30. #define CGEN (0x00)
  31. #define CGIO (0x04)
  32. #define CGLV (0x08)
  33. #define RGEN (0x20)
  34. #define RGIO (0x24)
  35. #define RGLV (0x28)
  36. static unsigned short gpio_ba;
  37. static int sch_gpio_core_direction_in(struct gpio_chip *gc, unsigned gpio_num)
  38. {
  39. u8 curr_dirs;
  40. unsigned short offset, bit;
  41. spin_lock(&gpio_lock);
  42. offset = CGIO + gpio_num / 8;
  43. bit = gpio_num % 8;
  44. curr_dirs = inb(gpio_ba + offset);
  45. if (!(curr_dirs & (1 << bit)))
  46. outb(curr_dirs | (1 << bit), gpio_ba + offset);
  47. spin_unlock(&gpio_lock);
  48. return 0;
  49. }
  50. static int sch_gpio_core_get(struct gpio_chip *gc, unsigned gpio_num)
  51. {
  52. int res;
  53. unsigned short offset, bit;
  54. offset = CGLV + gpio_num / 8;
  55. bit = gpio_num % 8;
  56. res = !!(inb(gpio_ba + offset) & (1 << bit));
  57. return res;
  58. }
  59. static void sch_gpio_core_set(struct gpio_chip *gc, unsigned gpio_num, int val)
  60. {
  61. u8 curr_vals;
  62. unsigned short offset, bit;
  63. spin_lock(&gpio_lock);
  64. offset = CGLV + gpio_num / 8;
  65. bit = gpio_num % 8;
  66. curr_vals = inb(gpio_ba + offset);
  67. if (val)
  68. outb(curr_vals | (1 << bit), gpio_ba + offset);
  69. else
  70. outb((curr_vals & ~(1 << bit)), gpio_ba + offset);
  71. spin_unlock(&gpio_lock);
  72. }
  73. static int sch_gpio_core_direction_out(struct gpio_chip *gc,
  74. unsigned gpio_num, int val)
  75. {
  76. u8 curr_dirs;
  77. unsigned short offset, bit;
  78. sch_gpio_core_set(gc, gpio_num, val);
  79. spin_lock(&gpio_lock);
  80. offset = CGIO + gpio_num / 8;
  81. bit = gpio_num % 8;
  82. curr_dirs = inb(gpio_ba + offset);
  83. if (curr_dirs & (1 << bit))
  84. outb(curr_dirs & ~(1 << bit), gpio_ba + offset);
  85. spin_unlock(&gpio_lock);
  86. return 0;
  87. }
  88. static struct gpio_chip sch_gpio_core = {
  89. .label = "sch_gpio_core",
  90. .owner = THIS_MODULE,
  91. .direction_input = sch_gpio_core_direction_in,
  92. .get = sch_gpio_core_get,
  93. .direction_output = sch_gpio_core_direction_out,
  94. .set = sch_gpio_core_set,
  95. };
  96. static int sch_gpio_resume_direction_in(struct gpio_chip *gc,
  97. unsigned gpio_num)
  98. {
  99. u8 curr_dirs;
  100. unsigned short offset, bit;
  101. spin_lock(&gpio_lock);
  102. offset = RGIO + gpio_num / 8;
  103. bit = gpio_num % 8;
  104. curr_dirs = inb(gpio_ba + offset);
  105. if (!(curr_dirs & (1 << bit)))
  106. outb(curr_dirs | (1 << bit), gpio_ba + offset);
  107. spin_unlock(&gpio_lock);
  108. return 0;
  109. }
  110. static int sch_gpio_resume_get(struct gpio_chip *gc, unsigned gpio_num)
  111. {
  112. unsigned short offset, bit;
  113. offset = RGLV + gpio_num / 8;
  114. bit = gpio_num % 8;
  115. return !!(inb(gpio_ba + offset) & (1 << bit));
  116. }
  117. static void sch_gpio_resume_set(struct gpio_chip *gc,
  118. unsigned gpio_num, int val)
  119. {
  120. u8 curr_vals;
  121. unsigned short offset, bit;
  122. spin_lock(&gpio_lock);
  123. offset = RGLV + gpio_num / 8;
  124. bit = gpio_num % 8;
  125. curr_vals = inb(gpio_ba + offset);
  126. if (val)
  127. outb(curr_vals | (1 << bit), gpio_ba + offset);
  128. else
  129. outb((curr_vals & ~(1 << bit)), gpio_ba + offset);
  130. spin_unlock(&gpio_lock);
  131. }
  132. static int sch_gpio_resume_direction_out(struct gpio_chip *gc,
  133. unsigned gpio_num, int val)
  134. {
  135. u8 curr_dirs;
  136. unsigned short offset, bit;
  137. sch_gpio_resume_set(gc, gpio_num, val);
  138. offset = RGIO + gpio_num / 8;
  139. bit = gpio_num % 8;
  140. spin_lock(&gpio_lock);
  141. curr_dirs = inb(gpio_ba + offset);
  142. if (curr_dirs & (1 << bit))
  143. outb(curr_dirs & ~(1 << bit), gpio_ba + offset);
  144. spin_unlock(&gpio_lock);
  145. return 0;
  146. }
  147. static struct gpio_chip sch_gpio_resume = {
  148. .label = "sch_gpio_resume",
  149. .owner = THIS_MODULE,
  150. .direction_input = sch_gpio_resume_direction_in,
  151. .get = sch_gpio_resume_get,
  152. .direction_output = sch_gpio_resume_direction_out,
  153. .set = sch_gpio_resume_set,
  154. };
  155. static int sch_gpio_probe(struct platform_device *pdev)
  156. {
  157. struct resource *res;
  158. int err, id;
  159. id = pdev->id;
  160. if (!id)
  161. return -ENODEV;
  162. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  163. if (!res)
  164. return -EBUSY;
  165. if (!request_region(res->start, resource_size(res), pdev->name))
  166. return -EBUSY;
  167. gpio_ba = res->start;
  168. switch (id) {
  169. case PCI_DEVICE_ID_INTEL_SCH_LPC:
  170. sch_gpio_core.base = 0;
  171. sch_gpio_core.ngpio = 10;
  172. sch_gpio_resume.base = 10;
  173. sch_gpio_resume.ngpio = 4;
  174. /*
  175. * GPIO[6:0] enabled by default
  176. * GPIO7 is configured by the CMC as SLPIOVR
  177. * Enable GPIO[9:8] core powered gpios explicitly
  178. */
  179. outb(0x3, gpio_ba + CGEN + 1);
  180. /*
  181. * SUS_GPIO[2:0] enabled by default
  182. * Enable SUS_GPIO3 resume powered gpio explicitly
  183. */
  184. outb(0x8, gpio_ba + RGEN);
  185. break;
  186. case PCI_DEVICE_ID_INTEL_ITC_LPC:
  187. sch_gpio_core.base = 0;
  188. sch_gpio_core.ngpio = 5;
  189. sch_gpio_resume.base = 5;
  190. sch_gpio_resume.ngpio = 9;
  191. break;
  192. case PCI_DEVICE_ID_INTEL_CENTERTON_ILB:
  193. sch_gpio_core.base = 0;
  194. sch_gpio_core.ngpio = 21;
  195. sch_gpio_resume.base = 21;
  196. sch_gpio_resume.ngpio = 9;
  197. break;
  198. default:
  199. err = -ENODEV;
  200. goto err_sch_gpio_core;
  201. }
  202. sch_gpio_core.dev = &pdev->dev;
  203. sch_gpio_resume.dev = &pdev->dev;
  204. err = gpiochip_add(&sch_gpio_core);
  205. if (err < 0)
  206. goto err_sch_gpio_core;
  207. err = gpiochip_add(&sch_gpio_resume);
  208. if (err < 0)
  209. goto err_sch_gpio_resume;
  210. return 0;
  211. err_sch_gpio_resume:
  212. if (gpiochip_remove(&sch_gpio_core))
  213. dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__);
  214. err_sch_gpio_core:
  215. release_region(res->start, resource_size(res));
  216. gpio_ba = 0;
  217. return err;
  218. }
  219. static int sch_gpio_remove(struct platform_device *pdev)
  220. {
  221. struct resource *res;
  222. if (gpio_ba) {
  223. int err;
  224. err = gpiochip_remove(&sch_gpio_core);
  225. if (err)
  226. dev_err(&pdev->dev, "%s failed, %d\n",
  227. "gpiochip_remove()", err);
  228. err = gpiochip_remove(&sch_gpio_resume);
  229. if (err)
  230. dev_err(&pdev->dev, "%s failed, %d\n",
  231. "gpiochip_remove()", err);
  232. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  233. release_region(res->start, resource_size(res));
  234. gpio_ba = 0;
  235. return err;
  236. }
  237. return 0;
  238. }
  239. static struct platform_driver sch_gpio_driver = {
  240. .driver = {
  241. .name = "sch_gpio",
  242. .owner = THIS_MODULE,
  243. },
  244. .probe = sch_gpio_probe,
  245. .remove = sch_gpio_remove,
  246. };
  247. module_platform_driver(sch_gpio_driver);
  248. MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
  249. MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
  250. MODULE_LICENSE("GPL");
  251. MODULE_ALIAS("platform:sch_gpio");