gpio-f7188x.c 10 KB

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  1. /*
  2. * GPIO driver for Fintek Super-I/O F71882 and F71889
  3. *
  4. * Copyright (C) 2010-2013 LaCie
  5. *
  6. * Author: Simon Guinot <simon.guinot@sequanux.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/io.h>
  17. #include <linux/gpio.h>
  18. #define DRVNAME "gpio-f7188x"
  19. /*
  20. * Super-I/O registers
  21. */
  22. #define SIO_LDSEL 0x07 /* Logical device select */
  23. #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
  24. #define SIO_DEVREV 0x22 /* Device revision */
  25. #define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
  26. #define SIO_LD_GPIO 0x06 /* GPIO logical device */
  27. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  28. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  29. #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
  30. #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
  31. #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
  32. enum chips { f71882fg, f71889f };
  33. static const char * const f7188x_names[] = {
  34. "f71882fg",
  35. "f71889f",
  36. };
  37. struct f7188x_sio {
  38. int addr;
  39. enum chips type;
  40. };
  41. struct f7188x_gpio_bank {
  42. struct gpio_chip chip;
  43. unsigned int regbase;
  44. struct f7188x_gpio_data *data;
  45. };
  46. struct f7188x_gpio_data {
  47. struct f7188x_sio *sio;
  48. int nr_bank;
  49. struct f7188x_gpio_bank *bank;
  50. };
  51. /*
  52. * Super-I/O functions.
  53. */
  54. static inline int superio_inb(int base, int reg)
  55. {
  56. outb(reg, base);
  57. return inb(base + 1);
  58. }
  59. static int superio_inw(int base, int reg)
  60. {
  61. int val;
  62. outb(reg++, base);
  63. val = inb(base + 1) << 8;
  64. outb(reg, base);
  65. val |= inb(base + 1);
  66. return val;
  67. }
  68. static inline void superio_outb(int base, int reg, int val)
  69. {
  70. outb(reg, base);
  71. outb(val, base + 1);
  72. }
  73. static inline int superio_enter(int base)
  74. {
  75. /* Don't step on other drivers' I/O space by accident. */
  76. if (!request_muxed_region(base, 2, DRVNAME)) {
  77. pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
  78. return -EBUSY;
  79. }
  80. /* According to the datasheet the key must be send twice. */
  81. outb(SIO_UNLOCK_KEY, base);
  82. outb(SIO_UNLOCK_KEY, base);
  83. return 0;
  84. }
  85. static inline void superio_select(int base, int ld)
  86. {
  87. outb(SIO_LDSEL, base);
  88. outb(ld, base + 1);
  89. }
  90. static inline void superio_exit(int base)
  91. {
  92. outb(SIO_LOCK_KEY, base);
  93. release_region(base, 2);
  94. }
  95. /*
  96. * GPIO chip.
  97. */
  98. static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
  99. static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
  100. static int f7188x_gpio_direction_out(struct gpio_chip *chip,
  101. unsigned offset, int value);
  102. static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
  103. #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
  104. { \
  105. .chip = { \
  106. .label = DRVNAME, \
  107. .owner = THIS_MODULE, \
  108. .direction_input = f7188x_gpio_direction_in, \
  109. .get = f7188x_gpio_get, \
  110. .direction_output = f7188x_gpio_direction_out, \
  111. .set = f7188x_gpio_set, \
  112. .base = _base, \
  113. .ngpio = _ngpio, \
  114. }, \
  115. .regbase = _regbase, \
  116. }
  117. #define gpio_dir(base) (base + 0)
  118. #define gpio_data_out(base) (base + 1)
  119. #define gpio_data_in(base) (base + 2)
  120. /* Output mode register (0:open drain 1:push-pull). */
  121. #define gpio_out_mode(base) (base + 3)
  122. static struct f7188x_gpio_bank f71882_gpio_bank[] = {
  123. F7188X_GPIO_BANK(0 , 8, 0xF0),
  124. F7188X_GPIO_BANK(10, 8, 0xE0),
  125. F7188X_GPIO_BANK(20, 8, 0xD0),
  126. F7188X_GPIO_BANK(30, 4, 0xC0),
  127. F7188X_GPIO_BANK(40, 4, 0xB0),
  128. };
  129. static struct f7188x_gpio_bank f71889_gpio_bank[] = {
  130. F7188X_GPIO_BANK(0 , 7, 0xF0),
  131. F7188X_GPIO_BANK(10, 7, 0xE0),
  132. F7188X_GPIO_BANK(20, 8, 0xD0),
  133. F7188X_GPIO_BANK(30, 8, 0xC0),
  134. F7188X_GPIO_BANK(40, 8, 0xB0),
  135. F7188X_GPIO_BANK(50, 5, 0xA0),
  136. F7188X_GPIO_BANK(60, 8, 0x90),
  137. F7188X_GPIO_BANK(70, 8, 0x80),
  138. };
  139. static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
  140. {
  141. int err;
  142. struct f7188x_gpio_bank *bank =
  143. container_of(chip, struct f7188x_gpio_bank, chip);
  144. struct f7188x_sio *sio = bank->data->sio;
  145. u8 dir;
  146. err = superio_enter(sio->addr);
  147. if (err)
  148. return err;
  149. superio_select(sio->addr, SIO_LD_GPIO);
  150. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  151. dir &= ~(1 << offset);
  152. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  153. superio_exit(sio->addr);
  154. return 0;
  155. }
  156. static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
  157. {
  158. int err;
  159. struct f7188x_gpio_bank *bank =
  160. container_of(chip, struct f7188x_gpio_bank, chip);
  161. struct f7188x_sio *sio = bank->data->sio;
  162. u8 dir, data;
  163. err = superio_enter(sio->addr);
  164. if (err)
  165. return err;
  166. superio_select(sio->addr, SIO_LD_GPIO);
  167. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  168. dir = !!(dir & (1 << offset));
  169. if (dir)
  170. data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  171. else
  172. data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
  173. superio_exit(sio->addr);
  174. return !!(data & 1 << offset);
  175. }
  176. static int f7188x_gpio_direction_out(struct gpio_chip *chip,
  177. unsigned offset, int value)
  178. {
  179. int err;
  180. struct f7188x_gpio_bank *bank =
  181. container_of(chip, struct f7188x_gpio_bank, chip);
  182. struct f7188x_sio *sio = bank->data->sio;
  183. u8 dir, data_out;
  184. err = superio_enter(sio->addr);
  185. if (err)
  186. return err;
  187. superio_select(sio->addr, SIO_LD_GPIO);
  188. data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  189. if (value)
  190. data_out |= (1 << offset);
  191. else
  192. data_out &= ~(1 << offset);
  193. superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
  194. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  195. dir |= (1 << offset);
  196. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  197. superio_exit(sio->addr);
  198. return 0;
  199. }
  200. static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  201. {
  202. int err;
  203. struct f7188x_gpio_bank *bank =
  204. container_of(chip, struct f7188x_gpio_bank, chip);
  205. struct f7188x_sio *sio = bank->data->sio;
  206. u8 data_out;
  207. err = superio_enter(sio->addr);
  208. if (err)
  209. return;
  210. superio_select(sio->addr, SIO_LD_GPIO);
  211. data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  212. if (value)
  213. data_out |= (1 << offset);
  214. else
  215. data_out &= ~(1 << offset);
  216. superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
  217. superio_exit(sio->addr);
  218. }
  219. /*
  220. * Platform device and driver.
  221. */
  222. static int f7188x_gpio_probe(struct platform_device *pdev)
  223. {
  224. int err;
  225. int i;
  226. struct f7188x_sio *sio = pdev->dev.platform_data;
  227. struct f7188x_gpio_data *data;
  228. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  229. if (!data)
  230. return -ENOMEM;
  231. switch (sio->type) {
  232. case f71882fg:
  233. data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
  234. data->bank = f71882_gpio_bank;
  235. break;
  236. case f71889f:
  237. data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
  238. data->bank = f71889_gpio_bank;
  239. break;
  240. default:
  241. return -ENODEV;
  242. }
  243. data->sio = sio;
  244. platform_set_drvdata(pdev, data);
  245. /* For each GPIO bank, register a GPIO chip. */
  246. for (i = 0; i < data->nr_bank; i++) {
  247. struct f7188x_gpio_bank *bank = &data->bank[i];
  248. bank->chip.dev = &pdev->dev;
  249. bank->data = data;
  250. err = gpiochip_add(&bank->chip);
  251. if (err) {
  252. dev_err(&pdev->dev,
  253. "Failed to register gpiochip %d: %d\n",
  254. i, err);
  255. goto err_gpiochip;
  256. }
  257. }
  258. return 0;
  259. err_gpiochip:
  260. for (i = i - 1; i >= 0; i--) {
  261. struct f7188x_gpio_bank *bank = &data->bank[i];
  262. int tmp;
  263. tmp = gpiochip_remove(&bank->chip);
  264. if (tmp < 0)
  265. dev_err(&pdev->dev,
  266. "Failed to remove gpiochip %d: %d\n",
  267. i, tmp);
  268. }
  269. return err;
  270. }
  271. static int f7188x_gpio_remove(struct platform_device *pdev)
  272. {
  273. int err;
  274. int i;
  275. struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
  276. for (i = 0; i < data->nr_bank; i++) {
  277. struct f7188x_gpio_bank *bank = &data->bank[i];
  278. err = gpiochip_remove(&bank->chip);
  279. if (err) {
  280. dev_err(&pdev->dev,
  281. "Failed to remove GPIO gpiochip %d: %d\n",
  282. i, err);
  283. return err;
  284. }
  285. }
  286. return 0;
  287. }
  288. static int __init f7188x_find(int addr, struct f7188x_sio *sio)
  289. {
  290. int err;
  291. u16 devid;
  292. err = superio_enter(addr);
  293. if (err)
  294. return err;
  295. err = -ENODEV;
  296. devid = superio_inw(addr, SIO_MANID);
  297. if (devid != SIO_FINTEK_ID) {
  298. pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
  299. goto err;
  300. }
  301. devid = superio_inw(addr, SIO_DEVID);
  302. switch (devid) {
  303. case SIO_F71882_ID:
  304. sio->type = f71882fg;
  305. break;
  306. case SIO_F71889_ID:
  307. sio->type = f71889f;
  308. break;
  309. default:
  310. pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
  311. goto err;
  312. }
  313. sio->addr = addr;
  314. err = 0;
  315. pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
  316. f7188x_names[sio->type],
  317. (unsigned int) addr,
  318. (int) superio_inb(addr, SIO_DEVREV));
  319. err:
  320. superio_exit(addr);
  321. return err;
  322. }
  323. static struct platform_device *f7188x_gpio_pdev;
  324. static int __init
  325. f7188x_gpio_device_add(const struct f7188x_sio *sio)
  326. {
  327. int err;
  328. f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
  329. if (!f7188x_gpio_pdev)
  330. return -ENOMEM;
  331. err = platform_device_add_data(f7188x_gpio_pdev,
  332. sio, sizeof(*sio));
  333. if (err) {
  334. pr_err(DRVNAME "Platform data allocation failed\n");
  335. goto err;
  336. }
  337. err = platform_device_add(f7188x_gpio_pdev);
  338. if (err) {
  339. pr_err(DRVNAME "Device addition failed\n");
  340. goto err;
  341. }
  342. return 0;
  343. err:
  344. platform_device_put(f7188x_gpio_pdev);
  345. return err;
  346. }
  347. /*
  348. * Try to match a supported Fintech device by reading the (hard-wired)
  349. * configuration I/O ports. If available, then register both the platform
  350. * device and driver to support the GPIOs.
  351. */
  352. static struct platform_driver f7188x_gpio_driver = {
  353. .driver = {
  354. .owner = THIS_MODULE,
  355. .name = DRVNAME,
  356. },
  357. .probe = f7188x_gpio_probe,
  358. .remove = f7188x_gpio_remove,
  359. };
  360. static int __init f7188x_gpio_init(void)
  361. {
  362. int err;
  363. struct f7188x_sio sio;
  364. if (f7188x_find(0x2e, &sio) &&
  365. f7188x_find(0x4e, &sio))
  366. return -ENODEV;
  367. err = platform_driver_register(&f7188x_gpio_driver);
  368. if (!err) {
  369. err = f7188x_gpio_device_add(&sio);
  370. if (err)
  371. platform_driver_unregister(&f7188x_gpio_driver);
  372. }
  373. return err;
  374. }
  375. subsys_initcall(f7188x_gpio_init);
  376. static void __exit f7188x_gpio_exit(void)
  377. {
  378. platform_device_unregister(f7188x_gpio_pdev);
  379. platform_driver_unregister(&f7188x_gpio_driver);
  380. }
  381. module_exit(f7188x_gpio_exit);
  382. MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71882FG and F71889F");
  383. MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
  384. MODULE_LICENSE("GPL");