exynos-cpufreq.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337
  1. /*
  2. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * EXYNOS - CPU frequency scaling support for EXYNOS series
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/err.h>
  13. #include <linux/clk.h>
  14. #include <linux/io.h>
  15. #include <linux/slab.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/cpufreq.h>
  18. #include <linux/suspend.h>
  19. #include <plat/cpu.h>
  20. #include "exynos-cpufreq.h"
  21. static struct exynos_dvfs_info *exynos_info;
  22. static struct regulator *arm_regulator;
  23. static struct cpufreq_freqs freqs;
  24. static unsigned int locking_frequency;
  25. static bool frequency_locked;
  26. static DEFINE_MUTEX(cpufreq_lock);
  27. static int exynos_verify_speed(struct cpufreq_policy *policy)
  28. {
  29. return cpufreq_frequency_table_verify(policy,
  30. exynos_info->freq_table);
  31. }
  32. static unsigned int exynos_getspeed(unsigned int cpu)
  33. {
  34. return clk_get_rate(exynos_info->cpu_clk) / 1000;
  35. }
  36. static int exynos_cpufreq_get_index(unsigned int freq)
  37. {
  38. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  39. int index;
  40. for (index = 0;
  41. freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
  42. if (freq_table[index].frequency == freq)
  43. break;
  44. if (freq_table[index].frequency == CPUFREQ_TABLE_END)
  45. return -EINVAL;
  46. return index;
  47. }
  48. static int exynos_cpufreq_scale(unsigned int target_freq)
  49. {
  50. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  51. unsigned int *volt_table = exynos_info->volt_table;
  52. struct cpufreq_policy *policy = cpufreq_cpu_get(0);
  53. unsigned int arm_volt, safe_arm_volt = 0;
  54. unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
  55. int index, old_index;
  56. int ret = 0;
  57. freqs.old = policy->cur;
  58. freqs.new = target_freq;
  59. if (freqs.new == freqs.old)
  60. goto out;
  61. /*
  62. * The policy max have been changed so that we cannot get proper
  63. * old_index with cpufreq_frequency_table_target(). Thus, ignore
  64. * policy and get the index from the raw freqeuncy table.
  65. */
  66. old_index = exynos_cpufreq_get_index(freqs.old);
  67. if (old_index < 0) {
  68. ret = old_index;
  69. goto out;
  70. }
  71. index = exynos_cpufreq_get_index(target_freq);
  72. if (index < 0) {
  73. ret = index;
  74. goto out;
  75. }
  76. /*
  77. * ARM clock source will be changed APLL to MPLL temporary
  78. * To support this level, need to control regulator for
  79. * required voltage level
  80. */
  81. if (exynos_info->need_apll_change != NULL) {
  82. if (exynos_info->need_apll_change(old_index, index) &&
  83. (freq_table[index].frequency < mpll_freq_khz) &&
  84. (freq_table[old_index].frequency < mpll_freq_khz))
  85. safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
  86. }
  87. arm_volt = volt_table[index];
  88. cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  89. /* When the new frequency is higher than current frequency */
  90. if ((freqs.new > freqs.old) && !safe_arm_volt) {
  91. /* Firstly, voltage up to increase frequency */
  92. ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
  93. if (ret) {
  94. pr_err("%s: failed to set cpu voltage to %d\n",
  95. __func__, arm_volt);
  96. freqs.new = freqs.old;
  97. goto post_notify;
  98. }
  99. }
  100. if (safe_arm_volt) {
  101. ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
  102. safe_arm_volt);
  103. if (ret) {
  104. pr_err("%s: failed to set cpu voltage to %d\n",
  105. __func__, safe_arm_volt);
  106. freqs.new = freqs.old;
  107. goto post_notify;
  108. }
  109. }
  110. exynos_info->set_freq(old_index, index);
  111. post_notify:
  112. cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  113. if (ret)
  114. goto out;
  115. /* When the new frequency is lower than current frequency */
  116. if ((freqs.new < freqs.old) ||
  117. ((freqs.new > freqs.old) && safe_arm_volt)) {
  118. /* down the voltage after frequency change */
  119. regulator_set_voltage(arm_regulator, arm_volt,
  120. arm_volt);
  121. if (ret) {
  122. pr_err("%s: failed to set cpu voltage to %d\n",
  123. __func__, arm_volt);
  124. goto out;
  125. }
  126. }
  127. out:
  128. cpufreq_cpu_put(policy);
  129. return ret;
  130. }
  131. static int exynos_target(struct cpufreq_policy *policy,
  132. unsigned int target_freq,
  133. unsigned int relation)
  134. {
  135. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  136. unsigned int index;
  137. unsigned int new_freq;
  138. int ret = 0;
  139. mutex_lock(&cpufreq_lock);
  140. if (frequency_locked)
  141. goto out;
  142. if (cpufreq_frequency_table_target(policy, freq_table,
  143. target_freq, relation, &index)) {
  144. ret = -EINVAL;
  145. goto out;
  146. }
  147. new_freq = freq_table[index].frequency;
  148. ret = exynos_cpufreq_scale(new_freq);
  149. out:
  150. mutex_unlock(&cpufreq_lock);
  151. return ret;
  152. }
  153. #ifdef CONFIG_PM
  154. static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
  155. {
  156. return 0;
  157. }
  158. static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
  159. {
  160. return 0;
  161. }
  162. #endif
  163. /**
  164. * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
  165. * context
  166. * @notifier
  167. * @pm_event
  168. * @v
  169. *
  170. * While frequency_locked == true, target() ignores every frequency but
  171. * locking_frequency. The locking_frequency value is the initial frequency,
  172. * which is set by the bootloader. In order to eliminate possible
  173. * inconsistency in clock values, we save and restore frequencies during
  174. * suspend and resume and block CPUFREQ activities. Note that the standard
  175. * suspend/resume cannot be used as they are too deep (syscore_ops) for
  176. * regulator actions.
  177. */
  178. static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
  179. unsigned long pm_event, void *v)
  180. {
  181. int ret;
  182. switch (pm_event) {
  183. case PM_SUSPEND_PREPARE:
  184. mutex_lock(&cpufreq_lock);
  185. frequency_locked = true;
  186. mutex_unlock(&cpufreq_lock);
  187. ret = exynos_cpufreq_scale(locking_frequency);
  188. if (ret < 0)
  189. return NOTIFY_BAD;
  190. break;
  191. case PM_POST_SUSPEND:
  192. mutex_lock(&cpufreq_lock);
  193. frequency_locked = false;
  194. mutex_unlock(&cpufreq_lock);
  195. break;
  196. }
  197. return NOTIFY_OK;
  198. }
  199. static struct notifier_block exynos_cpufreq_nb = {
  200. .notifier_call = exynos_cpufreq_pm_notifier,
  201. };
  202. static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
  203. {
  204. policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
  205. cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
  206. /* set the transition latency value */
  207. policy->cpuinfo.transition_latency = 100000;
  208. cpumask_setall(policy->cpus);
  209. return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
  210. }
  211. static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  212. {
  213. cpufreq_frequency_table_put_attr(policy->cpu);
  214. return 0;
  215. }
  216. static struct freq_attr *exynos_cpufreq_attr[] = {
  217. &cpufreq_freq_attr_scaling_available_freqs,
  218. NULL,
  219. };
  220. static struct cpufreq_driver exynos_driver = {
  221. .flags = CPUFREQ_STICKY,
  222. .verify = exynos_verify_speed,
  223. .target = exynos_target,
  224. .get = exynos_getspeed,
  225. .init = exynos_cpufreq_cpu_init,
  226. .exit = exynos_cpufreq_cpu_exit,
  227. .name = "exynos_cpufreq",
  228. .attr = exynos_cpufreq_attr,
  229. #ifdef CONFIG_PM
  230. .suspend = exynos_cpufreq_suspend,
  231. .resume = exynos_cpufreq_resume,
  232. #endif
  233. };
  234. static int __init exynos_cpufreq_init(void)
  235. {
  236. int ret = -EINVAL;
  237. exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
  238. if (!exynos_info)
  239. return -ENOMEM;
  240. if (soc_is_exynos4210())
  241. ret = exynos4210_cpufreq_init(exynos_info);
  242. else if (soc_is_exynos4212() || soc_is_exynos4412())
  243. ret = exynos4x12_cpufreq_init(exynos_info);
  244. else if (soc_is_exynos5250())
  245. ret = exynos5250_cpufreq_init(exynos_info);
  246. else
  247. return 0;
  248. if (ret)
  249. goto err_vdd_arm;
  250. if (exynos_info->set_freq == NULL) {
  251. pr_err("%s: No set_freq function (ERR)\n", __func__);
  252. goto err_vdd_arm;
  253. }
  254. arm_regulator = regulator_get(NULL, "vdd_arm");
  255. if (IS_ERR(arm_regulator)) {
  256. pr_err("%s: failed to get resource vdd_arm\n", __func__);
  257. goto err_vdd_arm;
  258. }
  259. locking_frequency = exynos_getspeed(0);
  260. register_pm_notifier(&exynos_cpufreq_nb);
  261. if (cpufreq_register_driver(&exynos_driver)) {
  262. pr_err("%s: failed to register cpufreq driver\n", __func__);
  263. goto err_cpufreq;
  264. }
  265. return 0;
  266. err_cpufreq:
  267. unregister_pm_notifier(&exynos_cpufreq_nb);
  268. regulator_put(arm_regulator);
  269. err_vdd_arm:
  270. kfree(exynos_info);
  271. return -EINVAL;
  272. }
  273. late_initcall(exynos_cpufreq_init);