dbx500-cpufreq.c 4.2 KB

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  1. /*
  2. * Copyright (C) STMicroelectronics 2009
  3. * Copyright (C) ST-Ericsson SA 2010-2012
  4. *
  5. * License Terms: GNU General Public License v2
  6. * Author: Sundar Iyer <sundar.iyer@stericsson.com>
  7. * Author: Martin Persson <martin.persson@stericsson.com>
  8. * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/cpufreq.h>
  13. #include <linux/delay.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/clk.h>
  17. static struct cpufreq_frequency_table *freq_table;
  18. static struct clk *armss_clk;
  19. static struct freq_attr *dbx500_cpufreq_attr[] = {
  20. &cpufreq_freq_attr_scaling_available_freqs,
  21. NULL,
  22. };
  23. static int dbx500_cpufreq_verify_speed(struct cpufreq_policy *policy)
  24. {
  25. return cpufreq_frequency_table_verify(policy, freq_table);
  26. }
  27. static int dbx500_cpufreq_target(struct cpufreq_policy *policy,
  28. unsigned int target_freq,
  29. unsigned int relation)
  30. {
  31. struct cpufreq_freqs freqs;
  32. unsigned int idx;
  33. int ret;
  34. /* Lookup the next frequency */
  35. if (cpufreq_frequency_table_target(policy, freq_table, target_freq,
  36. relation, &idx))
  37. return -EINVAL;
  38. freqs.old = policy->cur;
  39. freqs.new = freq_table[idx].frequency;
  40. if (freqs.old == freqs.new)
  41. return 0;
  42. /* pre-change notification */
  43. cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  44. /* update armss clk frequency */
  45. ret = clk_set_rate(armss_clk, freqs.new * 1000);
  46. if (ret) {
  47. pr_err("dbx500-cpufreq: Failed to set armss_clk to %d Hz: error %d\n",
  48. freqs.new * 1000, ret);
  49. freqs.new = freqs.old;
  50. }
  51. /* post change notification */
  52. cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  53. return ret;
  54. }
  55. static unsigned int dbx500_cpufreq_getspeed(unsigned int cpu)
  56. {
  57. int i = 0;
  58. unsigned long freq = clk_get_rate(armss_clk) / 1000;
  59. /* The value is rounded to closest frequency in the defined table. */
  60. while (freq_table[i + 1].frequency != CPUFREQ_TABLE_END) {
  61. if (freq < freq_table[i].frequency +
  62. (freq_table[i + 1].frequency - freq_table[i].frequency) / 2)
  63. return freq_table[i].frequency;
  64. i++;
  65. }
  66. return freq_table[i].frequency;
  67. }
  68. static int dbx500_cpufreq_init(struct cpufreq_policy *policy)
  69. {
  70. int res;
  71. /* get policy fields based on the table */
  72. res = cpufreq_frequency_table_cpuinfo(policy, freq_table);
  73. if (!res)
  74. cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
  75. else {
  76. pr_err("dbx500-cpufreq: Failed to read policy table\n");
  77. return res;
  78. }
  79. policy->min = policy->cpuinfo.min_freq;
  80. policy->max = policy->cpuinfo.max_freq;
  81. policy->cur = dbx500_cpufreq_getspeed(policy->cpu);
  82. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  83. /*
  84. * FIXME : Need to take time measurement across the target()
  85. * function with no/some/all drivers in the notification
  86. * list.
  87. */
  88. policy->cpuinfo.transition_latency = 20 * 1000; /* in ns */
  89. /* policy sharing between dual CPUs */
  90. cpumask_setall(policy->cpus);
  91. return 0;
  92. }
  93. static struct cpufreq_driver dbx500_cpufreq_driver = {
  94. .flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS,
  95. .verify = dbx500_cpufreq_verify_speed,
  96. .target = dbx500_cpufreq_target,
  97. .get = dbx500_cpufreq_getspeed,
  98. .init = dbx500_cpufreq_init,
  99. .name = "DBX500",
  100. .attr = dbx500_cpufreq_attr,
  101. };
  102. static int dbx500_cpufreq_probe(struct platform_device *pdev)
  103. {
  104. int i = 0;
  105. freq_table = dev_get_platdata(&pdev->dev);
  106. if (!freq_table) {
  107. pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n");
  108. return -ENODEV;
  109. }
  110. armss_clk = clk_get(&pdev->dev, "armss");
  111. if (IS_ERR(armss_clk)) {
  112. pr_err("dbx500-cpufreq: Failed to get armss clk\n");
  113. return PTR_ERR(armss_clk);
  114. }
  115. pr_info("dbx500-cpufreq: Available frequencies:\n");
  116. while (freq_table[i].frequency != CPUFREQ_TABLE_END) {
  117. pr_info(" %d Mhz\n", freq_table[i].frequency/1000);
  118. i++;
  119. }
  120. return cpufreq_register_driver(&dbx500_cpufreq_driver);
  121. }
  122. static struct platform_driver dbx500_cpufreq_plat_driver = {
  123. .driver = {
  124. .name = "cpufreq-ux500",
  125. .owner = THIS_MODULE,
  126. },
  127. .probe = dbx500_cpufreq_probe,
  128. };
  129. static int __init dbx500_cpufreq_register(void)
  130. {
  131. return platform_driver_register(&dbx500_cpufreq_plat_driver);
  132. }
  133. device_initcall(dbx500_cpufreq_register);
  134. MODULE_LICENSE("GPL v2");
  135. MODULE_DESCRIPTION("cpufreq driver for DBX500");