irq.c 9.0 KB

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  1. /*
  2. * Copyright IBM Corp. 2004, 2011
  3. * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
  4. * Holger Smolinski <Holger.Smolinski@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. *
  7. * This file contains interrupt related functions.
  8. */
  9. #include <linux/kernel_stat.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/seq_file.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/profile.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ftrace.h>
  17. #include <linux/errno.h>
  18. #include <linux/slab.h>
  19. #include <linux/cpu.h>
  20. #include <asm/irq_regs.h>
  21. #include <asm/cputime.h>
  22. #include <asm/lowcore.h>
  23. #include <asm/irq.h>
  24. #include <asm/hw_irq.h>
  25. #include "entry.h"
  26. DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
  27. EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
  28. struct irq_class {
  29. char *name;
  30. char *desc;
  31. };
  32. /*
  33. * The list of "main" irq classes on s390. This is the list of interrupts
  34. * that appear both in /proc/stat ("intr" line) and /proc/interrupts.
  35. * Historically only external and I/O interrupts have been part of /proc/stat.
  36. * We can't add the split external and I/O sub classes since the first field
  37. * in the "intr" line in /proc/stat is supposed to be the sum of all other
  38. * fields.
  39. * Since the external and I/O interrupt fields are already sums we would end
  40. * up with having a sum which accounts each interrupt twice.
  41. */
  42. static const struct irq_class irqclass_main_desc[NR_IRQS_BASE] = {
  43. [EXT_INTERRUPT] = {.name = "EXT"},
  44. [IO_INTERRUPT] = {.name = "I/O"},
  45. [THIN_INTERRUPT] = {.name = "AIO"},
  46. };
  47. /*
  48. * The list of split external and I/O interrupts that appear only in
  49. * /proc/interrupts.
  50. * In addition this list contains non external / I/O events like NMIs.
  51. */
  52. static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
  53. [IRQEXT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
  54. [IRQEXT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
  55. [IRQEXT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
  56. [IRQEXT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
  57. [IRQEXT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
  58. [IRQEXT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
  59. [IRQEXT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
  60. [IRQEXT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
  61. [IRQEXT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
  62. [IRQEXT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
  63. [IRQEXT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
  64. [IRQEXT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
  65. [IRQEXT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
  66. [IRQIO_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
  67. [IRQIO_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
  68. [IRQIO_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
  69. [IRQIO_C15] = {.name = "C15", .desc = "[I/O] 3215"},
  70. [IRQIO_C70] = {.name = "C70", .desc = "[I/O] 3270"},
  71. [IRQIO_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
  72. [IRQIO_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
  73. [IRQIO_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
  74. [IRQIO_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
  75. [IRQIO_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
  76. [IRQIO_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
  77. [IRQIO_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
  78. [IRQIO_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
  79. [IRQIO_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
  80. [IRQIO_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
  81. [IRQIO_VIR] = {.name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
  82. [NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
  83. [CPU_RST] = {.name = "RST", .desc = "[CPU] CPU Restart"},
  84. };
  85. void __init init_IRQ(void)
  86. {
  87. irq_reserve_irqs(0, THIN_INTERRUPT);
  88. init_cio_interrupts();
  89. init_airq_interrupts();
  90. init_ext_interrupts();
  91. }
  92. void do_IRQ(struct pt_regs *regs, int irq)
  93. {
  94. struct pt_regs *old_regs;
  95. old_regs = set_irq_regs(regs);
  96. irq_enter();
  97. if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
  98. /* Serve timer interrupts first. */
  99. clock_comparator_work();
  100. generic_handle_irq(irq);
  101. irq_exit();
  102. set_irq_regs(old_regs);
  103. }
  104. /*
  105. * show_interrupts is needed by /proc/interrupts.
  106. */
  107. int show_interrupts(struct seq_file *p, void *v)
  108. {
  109. int irq = *(loff_t *) v;
  110. int cpu;
  111. get_online_cpus();
  112. if (irq == 0) {
  113. seq_puts(p, " ");
  114. for_each_online_cpu(cpu)
  115. seq_printf(p, "CPU%d ", cpu);
  116. seq_putc(p, '\n');
  117. goto out;
  118. }
  119. if (irq < NR_IRQS) {
  120. if (irq >= NR_IRQS_BASE)
  121. goto out;
  122. seq_printf(p, "%s: ", irqclass_main_desc[irq].name);
  123. for_each_online_cpu(cpu)
  124. seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
  125. seq_putc(p, '\n');
  126. goto out;
  127. }
  128. for (irq = 0; irq < NR_ARCH_IRQS; irq++) {
  129. seq_printf(p, "%s: ", irqclass_sub_desc[irq].name);
  130. for_each_online_cpu(cpu)
  131. seq_printf(p, "%10u ",
  132. per_cpu(irq_stat, cpu).irqs[irq]);
  133. if (irqclass_sub_desc[irq].desc)
  134. seq_printf(p, " %s", irqclass_sub_desc[irq].desc);
  135. seq_putc(p, '\n');
  136. }
  137. out:
  138. put_online_cpus();
  139. return 0;
  140. }
  141. int arch_show_interrupts(struct seq_file *p, int prec)
  142. {
  143. return 0;
  144. }
  145. /*
  146. * Switch to the asynchronous interrupt stack for softirq execution.
  147. */
  148. asmlinkage void do_softirq(void)
  149. {
  150. unsigned long flags, old, new;
  151. if (in_interrupt())
  152. return;
  153. local_irq_save(flags);
  154. if (local_softirq_pending()) {
  155. /* Get current stack pointer. */
  156. asm volatile("la %0,0(15)" : "=a" (old));
  157. /* Check against async. stack address range. */
  158. new = S390_lowcore.async_stack;
  159. if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
  160. /* Need to switch to the async. stack. */
  161. new -= STACK_FRAME_OVERHEAD;
  162. ((struct stack_frame *) new)->back_chain = old;
  163. asm volatile(" la 15,0(%0)\n"
  164. " basr 14,%2\n"
  165. " la 15,0(%1)\n"
  166. : : "a" (new), "a" (old),
  167. "a" (__do_softirq)
  168. : "0", "1", "2", "3", "4", "5", "14",
  169. "cc", "memory" );
  170. } else {
  171. /* We are already on the async stack. */
  172. __do_softirq();
  173. }
  174. }
  175. local_irq_restore(flags);
  176. }
  177. /*
  178. * ext_int_hash[index] is the list head for all external interrupts that hash
  179. * to this index.
  180. */
  181. static struct hlist_head ext_int_hash[32] ____cacheline_aligned;
  182. struct ext_int_info {
  183. ext_int_handler_t handler;
  184. struct hlist_node entry;
  185. struct rcu_head rcu;
  186. u16 code;
  187. };
  188. /* ext_int_hash_lock protects the handler lists for external interrupts */
  189. static DEFINE_SPINLOCK(ext_int_hash_lock);
  190. static inline int ext_hash(u16 code)
  191. {
  192. BUILD_BUG_ON(!is_power_of_2(ARRAY_SIZE(ext_int_hash)));
  193. return (code + (code >> 9)) & (ARRAY_SIZE(ext_int_hash) - 1);
  194. }
  195. int register_external_interrupt(u16 code, ext_int_handler_t handler)
  196. {
  197. struct ext_int_info *p;
  198. unsigned long flags;
  199. int index;
  200. p = kmalloc(sizeof(*p), GFP_ATOMIC);
  201. if (!p)
  202. return -ENOMEM;
  203. p->code = code;
  204. p->handler = handler;
  205. index = ext_hash(code);
  206. spin_lock_irqsave(&ext_int_hash_lock, flags);
  207. hlist_add_head_rcu(&p->entry, &ext_int_hash[index]);
  208. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  209. return 0;
  210. }
  211. EXPORT_SYMBOL(register_external_interrupt);
  212. int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
  213. {
  214. struct ext_int_info *p;
  215. unsigned long flags;
  216. int index = ext_hash(code);
  217. spin_lock_irqsave(&ext_int_hash_lock, flags);
  218. hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
  219. if (p->code == code && p->handler == handler) {
  220. hlist_del_rcu(&p->entry);
  221. kfree_rcu(p, rcu);
  222. }
  223. }
  224. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  225. return 0;
  226. }
  227. EXPORT_SYMBOL(unregister_external_interrupt);
  228. static irqreturn_t do_ext_interrupt(int irq, void *dummy)
  229. {
  230. struct pt_regs *regs = get_irq_regs();
  231. struct ext_code ext_code;
  232. struct ext_int_info *p;
  233. int index;
  234. ext_code = *(struct ext_code *) &regs->int_code;
  235. if (ext_code.code != 0x1004)
  236. __get_cpu_var(s390_idle).nohz_delay = 1;
  237. index = ext_hash(ext_code.code);
  238. rcu_read_lock();
  239. hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
  240. if (unlikely(p->code != ext_code.code))
  241. continue;
  242. p->handler(ext_code, regs->int_parm, regs->int_parm_long);
  243. }
  244. rcu_read_unlock();
  245. return IRQ_HANDLED;
  246. }
  247. static struct irqaction external_interrupt = {
  248. .name = "EXT",
  249. .handler = do_ext_interrupt,
  250. };
  251. void __init init_ext_interrupts(void)
  252. {
  253. int idx;
  254. for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
  255. INIT_HLIST_HEAD(&ext_int_hash[idx]);
  256. irq_set_chip_and_handler(EXT_INTERRUPT,
  257. &dummy_irq_chip, handle_percpu_irq);
  258. setup_irq(EXT_INTERRUPT, &external_interrupt);
  259. }
  260. static DEFINE_SPINLOCK(irq_subclass_lock);
  261. static unsigned char irq_subclass_refcount[64];
  262. void irq_subclass_register(enum irq_subclass subclass)
  263. {
  264. spin_lock(&irq_subclass_lock);
  265. if (!irq_subclass_refcount[subclass])
  266. ctl_set_bit(0, subclass);
  267. irq_subclass_refcount[subclass]++;
  268. spin_unlock(&irq_subclass_lock);
  269. }
  270. EXPORT_SYMBOL(irq_subclass_register);
  271. void irq_subclass_unregister(enum irq_subclass subclass)
  272. {
  273. spin_lock(&irq_subclass_lock);
  274. irq_subclass_refcount[subclass]--;
  275. if (!irq_subclass_refcount[subclass])
  276. ctl_clear_bit(0, subclass);
  277. spin_unlock(&irq_subclass_lock);
  278. }
  279. EXPORT_SYMBOL(irq_subclass_unregister);