io.c 4.5 KB

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  1. /* arch/arm/mach-msm/io.c
  2. *
  3. * MSM7K, QSD io support
  4. *
  5. * Copyright (C) 2007 Google, Inc.
  6. * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
  7. * Author: Brian Swetland <swetland@google.com>
  8. *
  9. * This software is licensed under the terms of the GNU General Public
  10. * License version 2, as published by the Free Software Foundation, and
  11. * may be copied, distributed, and modified under those terms.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/bug.h>
  21. #include <linux/init.h>
  22. #include <linux/io.h>
  23. #include <linux/export.h>
  24. #include <mach/hardware.h>
  25. #include <asm/page.h>
  26. #include <mach/msm_iomap.h>
  27. #include <asm/mach/map.h>
  28. #include "common.h"
  29. #define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \
  30. .virtual = (unsigned long) MSM_##name##_BASE, \
  31. .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
  32. .length = chip##_##name##_SIZE, \
  33. .type = mem_type, \
  34. }
  35. #define MSM_DEVICE_TYPE(name, mem_type) \
  36. MSM_CHIP_DEVICE_TYPE(name, MSM, mem_type)
  37. #define MSM_CHIP_DEVICE(name, chip) \
  38. MSM_CHIP_DEVICE_TYPE(name, chip, MT_DEVICE)
  39. #define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
  40. #if defined(CONFIG_ARCH_MSM7X00A)
  41. static struct map_desc msm_io_desc[] __initdata = {
  42. MSM_DEVICE_TYPE(VIC, MT_DEVICE_NONSHARED),
  43. MSM_CHIP_DEVICE_TYPE(CSR, MSM7X00, MT_DEVICE_NONSHARED),
  44. MSM_DEVICE_TYPE(DMOV, MT_DEVICE_NONSHARED),
  45. MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED),
  46. MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED),
  47. MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED),
  48. {
  49. .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
  50. .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  51. .length = MSM_SHARED_RAM_SIZE,
  52. .type = MT_DEVICE,
  53. },
  54. #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
  55. defined(CONFIG_DEBUG_MSM_UART3)
  56. {
  57. /* Must be last: virtual and pfn filled in by debug_ll_addr() */
  58. .length = SZ_4K,
  59. .type = MT_DEVICE_NONSHARED,
  60. }
  61. #endif
  62. };
  63. void __init msm_map_common_io(void)
  64. {
  65. size_t size = ARRAY_SIZE(msm_io_desc);
  66. /* Make sure the peripheral register window is closed, since
  67. * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
  68. * pages are peripheral interface or not.
  69. */
  70. asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
  71. #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
  72. defined(CONFIG_DEBUG_MSM_UART3)
  73. debug_ll_addr(&msm_io_desc[size - 1].pfn,
  74. &msm_io_desc[size - 1].virtual);
  75. msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn);
  76. #endif
  77. iotable_init(msm_io_desc, size);
  78. }
  79. #endif
  80. #ifdef CONFIG_ARCH_QSD8X50
  81. static struct map_desc qsd8x50_io_desc[] __initdata = {
  82. MSM_DEVICE(VIC),
  83. MSM_CHIP_DEVICE(CSR, QSD8X50),
  84. MSM_DEVICE(DMOV),
  85. MSM_CHIP_DEVICE(GPIO1, QSD8X50),
  86. MSM_CHIP_DEVICE(GPIO2, QSD8X50),
  87. MSM_DEVICE(CLK_CTL),
  88. MSM_DEVICE(SIRC),
  89. MSM_DEVICE(SCPLL),
  90. MSM_DEVICE(AD5),
  91. MSM_DEVICE(MDC),
  92. {
  93. .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
  94. .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  95. .length = MSM_SHARED_RAM_SIZE,
  96. .type = MT_DEVICE,
  97. },
  98. };
  99. void __init msm_map_qsd8x50_io(void)
  100. {
  101. debug_ll_io_init();
  102. iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
  103. }
  104. #endif /* CONFIG_ARCH_QSD8X50 */
  105. #ifdef CONFIG_ARCH_MSM7X30
  106. static struct map_desc msm7x30_io_desc[] __initdata = {
  107. MSM_DEVICE(VIC),
  108. MSM_CHIP_DEVICE(CSR, MSM7X30),
  109. MSM_DEVICE(DMOV),
  110. MSM_CHIP_DEVICE(GPIO1, MSM7X30),
  111. MSM_CHIP_DEVICE(GPIO2, MSM7X30),
  112. MSM_DEVICE(CLK_CTL),
  113. MSM_DEVICE(CLK_CTL_SH2),
  114. MSM_DEVICE(AD5),
  115. MSM_DEVICE(MDC),
  116. MSM_DEVICE(ACC),
  117. MSM_DEVICE(SAW),
  118. MSM_DEVICE(GCC),
  119. MSM_DEVICE(TCSR),
  120. {
  121. .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
  122. .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  123. .length = MSM_SHARED_RAM_SIZE,
  124. .type = MT_DEVICE,
  125. },
  126. };
  127. void __init msm_map_msm7x30_io(void)
  128. {
  129. debug_ll_io_init();
  130. iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
  131. }
  132. #endif /* CONFIG_ARCH_MSM7X30 */
  133. #ifdef CONFIG_ARCH_MSM7X00A
  134. void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
  135. unsigned int mtype, void *caller)
  136. {
  137. if (mtype == MT_DEVICE) {
  138. /* The peripherals in the 88000000 - D0000000 range
  139. * are only accessible by type MT_DEVICE_NONSHARED.
  140. * Adjust mtype as necessary to make this "just work."
  141. */
  142. if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
  143. mtype = MT_DEVICE_NONSHARED;
  144. }
  145. return __arm_ioremap_caller(phys_addr, size, mtype, caller);
  146. }
  147. #endif