devices-tnetv107x.c 10 KB

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  1. /*
  2. * Texas Instruments TNETV107X SoC devices
  3. *
  4. * Copyright (C) 2010 Texas Instruments
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/clk.h>
  20. #include <linux/slab.h>
  21. #include <linux/platform_data/edma.h>
  22. #include <mach/common.h>
  23. #include <mach/irqs.h>
  24. #include <mach/tnetv107x.h>
  25. #include "clock.h"
  26. /* Base addresses for on-chip devices */
  27. #define TNETV107X_TPCC_BASE 0x01c00000
  28. #define TNETV107X_TPTC0_BASE 0x01c10000
  29. #define TNETV107X_TPTC1_BASE 0x01c10400
  30. #define TNETV107X_WDOG_BASE 0x08086700
  31. #define TNETV107X_TSC_BASE 0x08088500
  32. #define TNETV107X_SDIO0_BASE 0x08088700
  33. #define TNETV107X_SDIO1_BASE 0x08088800
  34. #define TNETV107X_KEYPAD_BASE 0x08088a00
  35. #define TNETV107X_SSP_BASE 0x08088c00
  36. #define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000
  37. #define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
  38. #define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000
  39. #define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000
  40. #define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000
  41. /* TNETV107X specific EDMA3 information */
  42. #define EDMA_TNETV107X_NUM_DMACH 64
  43. #define EDMA_TNETV107X_NUM_TCC 64
  44. #define EDMA_TNETV107X_NUM_PARAMENTRY 128
  45. #define EDMA_TNETV107X_NUM_EVQUE 2
  46. #define EDMA_TNETV107X_NUM_TC 2
  47. #define EDMA_TNETV107X_CHMAP_EXIST 0
  48. #define EDMA_TNETV107X_NUM_REGIONS 4
  49. #define TNETV107X_DMACH2EVENT_MAP0 0x3C0CE000u
  50. #define TNETV107X_DMACH2EVENT_MAP1 0x000FFFFFu
  51. #define TNETV107X_DMACH_SDIO0_RX 26
  52. #define TNETV107X_DMACH_SDIO0_TX 27
  53. #define TNETV107X_DMACH_SDIO1_RX 28
  54. #define TNETV107X_DMACH_SDIO1_TX 29
  55. static s8 edma_tc_mapping[][2] = {
  56. /* event queue no TC no */
  57. { 0, 0 },
  58. { 1, 1 },
  59. { -1, -1 }
  60. };
  61. static s8 edma_priority_mapping[][2] = {
  62. /* event queue no Prio */
  63. { 0, 3 },
  64. { 1, 7 },
  65. { -1, -1 }
  66. };
  67. static struct edma_soc_info edma_cc0_info = {
  68. .n_channel = EDMA_TNETV107X_NUM_DMACH,
  69. .n_region = EDMA_TNETV107X_NUM_REGIONS,
  70. .n_slot = EDMA_TNETV107X_NUM_PARAMENTRY,
  71. .n_tc = EDMA_TNETV107X_NUM_TC,
  72. .n_cc = 1,
  73. .queue_tc_mapping = edma_tc_mapping,
  74. .queue_priority_mapping = edma_priority_mapping,
  75. .default_queue = EVENTQ_1,
  76. };
  77. static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
  78. &edma_cc0_info,
  79. };
  80. static struct resource edma_resources[] = {
  81. {
  82. .name = "edma_cc0",
  83. .start = TNETV107X_TPCC_BASE,
  84. .end = TNETV107X_TPCC_BASE + SZ_32K - 1,
  85. .flags = IORESOURCE_MEM,
  86. },
  87. {
  88. .name = "edma_tc0",
  89. .start = TNETV107X_TPTC0_BASE,
  90. .end = TNETV107X_TPTC0_BASE + SZ_1K - 1,
  91. .flags = IORESOURCE_MEM,
  92. },
  93. {
  94. .name = "edma_tc1",
  95. .start = TNETV107X_TPTC1_BASE,
  96. .end = TNETV107X_TPTC1_BASE + SZ_1K - 1,
  97. .flags = IORESOURCE_MEM,
  98. },
  99. {
  100. .name = "edma0",
  101. .start = IRQ_TNETV107X_TPCC,
  102. .flags = IORESOURCE_IRQ,
  103. },
  104. {
  105. .name = "edma0_err",
  106. .start = IRQ_TNETV107X_TPCC_ERR,
  107. .flags = IORESOURCE_IRQ,
  108. },
  109. };
  110. static struct platform_device edma_device = {
  111. .name = "edma",
  112. .id = -1,
  113. .num_resources = ARRAY_SIZE(edma_resources),
  114. .resource = edma_resources,
  115. .dev.platform_data = tnetv107x_edma_info,
  116. };
  117. static struct plat_serial8250_port serial0_platform_data[] = {
  118. {
  119. .mapbase = TNETV107X_UART0_BASE,
  120. .irq = IRQ_TNETV107X_UART0,
  121. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  122. UPF_FIXED_TYPE | UPF_IOREMAP,
  123. .type = PORT_AR7,
  124. .iotype = UPIO_MEM32,
  125. .regshift = 2,
  126. },
  127. {
  128. .flags = 0,
  129. }
  130. };
  131. static struct plat_serial8250_port serial1_platform_data[] = {
  132. {
  133. .mapbase = TNETV107X_UART1_BASE,
  134. .irq = IRQ_TNETV107X_UART1,
  135. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  136. UPF_FIXED_TYPE | UPF_IOREMAP,
  137. .type = PORT_AR7,
  138. .iotype = UPIO_MEM32,
  139. .regshift = 2,
  140. },
  141. {
  142. .flags = 0,
  143. }
  144. };
  145. static struct plat_serial8250_port serial2_platform_data[] = {
  146. {
  147. .mapbase = TNETV107X_UART2_BASE,
  148. .irq = IRQ_TNETV107X_UART2,
  149. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  150. UPF_FIXED_TYPE | UPF_IOREMAP,
  151. .type = PORT_AR7,
  152. .iotype = UPIO_MEM32,
  153. .regshift = 2,
  154. },
  155. {
  156. .flags = 0,
  157. }
  158. };
  159. struct platform_device tnetv107x_serial_device[] = {
  160. {
  161. .name = "serial8250",
  162. .id = PLAT8250_DEV_PLATFORM,
  163. .dev.platform_data = serial0_platform_data,
  164. },
  165. {
  166. .name = "serial8250",
  167. .id = PLAT8250_DEV_PLATFORM1,
  168. .dev.platform_data = serial1_platform_data,
  169. },
  170. {
  171. .name = "serial8250",
  172. .id = PLAT8250_DEV_PLATFORM2,
  173. .dev.platform_data = serial2_platform_data,
  174. },
  175. {
  176. }
  177. };
  178. static struct resource mmc0_resources[] = {
  179. { /* Memory mapped registers */
  180. .start = TNETV107X_SDIO0_BASE,
  181. .end = TNETV107X_SDIO0_BASE + 0x0ff,
  182. .flags = IORESOURCE_MEM
  183. },
  184. { /* MMC interrupt */
  185. .start = IRQ_TNETV107X_MMC0,
  186. .flags = IORESOURCE_IRQ
  187. },
  188. { /* SDIO interrupt */
  189. .start = IRQ_TNETV107X_SDIO0,
  190. .flags = IORESOURCE_IRQ
  191. },
  192. { /* DMA RX */
  193. .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
  194. .flags = IORESOURCE_DMA
  195. },
  196. { /* DMA TX */
  197. .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
  198. .flags = IORESOURCE_DMA
  199. },
  200. };
  201. static struct resource mmc1_resources[] = {
  202. { /* Memory mapped registers */
  203. .start = TNETV107X_SDIO1_BASE,
  204. .end = TNETV107X_SDIO1_BASE + 0x0ff,
  205. .flags = IORESOURCE_MEM
  206. },
  207. { /* MMC interrupt */
  208. .start = IRQ_TNETV107X_MMC1,
  209. .flags = IORESOURCE_IRQ
  210. },
  211. { /* SDIO interrupt */
  212. .start = IRQ_TNETV107X_SDIO1,
  213. .flags = IORESOURCE_IRQ
  214. },
  215. { /* DMA RX */
  216. .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
  217. .flags = IORESOURCE_DMA
  218. },
  219. { /* DMA TX */
  220. .start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
  221. .flags = IORESOURCE_DMA
  222. },
  223. };
  224. static u64 mmc0_dma_mask = DMA_BIT_MASK(32);
  225. static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
  226. static struct platform_device mmc_devices[2] = {
  227. {
  228. .name = "dm6441-mmc",
  229. .id = 0,
  230. .dev = {
  231. .dma_mask = &mmc0_dma_mask,
  232. .coherent_dma_mask = DMA_BIT_MASK(32),
  233. },
  234. .num_resources = ARRAY_SIZE(mmc0_resources),
  235. .resource = mmc0_resources
  236. },
  237. {
  238. .name = "dm6441-mmc",
  239. .id = 1,
  240. .dev = {
  241. .dma_mask = &mmc1_dma_mask,
  242. .coherent_dma_mask = DMA_BIT_MASK(32),
  243. },
  244. .num_resources = ARRAY_SIZE(mmc1_resources),
  245. .resource = mmc1_resources
  246. },
  247. };
  248. static const u32 emif_windows[] = {
  249. TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE,
  250. TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE,
  251. };
  252. static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M };
  253. static struct resource wdt_resources[] = {
  254. {
  255. .start = TNETV107X_WDOG_BASE,
  256. .end = TNETV107X_WDOG_BASE + SZ_4K - 1,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. };
  260. struct platform_device tnetv107x_wdt_device = {
  261. .name = "tnetv107x_wdt",
  262. .id = 0,
  263. .num_resources = ARRAY_SIZE(wdt_resources),
  264. .resource = wdt_resources,
  265. };
  266. static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
  267. {
  268. struct resource res[2];
  269. struct platform_device *pdev;
  270. u32 range;
  271. int ret;
  272. /* Figure out the resource range from the ale/cle masks */
  273. range = max(data->mask_cle, data->mask_ale);
  274. range = PAGE_ALIGN(range + 4) - 1;
  275. if (range >= emif_window_sizes[chipsel])
  276. return -EINVAL;
  277. pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
  278. if (!pdev)
  279. return -ENOMEM;
  280. pdev->name = "davinci_nand";
  281. pdev->id = chipsel;
  282. pdev->dev.platform_data = data;
  283. memset(res, 0, sizeof(res));
  284. res[0].start = emif_windows[chipsel];
  285. res[0].end = res[0].start + range;
  286. res[0].flags = IORESOURCE_MEM;
  287. res[1].start = TNETV107X_ASYNC_EMIF_CNTRL_BASE;
  288. res[1].end = res[1].start + SZ_4K - 1;
  289. res[1].flags = IORESOURCE_MEM;
  290. ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
  291. if (ret < 0) {
  292. kfree(pdev);
  293. return ret;
  294. }
  295. return platform_device_register(pdev);
  296. }
  297. static struct resource keypad_resources[] = {
  298. {
  299. .start = TNETV107X_KEYPAD_BASE,
  300. .end = TNETV107X_KEYPAD_BASE + 0xff,
  301. .flags = IORESOURCE_MEM,
  302. },
  303. {
  304. .start = IRQ_TNETV107X_KEYPAD,
  305. .flags = IORESOURCE_IRQ,
  306. .name = "press",
  307. },
  308. {
  309. .start = IRQ_TNETV107X_KEYPAD_FREE,
  310. .flags = IORESOURCE_IRQ,
  311. .name = "release",
  312. },
  313. };
  314. static struct platform_device keypad_device = {
  315. .name = "tnetv107x-keypad",
  316. .num_resources = ARRAY_SIZE(keypad_resources),
  317. .resource = keypad_resources,
  318. };
  319. static struct resource tsc_resources[] = {
  320. {
  321. .start = TNETV107X_TSC_BASE,
  322. .end = TNETV107X_TSC_BASE + 0xff,
  323. .flags = IORESOURCE_MEM,
  324. },
  325. {
  326. .start = IRQ_TNETV107X_TSC,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. };
  330. static struct platform_device tsc_device = {
  331. .name = "tnetv107x-ts",
  332. .num_resources = ARRAY_SIZE(tsc_resources),
  333. .resource = tsc_resources,
  334. };
  335. static struct resource ssp_resources[] = {
  336. {
  337. .start = TNETV107X_SSP_BASE,
  338. .end = TNETV107X_SSP_BASE + 0x1ff,
  339. .flags = IORESOURCE_MEM,
  340. },
  341. {
  342. .start = IRQ_TNETV107X_SSP,
  343. .flags = IORESOURCE_IRQ,
  344. },
  345. };
  346. static struct platform_device ssp_device = {
  347. .name = "ti-ssp",
  348. .id = -1,
  349. .num_resources = ARRAY_SIZE(ssp_resources),
  350. .resource = ssp_resources,
  351. };
  352. void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
  353. {
  354. int i, error;
  355. struct clk *tsc_clk;
  356. /*
  357. * The reset defaults for tnetv107x tsc clock divider is set too high.
  358. * This forces the clock down to a range that allows the ADC to
  359. * complete sample conversion in time.
  360. */
  361. tsc_clk = clk_get(NULL, "sys_tsc_clk");
  362. if (!IS_ERR(tsc_clk)) {
  363. error = clk_set_rate(tsc_clk, 5000000);
  364. WARN_ON(error < 0);
  365. clk_put(tsc_clk);
  366. }
  367. platform_device_register(&edma_device);
  368. platform_device_register(&tnetv107x_wdt_device);
  369. platform_device_register(&tsc_device);
  370. if (info->serial_config)
  371. davinci_serial_init(tnetv107x_serial_device);
  372. for (i = 0; i < 2; i++)
  373. if (info->mmc_config[i]) {
  374. mmc_devices[i].dev.platform_data = info->mmc_config[i];
  375. platform_device_register(&mmc_devices[i]);
  376. }
  377. for (i = 0; i < 4; i++)
  378. if (info->nand_config[i])
  379. nand_init(i, info->nand_config[i]);
  380. if (info->keypad_config) {
  381. keypad_device.dev.platform_data = info->keypad_config;
  382. platform_device_register(&keypad_device);
  383. }
  384. if (info->ssp_config) {
  385. ssp_device.dev.platform_data = info->ssp_config;
  386. platform_device_register(&ssp_device);
  387. }
  388. }