tegra30-beaver.dts 11 KB

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  1. /dts-v1/;
  2. #include "tegra30.dtsi"
  3. / {
  4. model = "NVIDIA Tegra30 Beaver evaluation board";
  5. compatible = "nvidia,beaver", "nvidia,tegra30";
  6. memory {
  7. reg = <0x80000000 0x7ff00000>;
  8. };
  9. pcie-controller {
  10. status = "okay";
  11. pex-clk-supply = <&sys_3v3_pexs_reg>;
  12. vdd-supply = <&ldo1_reg>;
  13. avdd-supply = <&ldo2_reg>;
  14. pci@1,0 {
  15. status = "okay";
  16. nvidia,num-lanes = <2>;
  17. };
  18. pci@2,0 {
  19. nvidia,num-lanes = <2>;
  20. };
  21. pci@3,0 {
  22. status = "okay";
  23. nvidia,num-lanes = <2>;
  24. };
  25. };
  26. host1x {
  27. hdmi {
  28. status = "okay";
  29. vdd-supply = <&sys_3v3_reg>;
  30. pll-supply = <&vio_reg>;
  31. nvidia,hpd-gpio =
  32. <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  33. nvidia,ddc-i2c-bus = <&hdmiddc>;
  34. };
  35. };
  36. pinmux {
  37. pinctrl-names = "default";
  38. pinctrl-0 = <&state_default>;
  39. state_default: pinmux {
  40. sdmmc1_clk_pz0 {
  41. nvidia,pins = "sdmmc1_clk_pz0";
  42. nvidia,function = "sdmmc1";
  43. nvidia,pull = <0>;
  44. nvidia,tristate = <0>;
  45. };
  46. sdmmc1_cmd_pz1 {
  47. nvidia,pins = "sdmmc1_cmd_pz1",
  48. "sdmmc1_dat0_py7",
  49. "sdmmc1_dat1_py6",
  50. "sdmmc1_dat2_py5",
  51. "sdmmc1_dat3_py4";
  52. nvidia,function = "sdmmc1";
  53. nvidia,pull = <2>;
  54. nvidia,tristate = <0>;
  55. };
  56. sdmmc3_clk_pa6 {
  57. nvidia,pins = "sdmmc3_clk_pa6";
  58. nvidia,function = "sdmmc3";
  59. nvidia,pull = <0>;
  60. nvidia,tristate = <0>;
  61. };
  62. sdmmc3_cmd_pa7 {
  63. nvidia,pins = "sdmmc3_cmd_pa7",
  64. "sdmmc3_dat0_pb7",
  65. "sdmmc3_dat1_pb6",
  66. "sdmmc3_dat2_pb5",
  67. "sdmmc3_dat3_pb4";
  68. nvidia,function = "sdmmc3";
  69. nvidia,pull = <2>;
  70. nvidia,tristate = <0>;
  71. };
  72. sdmmc4_clk_pcc4 {
  73. nvidia,pins = "sdmmc4_clk_pcc4",
  74. "sdmmc4_rst_n_pcc3";
  75. nvidia,function = "sdmmc4";
  76. nvidia,pull = <0>;
  77. nvidia,tristate = <0>;
  78. };
  79. sdmmc4_dat0_paa0 {
  80. nvidia,pins = "sdmmc4_dat0_paa0",
  81. "sdmmc4_dat1_paa1",
  82. "sdmmc4_dat2_paa2",
  83. "sdmmc4_dat3_paa3",
  84. "sdmmc4_dat4_paa4",
  85. "sdmmc4_dat5_paa5",
  86. "sdmmc4_dat6_paa6",
  87. "sdmmc4_dat7_paa7";
  88. nvidia,function = "sdmmc4";
  89. nvidia,pull = <2>;
  90. nvidia,tristate = <0>;
  91. };
  92. dap2_fs_pa2 {
  93. nvidia,pins = "dap2_fs_pa2",
  94. "dap2_sclk_pa3",
  95. "dap2_din_pa4",
  96. "dap2_dout_pa5";
  97. nvidia,function = "i2s1";
  98. nvidia,pull = <0>;
  99. nvidia,tristate = <0>;
  100. };
  101. pex_l1_prsnt_n_pdd4 {
  102. nvidia,pins = "pex_l1_prsnt_n_pdd4",
  103. "pex_l1_clkreq_n_pdd6";
  104. nvidia,pull = <2>;
  105. };
  106. sdio3 {
  107. nvidia,pins = "drive_sdio3";
  108. nvidia,high-speed-mode = <0>;
  109. nvidia,schmitt = <0>;
  110. nvidia,pull-down-strength = <46>;
  111. nvidia,pull-up-strength = <42>;
  112. nvidia,slew-rate-rising = <1>;
  113. nvidia,slew-rate-falling = <1>;
  114. };
  115. gpv {
  116. nvidia,pins = "drive_gpv";
  117. nvidia,pull-up-strength = <16>;
  118. };
  119. };
  120. };
  121. serial@70006000 {
  122. status = "okay";
  123. };
  124. i2c@7000c000 {
  125. status = "okay";
  126. clock-frequency = <100000>;
  127. };
  128. i2c@7000c400 {
  129. status = "okay";
  130. clock-frequency = <100000>;
  131. };
  132. i2c@7000c500 {
  133. status = "okay";
  134. clock-frequency = <100000>;
  135. };
  136. hdmiddc: i2c@7000c700 {
  137. status = "okay";
  138. clock-frequency = <100000>;
  139. };
  140. i2c@7000d000 {
  141. status = "okay";
  142. clock-frequency = <100000>;
  143. rt5640: rt5640 {
  144. compatible = "realtek,rt5640";
  145. reg = <0x1c>;
  146. interrupt-parent = <&gpio>;
  147. interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
  148. realtek,ldo1-en-gpios =
  149. <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
  150. };
  151. tps62361 {
  152. compatible = "ti,tps62361";
  153. reg = <0x60>;
  154. regulator-name = "tps62361-vout";
  155. regulator-min-microvolt = <500000>;
  156. regulator-max-microvolt = <1500000>;
  157. regulator-boot-on;
  158. regulator-always-on;
  159. ti,vsel0-state-high;
  160. ti,vsel1-state-high;
  161. };
  162. pmic: tps65911@2d {
  163. compatible = "ti,tps65911";
  164. reg = <0x2d>;
  165. interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
  166. #interrupt-cells = <2>;
  167. interrupt-controller;
  168. ti,system-power-controller;
  169. #gpio-cells = <2>;
  170. gpio-controller;
  171. vcc1-supply = <&vdd_5v_in_reg>;
  172. vcc2-supply = <&vdd_5v_in_reg>;
  173. vcc3-supply = <&vio_reg>;
  174. vcc4-supply = <&vdd_5v_in_reg>;
  175. vcc5-supply = <&vdd_5v_in_reg>;
  176. vcc6-supply = <&vdd2_reg>;
  177. vcc7-supply = <&vdd_5v_in_reg>;
  178. vccio-supply = <&vdd_5v_in_reg>;
  179. regulators {
  180. #address-cells = <1>;
  181. #size-cells = <0>;
  182. vdd1_reg: vdd1 {
  183. regulator-name = "vddio_ddr_1v2";
  184. regulator-min-microvolt = <1200000>;
  185. regulator-max-microvolt = <1200000>;
  186. regulator-always-on;
  187. };
  188. vdd2_reg: vdd2 {
  189. regulator-name = "vdd_1v5_gen";
  190. regulator-min-microvolt = <1500000>;
  191. regulator-max-microvolt = <1500000>;
  192. regulator-always-on;
  193. };
  194. vddctrl_reg: vddctrl {
  195. regulator-name = "vdd_cpu,vdd_sys";
  196. regulator-min-microvolt = <1000000>;
  197. regulator-max-microvolt = <1000000>;
  198. regulator-always-on;
  199. };
  200. vio_reg: vio {
  201. regulator-name = "vdd_1v8_gen";
  202. regulator-min-microvolt = <1800000>;
  203. regulator-max-microvolt = <1800000>;
  204. regulator-always-on;
  205. };
  206. ldo1_reg: ldo1 {
  207. regulator-name = "vdd_pexa,vdd_pexb";
  208. regulator-min-microvolt = <1050000>;
  209. regulator-max-microvolt = <1050000>;
  210. };
  211. ldo2_reg: ldo2 {
  212. regulator-name = "vdd_sata,avdd_plle";
  213. regulator-min-microvolt = <1050000>;
  214. regulator-max-microvolt = <1050000>;
  215. };
  216. /* LDO3 is not connected to anything */
  217. ldo4_reg: ldo4 {
  218. regulator-name = "vdd_rtc";
  219. regulator-min-microvolt = <1200000>;
  220. regulator-max-microvolt = <1200000>;
  221. regulator-always-on;
  222. };
  223. ldo5_reg: ldo5 {
  224. regulator-name = "vddio_sdmmc,avdd_vdac";
  225. regulator-min-microvolt = <3300000>;
  226. regulator-max-microvolt = <3300000>;
  227. regulator-always-on;
  228. };
  229. ldo6_reg: ldo6 {
  230. regulator-name = "avdd_dsi_csi,pwrdet_mipi";
  231. regulator-min-microvolt = <1200000>;
  232. regulator-max-microvolt = <1200000>;
  233. };
  234. ldo7_reg: ldo7 {
  235. regulator-name = "vdd_pllm,x,u,a_p_c_s";
  236. regulator-min-microvolt = <1200000>;
  237. regulator-max-microvolt = <1200000>;
  238. regulator-always-on;
  239. };
  240. ldo8_reg: ldo8 {
  241. regulator-name = "vdd_ddr_hs";
  242. regulator-min-microvolt = <1000000>;
  243. regulator-max-microvolt = <1000000>;
  244. regulator-always-on;
  245. };
  246. };
  247. };
  248. };
  249. spi@7000da00 {
  250. status = "okay";
  251. spi-max-frequency = <25000000>;
  252. spi-flash@1 {
  253. compatible = "winbond,w25q32";
  254. reg = <1>;
  255. spi-max-frequency = <20000000>;
  256. };
  257. };
  258. ahub {
  259. i2s@70080400 {
  260. status = "okay";
  261. };
  262. };
  263. pmc {
  264. status = "okay";
  265. nvidia,invert-interrupt;
  266. nvidia,suspend-mode = <1>;
  267. nvidia,cpu-pwr-good-time = <2000>;
  268. nvidia,cpu-pwr-off-time = <200>;
  269. nvidia,core-pwr-good-time = <3845 3845>;
  270. nvidia,core-pwr-off-time = <0>;
  271. nvidia,core-power-req-active-high;
  272. nvidia,sys-clock-req-active-high;
  273. };
  274. sdhci@78000000 {
  275. status = "okay";
  276. cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
  277. wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
  278. power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
  279. bus-width = <4>;
  280. };
  281. sdhci@78000600 {
  282. status = "okay";
  283. bus-width = <8>;
  284. non-removable;
  285. };
  286. usb@7d008000 {
  287. status = "okay";
  288. };
  289. usb-phy@7d008000 {
  290. vbus-supply = <&usb3_vbus_reg>;
  291. status = "okay";
  292. };
  293. clocks {
  294. compatible = "simple-bus";
  295. #address-cells = <1>;
  296. #size-cells = <0>;
  297. clk32k_in: clock {
  298. compatible = "fixed-clock";
  299. reg=<0>;
  300. #clock-cells = <0>;
  301. clock-frequency = <32768>;
  302. };
  303. };
  304. regulators {
  305. compatible = "simple-bus";
  306. #address-cells = <1>;
  307. #size-cells = <0>;
  308. vdd_5v_in_reg: regulator@0 {
  309. compatible = "regulator-fixed";
  310. reg = <0>;
  311. regulator-name = "vdd_5v_in";
  312. regulator-min-microvolt = <5000000>;
  313. regulator-max-microvolt = <5000000>;
  314. regulator-always-on;
  315. };
  316. chargepump_5v_reg: regulator@1 {
  317. compatible = "regulator-fixed";
  318. reg = <1>;
  319. regulator-name = "chargepump_5v";
  320. regulator-min-microvolt = <5000000>;
  321. regulator-max-microvolt = <5000000>;
  322. regulator-boot-on;
  323. regulator-always-on;
  324. enable-active-high;
  325. gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
  326. };
  327. ddr_reg: regulator@2 {
  328. compatible = "regulator-fixed";
  329. reg = <2>;
  330. regulator-name = "vdd_ddr";
  331. regulator-min-microvolt = <1500000>;
  332. regulator-max-microvolt = <1500000>;
  333. regulator-always-on;
  334. regulator-boot-on;
  335. enable-active-high;
  336. gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
  337. vin-supply = <&vdd_5v_in_reg>;
  338. };
  339. vdd_5v_sata_reg: regulator@3 {
  340. compatible = "regulator-fixed";
  341. reg = <3>;
  342. regulator-name = "vdd_5v_sata";
  343. regulator-min-microvolt = <5000000>;
  344. regulator-max-microvolt = <5000000>;
  345. regulator-always-on;
  346. regulator-boot-on;
  347. enable-active-high;
  348. gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
  349. vin-supply = <&vdd_5v_in_reg>;
  350. };
  351. usb1_vbus_reg: regulator@4 {
  352. compatible = "regulator-fixed";
  353. reg = <4>;
  354. regulator-name = "usb1_vbus";
  355. regulator-min-microvolt = <5000000>;
  356. regulator-max-microvolt = <5000000>;
  357. enable-active-high;
  358. gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
  359. gpio-open-drain;
  360. vin-supply = <&vdd_5v_in_reg>;
  361. };
  362. usb3_vbus_reg: regulator@5 {
  363. compatible = "regulator-fixed";
  364. reg = <5>;
  365. regulator-name = "usb3_vbus";
  366. regulator-min-microvolt = <5000000>;
  367. regulator-max-microvolt = <5000000>;
  368. enable-active-high;
  369. gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
  370. gpio-open-drain;
  371. vin-supply = <&vdd_5v_in_reg>;
  372. };
  373. sys_3v3_reg: regulator@6 {
  374. compatible = "regulator-fixed";
  375. reg = <6>;
  376. regulator-name = "sys_3v3,vdd_3v3_alw";
  377. regulator-min-microvolt = <3300000>;
  378. regulator-max-microvolt = <3300000>;
  379. regulator-always-on;
  380. regulator-boot-on;
  381. enable-active-high;
  382. gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
  383. vin-supply = <&vdd_5v_in_reg>;
  384. };
  385. sys_3v3_pexs_reg: regulator@7 {
  386. compatible = "regulator-fixed";
  387. reg = <7>;
  388. regulator-name = "sys_3v3_pexs";
  389. regulator-min-microvolt = <3300000>;
  390. regulator-max-microvolt = <3300000>;
  391. regulator-always-on;
  392. regulator-boot-on;
  393. enable-active-high;
  394. gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
  395. vin-supply = <&sys_3v3_reg>;
  396. };
  397. };
  398. gpio-leds {
  399. compatible = "gpio-leds";
  400. gpled1 {
  401. label = "LED1"; /* CR5A1 (blue) */
  402. gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
  403. };
  404. gpled2 {
  405. label = "LED2"; /* CR4A2 (green) */
  406. gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
  407. };
  408. };
  409. sound {
  410. compatible = "nvidia,tegra-audio-rt5640-beaver",
  411. "nvidia,tegra-audio-rt5640";
  412. nvidia,model = "NVIDIA Tegra Beaver";
  413. nvidia,audio-routing =
  414. "Headphones", "HPOR",
  415. "Headphones", "HPOL",
  416. "Mic Jack", "MICBIAS1",
  417. "IN2P", "Mic Jack";
  418. nvidia,i2s-controller = <&tegra_i2s1>;
  419. nvidia,audio-codec = <&rt5640>;
  420. nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
  421. clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
  422. <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
  423. <&tegra_car TEGRA30_CLK_EXTERN1>;
  424. clock-names = "pll_a", "pll_a_out0", "mclk";
  425. };
  426. };