linux-vybrid_public/arch/arm/boot/dts/stih415-pinctrl.dtsi

/*
 * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * publishhed by the Free Software Foundation.
 */
#include "st-pincfg.h"
/ {

	aliases {
		gpio0	= &PIO0;
		gpio1	= &PIO1;
		gpio2	= &PIO2;
		gpio3	= &PIO3;
		gpio4	= &PIO4;
		gpio5	= &PIO5;
		gpio6	= &PIO6;
		gpio7	= &PIO7;
		gpio8	= &PIO8;
		gpio9	= &PIO9;
		gpio10	= &PIO10;
		gpio11	= &PIO11;
		gpio12	= &PIO12;
		gpio13	= &PIO13;
		gpio14	= &PIO14;
		gpio15	= &PIO15;
		gpio16	= &PIO16;
		gpio17	= &PIO17;
		gpio18	= &PIO18;
		gpio19	= &PIO100;
		gpio20	= &PIO101;
		gpio21	= &PIO102;
		gpio22	= &PIO103;
		gpio23	= &PIO104;
		gpio24	= &PIO105;
		gpio25	= &PIO106;
		gpio26	= &PIO107;
	};

	soc {
		pin-controller-sbc {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih415-sbc-pinctrl";
			st,syscfg	= <&syscfg_sbc>;
			ranges 		= <0 0xfe610000 0x5000>;

			PIO0: gpio@fe610000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO0";
			};
			PIO1: gpio@fe611000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO1";
			};
			PIO2: gpio@fe612000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO2";
			};
			PIO3: gpio@fe613000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO3";
			};
			PIO4: gpio@fe614000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO4";
			};

			sbc_serial1 {
				pinctrl_sbc_serial1:sbc_serial1 {
					st,pins {
						tx	= <&PIO2 6 ALT3 OUT>;
						rx	= <&PIO2 7 ALT3 IN>;
					};
				};
			};
		};

		pin-controller-front {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih415-front-pinctrl";
			st,syscfg	= <&syscfg_front>;
			ranges		= <0 0xfee00000 0x8000>;

			PIO5: gpio@fee00000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO5";
			};
			PIO6: gpio@fee01000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO6";
			};
			PIO7: gpio@fee02000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO7";
			};
			PIO8: gpio@fee03000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO8";
			};
			PIO9: gpio@fee04000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO9";
			};
			PIO10: gpio@fee05000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x5000 0x100>;
				st,bank-name	= "PIO10";
			};
			PIO11: gpio@fee06000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x6000 0x100>;
				st,bank-name	= "PIO11";
			};
			PIO12: gpio@fee07000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x7000 0x100>;
				st,bank-name	= "PIO12";
			};
		};

		pin-controller-rear {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih415-rear-pinctrl";
			st,syscfg	= <&syscfg_rear>;
			ranges		= <0 0xfe820000 0x8000>;

			PIO13: gpio@fe820000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO13";
			};
			PIO14: gpio@fe821000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO14";
			};
			PIO15: gpio@fe822000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO15";
			};
			PIO16: gpio@fe823000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO16";
			};
			PIO17: gpio@fe824000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO17";
			};
			PIO18: gpio@fe825000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x5000 0x100>;
				st,bank-name	= "PIO18";
			};

			serial2 {
				pinctrl_serial2: serial2-0 {
					st,pins {
						tx	= <&PIO17 4 ALT2 OUT>;
						rx	= <&PIO17 5 ALT2 IN>;
					};
				};
			};
		};

		pin-controller-left {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih415-left-pinctrl";
			st,syscfg	= <&syscfg_left>;
			ranges		= <0 0xfd6b0000 0x3000>;

			PIO100: gpio@fd6b0000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO100";
			};
			PIO101: gpio@fd6b1000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO101";
			};
			PIO102: gpio@fd6b2000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO102";
			};
		};

		pin-controller-right {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih415-right-pinctrl";
			st,syscfg	= <&syscfg_right>;
			ranges		= <0 0xfd330000 0x5000>;

			PIO103: gpio@fd330000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO103";
			};
			PIO104: gpio@fd331000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO104";
			};
			PIO105: gpio@fd332000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO105";
			};
			PIO106: gpio@fd333000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO106";
			};
			PIO107: gpio@fd334000 {
				gpio-controller;
				#gpio-cells	= <1>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO107";
			};
		};
	};
};