spear600.dtsi 4.6 KB

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  1. /*
  2. * Copyright 2012 Stefan Roese <sr@denx.de>
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "st,spear600";
  14. cpus {
  15. #address-cells = <0>;
  16. #size-cells = <0>;
  17. cpu {
  18. compatible = "arm,arm926ej-s";
  19. device_type = "cpu";
  20. };
  21. };
  22. memory {
  23. device_type = "memory";
  24. reg = <0 0x40000000>;
  25. };
  26. ahb {
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. compatible = "simple-bus";
  30. ranges = <0xd0000000 0xd0000000 0x30000000>;
  31. vic0: interrupt-controller@f1100000 {
  32. compatible = "arm,pl190-vic";
  33. interrupt-controller;
  34. reg = <0xf1100000 0x1000>;
  35. #interrupt-cells = <1>;
  36. };
  37. vic1: interrupt-controller@f1000000 {
  38. compatible = "arm,pl190-vic";
  39. interrupt-controller;
  40. reg = <0xf1000000 0x1000>;
  41. #interrupt-cells = <1>;
  42. };
  43. clcd@fc200000 {
  44. compatible = "arm,pl110", "arm,primecell";
  45. reg = <0xfc200000 0x1000>;
  46. interrupt-parent = <&vic1>;
  47. interrupts = <12>;
  48. status = "disabled";
  49. };
  50. dma@fc400000 {
  51. compatible = "arm,pl080", "arm,primecell";
  52. reg = <0xfc400000 0x1000>;
  53. interrupt-parent = <&vic1>;
  54. interrupts = <10>;
  55. status = "disabled";
  56. };
  57. gmac: ethernet@e0800000 {
  58. compatible = "st,spear600-gmac";
  59. reg = <0xe0800000 0x8000>;
  60. interrupt-parent = <&vic1>;
  61. interrupts = <24 23>;
  62. interrupt-names = "macirq", "eth_wake_irq";
  63. phy-mode = "gmii";
  64. status = "disabled";
  65. };
  66. fsmc: flash@d1800000 {
  67. compatible = "st,spear600-fsmc-nand";
  68. #address-cells = <1>;
  69. #size-cells = <1>;
  70. reg = <0xd1800000 0x1000 /* FSMC Register */
  71. 0xd2000000 0x0010 /* NAND Base DATA */
  72. 0xd2020000 0x0010 /* NAND Base ADDR */
  73. 0xd2010000 0x0010>; /* NAND Base CMD */
  74. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  75. status = "disabled";
  76. };
  77. smi: flash@fc000000 {
  78. compatible = "st,spear600-smi";
  79. #address-cells = <1>;
  80. #size-cells = <1>;
  81. reg = <0xfc000000 0x1000>;
  82. interrupt-parent = <&vic1>;
  83. interrupts = <12>;
  84. status = "disabled";
  85. };
  86. ehci@e1800000 {
  87. compatible = "st,spear600-ehci", "usb-ehci";
  88. reg = <0xe1800000 0x1000>;
  89. interrupt-parent = <&vic1>;
  90. interrupts = <27>;
  91. status = "disabled";
  92. };
  93. ehci@e2000000 {
  94. compatible = "st,spear600-ehci", "usb-ehci";
  95. reg = <0xe2000000 0x1000>;
  96. interrupt-parent = <&vic1>;
  97. interrupts = <29>;
  98. status = "disabled";
  99. };
  100. ohci@e1900000 {
  101. compatible = "st,spear600-ohci", "usb-ohci";
  102. reg = <0xe1900000 0x1000>;
  103. interrupt-parent = <&vic1>;
  104. interrupts = <26>;
  105. status = "disabled";
  106. };
  107. ohci@e2100000 {
  108. compatible = "st,spear600-ohci", "usb-ohci";
  109. reg = <0xe2100000 0x1000>;
  110. interrupt-parent = <&vic1>;
  111. interrupts = <28>;
  112. status = "disabled";
  113. };
  114. apb {
  115. #address-cells = <1>;
  116. #size-cells = <1>;
  117. compatible = "simple-bus";
  118. ranges = <0xd0000000 0xd0000000 0x30000000>;
  119. serial@d0000000 {
  120. compatible = "arm,pl011", "arm,primecell";
  121. reg = <0xd0000000 0x1000>;
  122. interrupt-parent = <&vic0>;
  123. interrupts = <24>;
  124. status = "disabled";
  125. };
  126. serial@d0080000 {
  127. compatible = "arm,pl011", "arm,primecell";
  128. reg = <0xd0080000 0x1000>;
  129. interrupt-parent = <&vic0>;
  130. interrupts = <25>;
  131. status = "disabled";
  132. };
  133. /* local/cpu GPIO */
  134. gpio0: gpio@f0100000 {
  135. #gpio-cells = <2>;
  136. compatible = "arm,pl061", "arm,primecell";
  137. gpio-controller;
  138. reg = <0xf0100000 0x1000>;
  139. interrupt-parent = <&vic0>;
  140. interrupts = <18>;
  141. };
  142. /* basic GPIO */
  143. gpio1: gpio@fc980000 {
  144. #gpio-cells = <2>;
  145. compatible = "arm,pl061", "arm,primecell";
  146. gpio-controller;
  147. reg = <0xfc980000 0x1000>;
  148. interrupt-parent = <&vic1>;
  149. interrupts = <19>;
  150. };
  151. /* appl GPIO */
  152. gpio2: gpio@d8100000 {
  153. #gpio-cells = <2>;
  154. compatible = "arm,pl061", "arm,primecell";
  155. gpio-controller;
  156. reg = <0xd8100000 0x1000>;
  157. interrupt-parent = <&vic1>;
  158. interrupts = <4>;
  159. };
  160. i2c@d0200000 {
  161. #address-cells = <1>;
  162. #size-cells = <0>;
  163. compatible = "snps,designware-i2c";
  164. reg = <0xd0200000 0x1000>;
  165. interrupt-parent = <&vic0>;
  166. interrupts = <28>;
  167. status = "disabled";
  168. };
  169. rtc@fc900000 {
  170. compatible = "st,spear600-rtc";
  171. reg = <0xfc900000 0x1000>;
  172. interrupts = <10>;
  173. status = "disabled";
  174. };
  175. timer@f0000000 {
  176. compatible = "st,spear-timer";
  177. reg = <0xf0000000 0x400>;
  178. interrupt-parent = <&vic0>;
  179. interrupts = <16>;
  180. };
  181. };
  182. };
  183. };