omap2420.dtsi 2.8 KB

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  1. /*
  2. * Device Tree Source for OMAP2420 SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include "omap2.dtsi"
  11. / {
  12. compatible = "ti,omap2420", "ti,omap2";
  13. ocp {
  14. counter32k: counter@48004000 {
  15. compatible = "ti,omap-counter32k";
  16. reg = <0x48004000 0x20>;
  17. ti,hwmods = "counter_32k";
  18. };
  19. omap2420_pmx: pinmux@48000030 {
  20. compatible = "ti,omap2420-padconf", "pinctrl-single";
  21. reg = <0x48000030 0x0113>;
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. pinctrl-single,register-width = <8>;
  25. pinctrl-single,function-mask = <0x3f>;
  26. };
  27. gpio1: gpio@48018000 {
  28. compatible = "ti,omap2-gpio";
  29. reg = <0x48018000 0x200>;
  30. interrupts = <29>;
  31. ti,hwmods = "gpio1";
  32. ti,gpio-always-on;
  33. #gpio-cells = <2>;
  34. gpio-controller;
  35. #interrupt-cells = <2>;
  36. interrupt-controller;
  37. };
  38. gpio2: gpio@4801a000 {
  39. compatible = "ti,omap2-gpio";
  40. reg = <0x4801a000 0x200>;
  41. interrupts = <30>;
  42. ti,hwmods = "gpio2";
  43. ti,gpio-always-on;
  44. #gpio-cells = <2>;
  45. gpio-controller;
  46. #interrupt-cells = <2>;
  47. interrupt-controller;
  48. };
  49. gpio3: gpio@4801c000 {
  50. compatible = "ti,omap2-gpio";
  51. reg = <0x4801c000 0x200>;
  52. interrupts = <31>;
  53. ti,hwmods = "gpio3";
  54. ti,gpio-always-on;
  55. #gpio-cells = <2>;
  56. gpio-controller;
  57. #interrupt-cells = <2>;
  58. interrupt-controller;
  59. };
  60. gpio4: gpio@4801e000 {
  61. compatible = "ti,omap2-gpio";
  62. reg = <0x4801e000 0x200>;
  63. interrupts = <32>;
  64. ti,hwmods = "gpio4";
  65. ti,gpio-always-on;
  66. #gpio-cells = <2>;
  67. gpio-controller;
  68. #interrupt-cells = <2>;
  69. interrupt-controller;
  70. };
  71. gpmc: gpmc@6800a000 {
  72. compatible = "ti,omap2420-gpmc";
  73. reg = <0x6800a000 0x1000>;
  74. #address-cells = <2>;
  75. #size-cells = <1>;
  76. interrupts = <20>;
  77. gpmc,num-cs = <8>;
  78. gpmc,num-waitpins = <4>;
  79. ti,hwmods = "gpmc";
  80. };
  81. mcbsp1: mcbsp@48074000 {
  82. compatible = "ti,omap2420-mcbsp";
  83. reg = <0x48074000 0xff>;
  84. reg-names = "mpu";
  85. interrupts = <59>, /* TX interrupt */
  86. <60>; /* RX interrupt */
  87. interrupt-names = "tx", "rx";
  88. ti,hwmods = "mcbsp1";
  89. dmas = <&sdma 31>,
  90. <&sdma 32>;
  91. dma-names = "tx", "rx";
  92. };
  93. mcbsp2: mcbsp@48076000 {
  94. compatible = "ti,omap2420-mcbsp";
  95. reg = <0x48076000 0xff>;
  96. reg-names = "mpu";
  97. interrupts = <62>, /* TX interrupt */
  98. <63>; /* RX interrupt */
  99. interrupt-names = "tx", "rx";
  100. ti,hwmods = "mcbsp2";
  101. dmas = <&sdma 33>,
  102. <&sdma 34>;
  103. dma-names = "tx", "rx";
  104. };
  105. timer1: timer@48028000 {
  106. compatible = "ti,omap2420-timer";
  107. reg = <0x48028000 0x400>;
  108. interrupts = <37>;
  109. ti,hwmods = "timer1";
  110. ti,timer-alwon;
  111. };
  112. };
  113. };