nspire.dtsi 3.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175
  1. /*
  2. * linux/arch/arm/boot/nspire.dtsi
  3. *
  4. * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. interrupt-parent = <&intc>;
  14. cpus {
  15. cpu@0 {
  16. compatible = "arm,arm926ejs";
  17. };
  18. };
  19. bootrom: bootrom@00000000 {
  20. reg = <0x00000000 0x80000>;
  21. };
  22. sram: sram@A4000000 {
  23. device = "memory";
  24. reg = <0xA4000000 0x20000>;
  25. };
  26. timer_clk: timer_clk {
  27. #clock-cells = <0>;
  28. compatible = "fixed-clock";
  29. clock-frequency = <32768>;
  30. };
  31. base_clk: base_clk {
  32. #clock-cells = <0>;
  33. reg = <0x900B0024 0x4>;
  34. };
  35. ahb_clk: ahb_clk {
  36. #clock-cells = <0>;
  37. reg = <0x900B0024 0x4>;
  38. clocks = <&base_clk>;
  39. };
  40. apb_pclk: apb_pclk {
  41. #clock-cells = <0>;
  42. compatible = "fixed-factor-clock";
  43. clock-div = <2>;
  44. clock-mult = <1>;
  45. clocks = <&ahb_clk>;
  46. };
  47. ahb {
  48. compatible = "simple-bus";
  49. #address-cells = <1>;
  50. #size-cells = <1>;
  51. ranges;
  52. spi: spi@A9000000 {
  53. reg = <0xA9000000 0x1000>;
  54. };
  55. usb0: usb@B0000000 {
  56. reg = <0xB0000000 0x1000>;
  57. interrupts = <8>;
  58. };
  59. usb1: usb@B4000000 {
  60. reg = <0xB4000000 0x1000>;
  61. interrupts = <9>;
  62. status = "disabled";
  63. };
  64. lcd: lcd@C0000000 {
  65. compatible = "arm,pl111", "arm,primecell";
  66. reg = <0xC0000000 0x1000>;
  67. interrupts = <21>;
  68. clocks = <&apb_pclk>;
  69. clock-names = "apb_pclk";
  70. };
  71. adc: adc@C4000000 {
  72. reg = <0xC4000000 0x1000>;
  73. interrupts = <11>;
  74. };
  75. tdes: crypto@C8010000 {
  76. reg = <0xC8010000 0x1000>;
  77. };
  78. sha256: crypto@CC000000 {
  79. reg = <0xCC000000 0x1000>;
  80. };
  81. apb@90000000 {
  82. compatible = "simple-bus";
  83. #address-cells = <1>;
  84. #size-cells = <1>;
  85. clock-ranges;
  86. ranges;
  87. gpio: gpio@90000000 {
  88. reg = <0x90000000 0x1000>;
  89. interrupts = <7>;
  90. };
  91. fast_timer: timer@90010000 {
  92. reg = <0x90010000 0x1000>;
  93. interrupts = <17>;
  94. };
  95. uart: serial@90020000 {
  96. reg = <0x90020000 0x1000>;
  97. interrupts = <1>;
  98. };
  99. timer0: timer@900C0000 {
  100. reg = <0x900C0000 0x1000>;
  101. clocks = <&timer_clk>;
  102. };
  103. timer1: timer@900D0000 {
  104. reg = <0x900D0000 0x1000>;
  105. interrupts = <19>;
  106. clocks = <&timer_clk>;
  107. };
  108. watchdog: watchdog@90060000 {
  109. compatible = "arm,amba-primecell";
  110. reg = <0x90060000 0x1000>;
  111. interrupts = <3>;
  112. };
  113. rtc: rtc@90090000 {
  114. reg = <0x90090000 0x1000>;
  115. interrupts = <4>;
  116. };
  117. misc: misc@900A0000 {
  118. reg = <0x900A0000 0x1000>;
  119. };
  120. pwr: pwr@900B0000 {
  121. reg = <0x900B0000 0x1000>;
  122. interrupts = <15>;
  123. };
  124. keypad: input@900E0000 {
  125. compatible = "ti,nspire-keypad";
  126. reg = <0x900E0000 0x1000>;
  127. interrupts = <16>;
  128. scan-interval = <1000>;
  129. row-delay = <200>;
  130. clocks = <&apb_pclk>;
  131. };
  132. contrast: contrast@900F0000 {
  133. reg = <0x900F0000 0x1000>;
  134. };
  135. led: led@90110000 {
  136. reg = <0x90110000 0x1000>;
  137. };
  138. };
  139. };
  140. };