kirkwood.dtsi 6.1 KB

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  1. /include/ "skeleton.dtsi"
  2. #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  3. / {
  4. compatible = "marvell,kirkwood";
  5. interrupt-parent = <&intc>;
  6. cpus {
  7. #address-cells = <1>;
  8. #size-cells = <0>;
  9. cpu@0 {
  10. device_type = "cpu";
  11. compatible = "marvell,feroceon";
  12. clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  13. clock-names = "cpu_clk", "ddrclk", "powersave";
  14. };
  15. };
  16. aliases {
  17. gpio0 = &gpio0;
  18. gpio1 = &gpio1;
  19. };
  20. mbus {
  21. compatible = "marvell,kirkwood-mbus", "simple-bus";
  22. #address-cells = <2>;
  23. #size-cells = <1>;
  24. controller = <&mbusc>;
  25. pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  26. pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
  27. };
  28. ocp@f1000000 {
  29. compatible = "simple-bus";
  30. ranges = <0x00000000 0xf1000000 0x0100000
  31. 0xf4000000 0xf4000000 0x0000400
  32. 0xf5000000 0xf5000000 0x0000400>;
  33. #address-cells = <1>;
  34. #size-cells = <1>;
  35. mbusc: mbus-controller@20000 {
  36. compatible = "marvell,mbus-controller";
  37. reg = <0x20000 0x80>, <0x1500 0x20>;
  38. };
  39. timer: timer@20300 {
  40. compatible = "marvell,orion-timer";
  41. reg = <0x20300 0x20>;
  42. interrupt-parent = <&bridge_intc>;
  43. interrupts = <1>, <2>;
  44. clocks = <&core_clk 0>;
  45. };
  46. intc: main-interrupt-ctrl@20200 {
  47. compatible = "marvell,orion-intc";
  48. interrupt-controller;
  49. #interrupt-cells = <1>;
  50. reg = <0x20200 0x10>, <0x20210 0x10>;
  51. };
  52. bridge_intc: bridge-interrupt-ctrl@20110 {
  53. compatible = "marvell,orion-bridge-intc";
  54. interrupt-controller;
  55. #interrupt-cells = <1>;
  56. reg = <0x20110 0x8>;
  57. interrupts = <1>;
  58. marvell,#interrupts = <6>;
  59. };
  60. core_clk: core-clocks@10030 {
  61. compatible = "marvell,kirkwood-core-clock";
  62. reg = <0x10030 0x4>;
  63. #clock-cells = <1>;
  64. };
  65. gpio0: gpio@10100 {
  66. compatible = "marvell,orion-gpio";
  67. #gpio-cells = <2>;
  68. gpio-controller;
  69. reg = <0x10100 0x40>;
  70. ngpios = <32>;
  71. interrupt-controller;
  72. #interrupt-cells = <2>;
  73. interrupts = <35>, <36>, <37>, <38>;
  74. clocks = <&gate_clk 7>;
  75. };
  76. gpio1: gpio@10140 {
  77. compatible = "marvell,orion-gpio";
  78. #gpio-cells = <2>;
  79. gpio-controller;
  80. reg = <0x10140 0x40>;
  81. ngpios = <18>;
  82. interrupt-controller;
  83. #interrupt-cells = <2>;
  84. interrupts = <39>, <40>, <41>;
  85. clocks = <&gate_clk 7>;
  86. };
  87. serial@12000 {
  88. compatible = "ns16550a";
  89. reg = <0x12000 0x100>;
  90. reg-shift = <2>;
  91. interrupts = <33>;
  92. clocks = <&gate_clk 7>;
  93. status = "disabled";
  94. };
  95. serial@12100 {
  96. compatible = "ns16550a";
  97. reg = <0x12100 0x100>;
  98. reg-shift = <2>;
  99. interrupts = <34>;
  100. clocks = <&gate_clk 7>;
  101. status = "disabled";
  102. };
  103. spi@10600 {
  104. compatible = "marvell,orion-spi";
  105. #address-cells = <1>;
  106. #size-cells = <0>;
  107. cell-index = <0>;
  108. interrupts = <23>;
  109. reg = <0x10600 0x28>;
  110. clocks = <&gate_clk 7>;
  111. status = "disabled";
  112. };
  113. gate_clk: clock-gating-control@2011c {
  114. compatible = "marvell,kirkwood-gating-clock";
  115. reg = <0x2011c 0x4>;
  116. clocks = <&core_clk 0>;
  117. #clock-cells = <1>;
  118. };
  119. wdt: watchdog-timer@20300 {
  120. compatible = "marvell,orion-wdt";
  121. reg = <0x20300 0x28>;
  122. interrupt-parent = <&bridge_intc>;
  123. interrupts = <3>;
  124. clocks = <&gate_clk 7>;
  125. status = "okay";
  126. };
  127. xor@60800 {
  128. compatible = "marvell,orion-xor";
  129. reg = <0x60800 0x100
  130. 0x60A00 0x100>;
  131. status = "okay";
  132. clocks = <&gate_clk 8>;
  133. xor00 {
  134. interrupts = <5>;
  135. dmacap,memcpy;
  136. dmacap,xor;
  137. };
  138. xor01 {
  139. interrupts = <6>;
  140. dmacap,memcpy;
  141. dmacap,xor;
  142. dmacap,memset;
  143. };
  144. };
  145. xor@60900 {
  146. compatible = "marvell,orion-xor";
  147. reg = <0x60900 0x100
  148. 0xd0B00 0x100>;
  149. status = "okay";
  150. clocks = <&gate_clk 16>;
  151. xor00 {
  152. interrupts = <7>;
  153. dmacap,memcpy;
  154. dmacap,xor;
  155. };
  156. xor01 {
  157. interrupts = <8>;
  158. dmacap,memcpy;
  159. dmacap,xor;
  160. dmacap,memset;
  161. };
  162. };
  163. ehci@50000 {
  164. compatible = "marvell,orion-ehci";
  165. reg = <0x50000 0x1000>;
  166. interrupts = <19>;
  167. clocks = <&gate_clk 3>;
  168. status = "okay";
  169. };
  170. nand@3000000 {
  171. #address-cells = <1>;
  172. #size-cells = <1>;
  173. cle = <0>;
  174. ale = <1>;
  175. bank-width = <1>;
  176. compatible = "marvell,orion-nand";
  177. reg = <0xf4000000 0x400>;
  178. chip-delay = <25>;
  179. /* set partition map and/or chip-delay in board dts */
  180. clocks = <&gate_clk 7>;
  181. status = "disabled";
  182. };
  183. i2c@11000 {
  184. compatible = "marvell,mv64xxx-i2c";
  185. reg = <0x11000 0x20>;
  186. #address-cells = <1>;
  187. #size-cells = <0>;
  188. interrupts = <29>;
  189. clock-frequency = <100000>;
  190. clocks = <&gate_clk 7>;
  191. status = "disabled";
  192. };
  193. crypto@30000 {
  194. compatible = "marvell,orion-crypto";
  195. reg = <0x30000 0x10000>,
  196. <0xf5000000 0x800>;
  197. reg-names = "regs", "sram";
  198. interrupts = <22>;
  199. clocks = <&gate_clk 17>;
  200. status = "okay";
  201. };
  202. mdio: mdio-bus@72004 {
  203. compatible = "marvell,orion-mdio";
  204. #address-cells = <1>;
  205. #size-cells = <0>;
  206. reg = <0x72004 0x84>;
  207. interrupts = <46>;
  208. clocks = <&gate_clk 0>;
  209. status = "disabled";
  210. /* add phy nodes in board file */
  211. };
  212. eth0: ethernet-controller@72000 {
  213. compatible = "marvell,kirkwood-eth";
  214. #address-cells = <1>;
  215. #size-cells = <0>;
  216. reg = <0x72000 0x4000>;
  217. clocks = <&gate_clk 0>;
  218. marvell,tx-checksum-limit = <1600>;
  219. status = "disabled";
  220. ethernet0-port@0 {
  221. device_type = "network";
  222. compatible = "marvell,kirkwood-eth-port";
  223. reg = <0>;
  224. interrupts = <11>;
  225. /* overwrite MAC address in bootloader */
  226. local-mac-address = [00 00 00 00 00 00];
  227. /* set phy-handle property in board file */
  228. };
  229. };
  230. eth1: ethernet-controller@76000 {
  231. compatible = "marvell,kirkwood-eth";
  232. #address-cells = <1>;
  233. #size-cells = <0>;
  234. reg = <0x76000 0x4000>;
  235. clocks = <&gate_clk 19>;
  236. marvell,tx-checksum-limit = <1600>;
  237. status = "disabled";
  238. ethernet1-port@0 {
  239. device_type = "network";
  240. compatible = "marvell,kirkwood-eth-port";
  241. reg = <0>;
  242. interrupts = <15>;
  243. /* overwrite MAC address in bootloader */
  244. local-mac-address = [00 00 00 00 00 00];
  245. /* set phy-handle property in board file */
  246. };
  247. };
  248. };
  249. };