imx6q-sabrelite.dts 3.5 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. #include "imx6q.dtsi"
  14. / {
  15. model = "Freescale i.MX6 Quad SABRE Lite Board";
  16. compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
  17. memory {
  18. reg = <0x10000000 0x40000000>;
  19. };
  20. regulators {
  21. compatible = "simple-bus";
  22. reg_2p5v: 2p5v {
  23. compatible = "regulator-fixed";
  24. regulator-name = "2P5V";
  25. regulator-min-microvolt = <2500000>;
  26. regulator-max-microvolt = <2500000>;
  27. regulator-always-on;
  28. };
  29. reg_3p3v: 3p3v {
  30. compatible = "regulator-fixed";
  31. regulator-name = "3P3V";
  32. regulator-min-microvolt = <3300000>;
  33. regulator-max-microvolt = <3300000>;
  34. regulator-always-on;
  35. };
  36. reg_usb_otg_vbus: usb_otg_vbus {
  37. compatible = "regulator-fixed";
  38. regulator-name = "usb_otg_vbus";
  39. regulator-min-microvolt = <5000000>;
  40. regulator-max-microvolt = <5000000>;
  41. gpio = <&gpio3 22 0>;
  42. enable-active-high;
  43. };
  44. };
  45. sound {
  46. compatible = "fsl,imx6q-sabrelite-sgtl5000",
  47. "fsl,imx-audio-sgtl5000";
  48. model = "imx6q-sabrelite-sgtl5000";
  49. ssi-controller = <&ssi1>;
  50. audio-codec = <&codec>;
  51. audio-routing =
  52. "MIC_IN", "Mic Jack",
  53. "Mic Jack", "Mic Bias",
  54. "Headphone Jack", "HP_OUT";
  55. mux-int-port = <1>;
  56. mux-ext-port = <4>;
  57. };
  58. };
  59. &sata {
  60. status = "okay";
  61. };
  62. &ecspi1 {
  63. fsl,spi-num-chipselects = <1>;
  64. cs-gpios = <&gpio3 19 0>;
  65. pinctrl-names = "default";
  66. pinctrl-0 = <&pinctrl_ecspi1_1>;
  67. status = "okay";
  68. flash: m25p80@0 {
  69. compatible = "sst,sst25vf016b";
  70. spi-max-frequency = <20000000>;
  71. reg = <0>;
  72. };
  73. };
  74. &ssi1 {
  75. fsl,mode = "i2s-slave";
  76. status = "okay";
  77. };
  78. &iomuxc {
  79. pinctrl-names = "default";
  80. pinctrl-0 = <&pinctrl_hog>;
  81. hog {
  82. pinctrl_hog: hoggrp {
  83. fsl,pins = <
  84. MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
  85. MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
  86. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
  87. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
  88. MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
  89. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
  90. MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
  91. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
  92. >;
  93. };
  94. };
  95. };
  96. &usbotg {
  97. vbus-supply = <&reg_usb_otg_vbus>;
  98. pinctrl-names = "default";
  99. pinctrl-0 = <&pinctrl_usbotg_1>;
  100. disable-over-current;
  101. status = "okay";
  102. };
  103. &usbh1 {
  104. status = "okay";
  105. };
  106. &fec {
  107. pinctrl-names = "default";
  108. pinctrl-0 = <&pinctrl_enet_1>;
  109. phy-mode = "rgmii";
  110. phy-reset-gpios = <&gpio3 23 0>;
  111. status = "okay";
  112. };
  113. &usdhc3 {
  114. pinctrl-names = "default";
  115. pinctrl-0 = <&pinctrl_usdhc3_2>;
  116. cd-gpios = <&gpio7 0 0>;
  117. wp-gpios = <&gpio7 1 0>;
  118. vmmc-supply = <&reg_3p3v>;
  119. status = "okay";
  120. };
  121. &usdhc4 {
  122. pinctrl-names = "default";
  123. pinctrl-0 = <&pinctrl_usdhc4_2>;
  124. cd-gpios = <&gpio2 6 0>;
  125. wp-gpios = <&gpio2 7 0>;
  126. vmmc-supply = <&reg_3p3v>;
  127. status = "okay";
  128. };
  129. &audmux {
  130. status = "okay";
  131. pinctrl-names = "default";
  132. pinctrl-0 = <&pinctrl_audmux_1>;
  133. };
  134. &uart2 {
  135. status = "okay";
  136. pinctrl-names = "default";
  137. pinctrl-0 = <&pinctrl_uart2_1>;
  138. };
  139. &i2c1 {
  140. status = "okay";
  141. clock-frequency = <100000>;
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&pinctrl_i2c1_1>;
  144. codec: sgtl5000@0a {
  145. compatible = "fsl,sgtl5000";
  146. reg = <0x0a>;
  147. clocks = <&clks 201>;
  148. VDDA-supply = <&reg_2p5v>;
  149. VDDIO-supply = <&reg_3p3v>;
  150. };
  151. };