imx51-babbage.dts 6.2 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. #include "imx51.dtsi"
  14. / {
  15. model = "Freescale i.MX51 Babbage Board";
  16. compatible = "fsl,imx51-babbage", "fsl,imx51";
  17. memory {
  18. reg = <0x90000000 0x20000000>;
  19. };
  20. display@di0 {
  21. compatible = "fsl,imx-parallel-display";
  22. crtcs = <&ipu 0>;
  23. interface-pix-fmt = "rgb24";
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_ipu_disp1_1>;
  26. };
  27. display@di1 {
  28. compatible = "fsl,imx-parallel-display";
  29. crtcs = <&ipu 1>;
  30. interface-pix-fmt = "rgb565";
  31. pinctrl-names = "default";
  32. pinctrl-0 = <&pinctrl_ipu_disp2_1>;
  33. };
  34. gpio-keys {
  35. compatible = "gpio-keys";
  36. power {
  37. label = "Power Button";
  38. gpios = <&gpio2 21 0>;
  39. linux,code = <116>; /* KEY_POWER */
  40. gpio-key,wakeup;
  41. };
  42. };
  43. sound {
  44. compatible = "fsl,imx51-babbage-sgtl5000",
  45. "fsl,imx-audio-sgtl5000";
  46. model = "imx51-babbage-sgtl5000";
  47. ssi-controller = <&ssi2>;
  48. audio-codec = <&sgtl5000>;
  49. audio-routing =
  50. "MIC_IN", "Mic Jack",
  51. "Mic Jack", "Mic Bias",
  52. "Headphone Jack", "HP_OUT";
  53. mux-int-port = <2>;
  54. mux-ext-port = <3>;
  55. };
  56. clocks {
  57. ckih1 {
  58. clock-frequency = <22579200>;
  59. };
  60. clk_26M: codec_clock {
  61. compatible = "fixed-clock";
  62. reg=<0>;
  63. #clock-cells = <0>;
  64. clock-frequency = <26000000>;
  65. gpios = <&gpio4 26 1>;
  66. };
  67. };
  68. };
  69. &esdhc1 {
  70. pinctrl-names = "default";
  71. pinctrl-0 = <&pinctrl_esdhc1_1>;
  72. fsl,cd-controller;
  73. fsl,wp-controller;
  74. status = "okay";
  75. };
  76. &esdhc2 {
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&pinctrl_esdhc2_1>;
  79. cd-gpios = <&gpio1 6 0>;
  80. wp-gpios = <&gpio1 5 0>;
  81. status = "okay";
  82. };
  83. &uart3 {
  84. pinctrl-names = "default";
  85. pinctrl-0 = <&pinctrl_uart3_1>;
  86. fsl,uart-has-rtscts;
  87. status = "okay";
  88. };
  89. &ecspi1 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&pinctrl_ecspi1_1>;
  92. fsl,spi-num-chipselects = <2>;
  93. cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
  94. status = "okay";
  95. pmic: mc13892@0 {
  96. #address-cells = <1>;
  97. #size-cells = <0>;
  98. compatible = "fsl,mc13892";
  99. spi-max-frequency = <6000000>;
  100. spi-cs-high;
  101. reg = <0>;
  102. interrupt-parent = <&gpio1>;
  103. interrupts = <8 0x4>;
  104. regulators {
  105. sw1_reg: sw1 {
  106. regulator-min-microvolt = <600000>;
  107. regulator-max-microvolt = <1375000>;
  108. regulator-boot-on;
  109. regulator-always-on;
  110. };
  111. sw2_reg: sw2 {
  112. regulator-min-microvolt = <900000>;
  113. regulator-max-microvolt = <1850000>;
  114. regulator-boot-on;
  115. regulator-always-on;
  116. };
  117. sw3_reg: sw3 {
  118. regulator-min-microvolt = <1100000>;
  119. regulator-max-microvolt = <1850000>;
  120. regulator-boot-on;
  121. regulator-always-on;
  122. };
  123. sw4_reg: sw4 {
  124. regulator-min-microvolt = <1100000>;
  125. regulator-max-microvolt = <1850000>;
  126. regulator-boot-on;
  127. regulator-always-on;
  128. };
  129. vpll_reg: vpll {
  130. regulator-min-microvolt = <1050000>;
  131. regulator-max-microvolt = <1800000>;
  132. regulator-boot-on;
  133. regulator-always-on;
  134. };
  135. vdig_reg: vdig {
  136. regulator-min-microvolt = <1650000>;
  137. regulator-max-microvolt = <1650000>;
  138. regulator-boot-on;
  139. };
  140. vsd_reg: vsd {
  141. regulator-min-microvolt = <1800000>;
  142. regulator-max-microvolt = <3150000>;
  143. };
  144. vusb2_reg: vusb2 {
  145. regulator-min-microvolt = <2400000>;
  146. regulator-max-microvolt = <2775000>;
  147. regulator-boot-on;
  148. regulator-always-on;
  149. };
  150. vvideo_reg: vvideo {
  151. regulator-min-microvolt = <2775000>;
  152. regulator-max-microvolt = <2775000>;
  153. };
  154. vaudio_reg: vaudio {
  155. regulator-min-microvolt = <2300000>;
  156. regulator-max-microvolt = <3000000>;
  157. };
  158. vcam_reg: vcam {
  159. regulator-min-microvolt = <2500000>;
  160. regulator-max-microvolt = <3000000>;
  161. };
  162. vgen1_reg: vgen1 {
  163. regulator-min-microvolt = <1200000>;
  164. regulator-max-microvolt = <1200000>;
  165. };
  166. vgen2_reg: vgen2 {
  167. regulator-min-microvolt = <1200000>;
  168. regulator-max-microvolt = <3150000>;
  169. regulator-always-on;
  170. };
  171. vgen3_reg: vgen3 {
  172. regulator-min-microvolt = <1800000>;
  173. regulator-max-microvolt = <2900000>;
  174. regulator-always-on;
  175. };
  176. };
  177. };
  178. flash: at45db321d@1 {
  179. #address-cells = <1>;
  180. #size-cells = <1>;
  181. compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
  182. spi-max-frequency = <25000000>;
  183. reg = <1>;
  184. partition@0 {
  185. label = "U-Boot";
  186. reg = <0x0 0x40000>;
  187. read-only;
  188. };
  189. partition@40000 {
  190. label = "Kernel";
  191. reg = <0x40000 0x3c0000>;
  192. };
  193. };
  194. };
  195. &ssi2 {
  196. fsl,mode = "i2s-slave";
  197. status = "okay";
  198. };
  199. &iomuxc {
  200. pinctrl-names = "default";
  201. pinctrl-0 = <&pinctrl_hog>;
  202. hog {
  203. pinctrl_hog: hoggrp {
  204. fsl,pins = <
  205. MX51_PAD_GPIO1_0__SD1_CD 0x20d5
  206. MX51_PAD_GPIO1_1__SD1_WP 0x20d5
  207. MX51_PAD_GPIO1_5__GPIO1_5 0x100
  208. MX51_PAD_GPIO1_6__GPIO1_6 0x100
  209. MX51_PAD_EIM_A27__GPIO2_21 0x5
  210. MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
  211. MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
  212. MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
  213. >;
  214. };
  215. };
  216. };
  217. &uart1 {
  218. pinctrl-names = "default";
  219. pinctrl-0 = <&pinctrl_uart1_1>;
  220. fsl,uart-has-rtscts;
  221. status = "okay";
  222. };
  223. &uart2 {
  224. pinctrl-names = "default";
  225. pinctrl-0 = <&pinctrl_uart2_1>;
  226. status = "okay";
  227. };
  228. &i2c2 {
  229. pinctrl-names = "default";
  230. pinctrl-0 = <&pinctrl_i2c2_1>;
  231. status = "okay";
  232. sgtl5000: codec@0a {
  233. compatible = "fsl,sgtl5000";
  234. reg = <0x0a>;
  235. clocks = <&clk_26M>;
  236. VDDA-supply = <&vdig_reg>;
  237. VDDIO-supply = <&vvideo_reg>;
  238. };
  239. };
  240. &audmux {
  241. pinctrl-names = "default";
  242. pinctrl-0 = <&pinctrl_audmux_1>;
  243. status = "okay";
  244. };
  245. &fec {
  246. pinctrl-names = "default";
  247. pinctrl-0 = <&pinctrl_fec_1>;
  248. phy-mode = "mii";
  249. status = "okay";
  250. };
  251. &kpp {
  252. pinctrl-names = "default";
  253. pinctrl-0 = <&pinctrl_kpp_1>;
  254. linux,keymap = <0x00000067 /* KEY_UP */
  255. 0x0001006c /* KEY_DOWN */
  256. 0x00020072 /* KEY_VOLUMEDOWN */
  257. 0x00030066 /* KEY_HOME */
  258. 0x0100006a /* KEY_RIGHT */
  259. 0x01010069 /* KEY_LEFT */
  260. 0x0102001c /* KEY_ENTER */
  261. 0x01030073 /* KEY_VOLUMEUP */
  262. 0x02000040 /* KEY_F6 */
  263. 0x02010042 /* KEY_F8 */
  264. 0x02020043 /* KEY_F9 */
  265. 0x02030044 /* KEY_F10 */
  266. 0x0300003b /* KEY_F1 */
  267. 0x0301003c /* KEY_F2 */
  268. 0x0302003d /* KEY_F3 */
  269. 0x03030074>; /* KEY_POWER */
  270. status = "okay";
  271. };