imx28-cfa10056.dts 2.8 KB

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  1. /*
  2. * Copyright 2013 Free Electrons
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /*
  12. * The CFA-10055 is an expansion board for the CFA-10036 module and
  13. * CFA-10037, thus we need to include the CFA-10037 DTS.
  14. */
  15. /include/ "imx28-cfa10037.dts"
  16. / {
  17. model = "Crystalfontz CFA-10056 Board";
  18. compatible = "crystalfontz,cfa10056", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28";
  19. apb@80000000 {
  20. apbh@80000000 {
  21. pinctrl@80018000 {
  22. spi2_pins_cfa10056: spi2-cfa10056@0 {
  23. reg = <0>;
  24. fsl,pinmux-ids = <
  25. 0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
  26. 0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
  27. 0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
  28. 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
  29. >;
  30. fsl,drive-strength = <1>;
  31. fsl,voltage = <1>;
  32. fsl,pull-up = <1>;
  33. };
  34. lcdif_pins_cfa10056: lcdif-10056@0 {
  35. reg = <0>;
  36. fsl,pinmux-ids = <
  37. 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
  38. 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
  39. 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
  40. 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
  41. >;
  42. fsl,drive-strength = <0>;
  43. fsl,voltage = <1>;
  44. fsl,pull-up = <0>;
  45. };
  46. lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 {
  47. reg = <0>;
  48. fsl,pinmux-ids = <
  49. 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
  50. >;
  51. fsl,drive-strength = <0>;
  52. fsl,voltage = <1>;
  53. fsl,pull-up = <1>;
  54. };
  55. };
  56. lcdif@80030000 {
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&lcdif_24bit_pins_a
  59. &lcdif_pins_cfa10056
  60. &lcdif_pins_cfa10056_pullup >;
  61. display = <&display>;
  62. status = "okay";
  63. display: display {
  64. bits-per-pixel = <32>;
  65. bus-width = <24>;
  66. display-timings {
  67. native-mode = <&timing0>;
  68. timing0: timing0 {
  69. clock-frequency = <32000000>;
  70. hactive = <480>;
  71. vactive = <800>;
  72. hback-porch = <2>;
  73. hfront-porch = <2>;
  74. vback-porch = <2>;
  75. vfront-porch = <2>;
  76. hsync-len = <5>;
  77. vsync-len = <5>;
  78. hsync-active = <0>;
  79. vsync-active = <0>;
  80. de-active = <1>;
  81. pixelclk-active = <1>;
  82. };
  83. };
  84. };
  85. };
  86. };
  87. };
  88. spi2 {
  89. compatible = "spi-gpio";
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&spi2_pins_cfa10056>;
  92. status = "okay";
  93. gpio-sck = <&gpio2 16 0>;
  94. gpio-mosi = <&gpio2 17 0>;
  95. gpio-miso = <&gpio2 18 0>;
  96. cs-gpios = <&gpio3 5 0>;
  97. num-chipselects = <1>;
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. hx8369: hx8369@0 {
  101. compatible = "himax,hx8369a", "himax,hx8369";
  102. reg = <0>;
  103. spi-max-frequency = <100000>;
  104. spi-cpol;
  105. spi-cpha;
  106. gpios-reset = <&gpio3 30 0>;
  107. };
  108. };
  109. };