imx27-phytec-phycore-som.dts 3.6 KB

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  1. /*
  2. * Copyright 2012 Sascha Hauer, Pengutronix
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /dts-v1/;
  12. #include "imx27.dtsi"
  13. / {
  14. model = "Phytec pcm038";
  15. compatible = "phytec,imx27-pcm038", "fsl,imx27";
  16. memory {
  17. reg = <0xa0000000 0x08000000>;
  18. };
  19. };
  20. &audmux {
  21. status = "okay";
  22. /* SSI0 <=> PINS_4 (MC13783 Audio) */
  23. ssi0 {
  24. fsl,audmux-port = <0>;
  25. fsl,port-config = <0xcb205000>;
  26. };
  27. pins4 {
  28. fsl,audmux-port = <2>;
  29. fsl,port-config = <0x00001000>;
  30. };
  31. };
  32. &cspi1 {
  33. fsl,spi-num-chipselects = <1>;
  34. cs-gpios = <&gpio4 28 0>;
  35. status = "okay";
  36. pmic: mc13783@0 {
  37. #address-cells = <1>;
  38. #size-cells = <0>;
  39. compatible = "fsl,mc13783";
  40. spi-max-frequency = <20000000>;
  41. reg = <0>;
  42. interrupt-parent = <&gpio2>;
  43. interrupts = <23 0x4>;
  44. fsl,mc13xxx-uses-adc;
  45. fsl,mc13xxx-uses-rtc;
  46. regulators {
  47. /* SW1A and SW1B joined operation */
  48. sw1_reg: sw1a {
  49. regulator-min-microvolt = <1200000>;
  50. regulator-max-microvolt = <1520000>;
  51. regulator-always-on;
  52. regulator-boot-on;
  53. };
  54. /* SW2A and SW2B joined operation */
  55. sw2_reg: sw2a {
  56. regulator-min-microvolt = <1800000>;
  57. regulator-max-microvolt = <1800000>;
  58. regulator-always-on;
  59. regulator-boot-on;
  60. };
  61. sw3_reg: sw3 {
  62. regulator-min-microvolt = <5000000>;
  63. regulator-max-microvolt = <5000000>;
  64. regulator-always-on;
  65. regulator-boot-on;
  66. };
  67. vaudio_reg: vaudio {
  68. regulator-always-on;
  69. regulator-boot-on;
  70. };
  71. violo_reg: violo {
  72. regulator-min-microvolt = <1800000>;
  73. regulator-max-microvolt = <1800000>;
  74. regulator-always-on;
  75. regulator-boot-on;
  76. };
  77. viohi_reg: viohi {
  78. regulator-always-on;
  79. regulator-boot-on;
  80. };
  81. vgen_reg: vgen {
  82. regulator-min-microvolt = <1500000>;
  83. regulator-max-microvolt = <1500000>;
  84. regulator-always-on;
  85. regulator-boot-on;
  86. };
  87. vcam_reg: vcam {
  88. regulator-min-microvolt = <2800000>;
  89. regulator-max-microvolt = <2800000>;
  90. };
  91. vrf1_reg: vrf1 {
  92. regulator-min-microvolt = <2775000>;
  93. regulator-max-microvolt = <2775000>;
  94. regulator-always-on;
  95. regulator-boot-on;
  96. };
  97. vrf2_reg: vrf2 {
  98. regulator-min-microvolt = <2775000>;
  99. regulator-max-microvolt = <2775000>;
  100. regulator-always-on;
  101. regulator-boot-on;
  102. };
  103. vmmc1_reg: vmmc1 {
  104. regulator-min-microvolt = <1600000>;
  105. regulator-max-microvolt = <3000000>;
  106. };
  107. gpo1_reg: gpo1 { };
  108. pwgt1spi_reg: pwgt1spi {
  109. regulator-always-on;
  110. };
  111. };
  112. };
  113. };
  114. &fec {
  115. phy-reset-gpios = <&gpio3 30 0>;
  116. status = "okay";
  117. };
  118. &i2c2 {
  119. clock-frequency = <400000>;
  120. status = "okay";
  121. at24@52 {
  122. compatible = "at,24c32";
  123. pagesize = <32>;
  124. reg = <0x52>;
  125. };
  126. pcf8563@51 {
  127. compatible = "nxp,pcf8563";
  128. reg = <0x51>;
  129. };
  130. lm75@4a {
  131. compatible = "national,lm75";
  132. reg = <0x4a>;
  133. };
  134. };
  135. &nfc {
  136. nand-bus-width = <8>;
  137. nand-ecc-mode = "hw";
  138. status = "okay";
  139. };
  140. &uart1 {
  141. status = "okay";
  142. };
  143. &weim {
  144. status = "okay";
  145. nor: nor@c0000000 {
  146. compatible = "cfi-flash";
  147. reg = <0 0x00000000 0x02000000>;
  148. bank-width = <2>;
  149. linux,mtd-name = "physmap-flash.0";
  150. fsl,weim-cs-timing = <0x22c2cf00 0x75000d01 0x00000900>;
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153. };
  154. sram: sram@c8000000 {
  155. compatible = "mtd-ram";
  156. reg = <1 0x00000000 0x00800000>;
  157. bank-width = <2>;
  158. linux,mtd-name = "mtd-ram.0";
  159. fsl,weim-cs-timing = <0x0000d843 0x22252521 0x22220a00>;
  160. #address-cells = <1>;
  161. #size-cells = <1>;
  162. };
  163. };