imx27-phytec-phycore-rdk.dts 1.0 KB

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  1. /*
  2. * The code contained herein is licensed under the GNU General Public
  3. * License. You may obtain a copy of the GNU General Public License
  4. * Version 2 or later at the following locations:
  5. *
  6. * http://www.opensource.org/licenses/gpl-license.html
  7. * http://www.gnu.org/copyleft/gpl.html
  8. */
  9. #include "imx27-phytec-phycore-som.dts"
  10. / {
  11. model = "Phytec pcm970";
  12. compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
  13. };
  14. &cspi1 {
  15. fsl,spi-num-chipselects = <2>;
  16. cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
  17. };
  18. &sdhci2 {
  19. bus-width = <4>;
  20. cd-gpios = <&gpio3 29 0>;
  21. wp-gpios = <&gpio3 28 0>;
  22. vmmc-supply = <&vmmc1_reg>;
  23. status = "okay";
  24. };
  25. &uart1 {
  26. fsl,uart-has-rtscts;
  27. };
  28. &uart2 {
  29. fsl,uart-has-rtscts;
  30. status = "okay";
  31. };
  32. &weim {
  33. can@d4000000 {
  34. compatible = "nxp,sja1000";
  35. reg = <4 0x00000000 0x00000100>;
  36. interrupt-parent = <&gpio5>;
  37. interrupts = <19 0x2>;
  38. nxp,external-clock-frequency = <16000000>;
  39. nxp,tx-output-config = <0x16>;
  40. nxp,no-comparator-bypass;
  41. fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
  42. };
  43. };