imx23.dtsi 13 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. interrupt-parent = <&icoll>;
  14. aliases {
  15. gpio0 = &gpio0;
  16. gpio1 = &gpio1;
  17. gpio2 = &gpio2;
  18. serial0 = &auart0;
  19. serial1 = &auart1;
  20. spi0 = &ssp0;
  21. spi1 = &ssp1;
  22. };
  23. cpus {
  24. #address-cells = <0>;
  25. #size-cells = <0>;
  26. cpu {
  27. compatible = "arm,arm926ej-s";
  28. device_type = "cpu";
  29. };
  30. };
  31. apb@80000000 {
  32. compatible = "simple-bus";
  33. #address-cells = <1>;
  34. #size-cells = <1>;
  35. reg = <0x80000000 0x80000>;
  36. ranges;
  37. apbh@80000000 {
  38. compatible = "simple-bus";
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. reg = <0x80000000 0x40000>;
  42. ranges;
  43. icoll: interrupt-controller@80000000 {
  44. compatible = "fsl,imx23-icoll", "fsl,icoll";
  45. interrupt-controller;
  46. #interrupt-cells = <1>;
  47. reg = <0x80000000 0x2000>;
  48. };
  49. dma_apbh: dma-apbh@80004000 {
  50. compatible = "fsl,imx23-dma-apbh";
  51. reg = <0x80004000 0x2000>;
  52. interrupts = <0 14 20 0
  53. 13 13 13 13>;
  54. interrupt-names = "empty", "ssp0", "ssp1", "empty",
  55. "gpmi0", "gpmi1", "gpmi2", "gpmi3";
  56. #dma-cells = <1>;
  57. dma-channels = <8>;
  58. clocks = <&clks 15>;
  59. };
  60. ecc@80008000 {
  61. reg = <0x80008000 0x2000>;
  62. status = "disabled";
  63. };
  64. gpmi-nand@8000c000 {
  65. compatible = "fsl,imx23-gpmi-nand";
  66. #address-cells = <1>;
  67. #size-cells = <1>;
  68. reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
  69. reg-names = "gpmi-nand", "bch";
  70. interrupts = <56>;
  71. interrupt-names = "bch";
  72. clocks = <&clks 34>;
  73. clock-names = "gpmi_io";
  74. dmas = <&dma_apbh 4>;
  75. dma-names = "rx-tx";
  76. status = "disabled";
  77. };
  78. ssp0: ssp@80010000 {
  79. reg = <0x80010000 0x2000>;
  80. interrupts = <15>;
  81. clocks = <&clks 33>;
  82. dmas = <&dma_apbh 1>;
  83. dma-names = "rx-tx";
  84. status = "disabled";
  85. };
  86. etm@80014000 {
  87. reg = <0x80014000 0x2000>;
  88. status = "disabled";
  89. };
  90. pinctrl@80018000 {
  91. #address-cells = <1>;
  92. #size-cells = <0>;
  93. compatible = "fsl,imx23-pinctrl", "simple-bus";
  94. reg = <0x80018000 0x2000>;
  95. gpio0: gpio@0 {
  96. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  97. interrupts = <16>;
  98. gpio-controller;
  99. #gpio-cells = <2>;
  100. interrupt-controller;
  101. #interrupt-cells = <2>;
  102. };
  103. gpio1: gpio@1 {
  104. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  105. interrupts = <17>;
  106. gpio-controller;
  107. #gpio-cells = <2>;
  108. interrupt-controller;
  109. #interrupt-cells = <2>;
  110. };
  111. gpio2: gpio@2 {
  112. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  113. interrupts = <18>;
  114. gpio-controller;
  115. #gpio-cells = <2>;
  116. interrupt-controller;
  117. #interrupt-cells = <2>;
  118. };
  119. duart_pins_a: duart@0 {
  120. reg = <0>;
  121. fsl,pinmux-ids = <
  122. 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
  123. 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
  124. >;
  125. fsl,drive-strength = <0>;
  126. fsl,voltage = <1>;
  127. fsl,pull-up = <0>;
  128. };
  129. auart0_pins_a: auart0@0 {
  130. reg = <0>;
  131. fsl,pinmux-ids = <
  132. 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
  133. 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
  134. 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
  135. 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
  136. >;
  137. fsl,drive-strength = <0>;
  138. fsl,voltage = <1>;
  139. fsl,pull-up = <0>;
  140. };
  141. auart0_2pins_a: auart0-2pins@0 {
  142. reg = <0>;
  143. fsl,pinmux-ids = <
  144. 0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
  145. 0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
  146. >;
  147. fsl,drive-strength = <0>;
  148. fsl,voltage = <1>;
  149. fsl,pull-up = <0>;
  150. };
  151. gpmi_pins_a: gpmi-nand@0 {
  152. reg = <0>;
  153. fsl,pinmux-ids = <
  154. 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
  155. 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
  156. 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
  157. 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
  158. 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
  159. 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
  160. 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
  161. 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
  162. 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
  163. 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
  164. 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
  165. 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
  166. 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
  167. 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
  168. 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
  169. 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
  170. 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
  171. >;
  172. fsl,drive-strength = <0>;
  173. fsl,voltage = <1>;
  174. fsl,pull-up = <0>;
  175. };
  176. gpmi_pins_fixup: gpmi-pins-fixup {
  177. fsl,pinmux-ids = <
  178. 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
  179. 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
  180. 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
  181. >;
  182. fsl,drive-strength = <2>;
  183. };
  184. mmc0_4bit_pins_a: mmc0-4bit@0 {
  185. reg = <0>;
  186. fsl,pinmux-ids = <
  187. 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
  188. 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
  189. 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
  190. 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
  191. 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
  192. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  193. >;
  194. fsl,drive-strength = <1>;
  195. fsl,voltage = <1>;
  196. fsl,pull-up = <1>;
  197. };
  198. mmc0_8bit_pins_a: mmc0-8bit@0 {
  199. reg = <0>;
  200. fsl,pinmux-ids = <
  201. 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
  202. 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
  203. 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
  204. 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
  205. 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
  206. 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
  207. 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
  208. 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
  209. 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
  210. 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
  211. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  212. >;
  213. fsl,drive-strength = <1>;
  214. fsl,voltage = <1>;
  215. fsl,pull-up = <1>;
  216. };
  217. mmc0_pins_fixup: mmc0-pins-fixup {
  218. fsl,pinmux-ids = <
  219. 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
  220. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  221. >;
  222. fsl,pull-up = <0>;
  223. };
  224. pwm2_pins_a: pwm2@0 {
  225. reg = <0>;
  226. fsl,pinmux-ids = <
  227. 0x11c0 /* MX23_PAD_PWM2__PWM2 */
  228. >;
  229. fsl,drive-strength = <0>;
  230. fsl,voltage = <1>;
  231. fsl,pull-up = <0>;
  232. };
  233. lcdif_24bit_pins_a: lcdif-24bit@0 {
  234. reg = <0>;
  235. fsl,pinmux-ids = <
  236. 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
  237. 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
  238. 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
  239. 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
  240. 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
  241. 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
  242. 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
  243. 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
  244. 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
  245. 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
  246. 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
  247. 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
  248. 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
  249. 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
  250. 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
  251. 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
  252. 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
  253. 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
  254. 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
  255. 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
  256. 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
  257. 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
  258. 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
  259. 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
  260. 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
  261. 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
  262. 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
  263. 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
  264. >;
  265. fsl,drive-strength = <0>;
  266. fsl,voltage = <1>;
  267. fsl,pull-up = <0>;
  268. };
  269. spi2_pins_a: spi2@0 {
  270. reg = <0>;
  271. fsl,pinmux-ids = <
  272. 0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
  273. 0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
  274. 0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
  275. 0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
  276. >;
  277. fsl,drive-strength = <1>;
  278. fsl,voltage = <1>;
  279. fsl,pull-up = <1>;
  280. };
  281. };
  282. digctl@8001c000 {
  283. compatible = "fsl,imx23-digctl";
  284. reg = <0x8001c000 2000>;
  285. status = "disabled";
  286. };
  287. emi@80020000 {
  288. reg = <0x80020000 0x2000>;
  289. status = "disabled";
  290. };
  291. dma_apbx: dma-apbx@80024000 {
  292. compatible = "fsl,imx23-dma-apbx";
  293. reg = <0x80024000 0x2000>;
  294. interrupts = <7 5 9 26
  295. 19 0 25 23
  296. 60 58 9 0
  297. 0 0 0 0>;
  298. interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
  299. "saif0", "empty", "auart0-rx", "auart0-tx",
  300. "auart1-rx", "auart1-tx", "saif1", "empty",
  301. "empty", "empty", "empty", "empty";
  302. #dma-cells = <1>;
  303. dma-channels = <16>;
  304. clocks = <&clks 16>;
  305. };
  306. dcp@80028000 {
  307. reg = <0x80028000 0x2000>;
  308. status = "disabled";
  309. };
  310. pxp@8002a000 {
  311. reg = <0x8002a000 0x2000>;
  312. status = "disabled";
  313. };
  314. ocotp@8002c000 {
  315. compatible = "fsl,ocotp";
  316. reg = <0x8002c000 0x2000>;
  317. status = "disabled";
  318. };
  319. axi-ahb@8002e000 {
  320. reg = <0x8002e000 0x2000>;
  321. status = "disabled";
  322. };
  323. lcdif@80030000 {
  324. compatible = "fsl,imx23-lcdif";
  325. reg = <0x80030000 2000>;
  326. interrupts = <46 45>;
  327. clocks = <&clks 38>;
  328. status = "disabled";
  329. };
  330. ssp1: ssp@80034000 {
  331. reg = <0x80034000 0x2000>;
  332. interrupts = <2>;
  333. clocks = <&clks 33>;
  334. dmas = <&dma_apbh 2>;
  335. dma-names = "rx-tx";
  336. status = "disabled";
  337. };
  338. tvenc@80038000 {
  339. reg = <0x80038000 0x2000>;
  340. status = "disabled";
  341. };
  342. };
  343. apbx@80040000 {
  344. compatible = "simple-bus";
  345. #address-cells = <1>;
  346. #size-cells = <1>;
  347. reg = <0x80040000 0x40000>;
  348. ranges;
  349. clks: clkctrl@80040000 {
  350. compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
  351. reg = <0x80040000 0x2000>;
  352. #clock-cells = <1>;
  353. };
  354. saif0: saif@80042000 {
  355. reg = <0x80042000 0x2000>;
  356. dmas = <&dma_apbx 4>;
  357. dma-names = "rx-tx";
  358. status = "disabled";
  359. };
  360. power@80044000 {
  361. reg = <0x80044000 0x2000>;
  362. status = "disabled";
  363. };
  364. saif1: saif@80046000 {
  365. reg = <0x80046000 0x2000>;
  366. dmas = <&dma_apbx 10>;
  367. dma-names = "rx-tx";
  368. status = "disabled";
  369. };
  370. audio-out@80048000 {
  371. reg = <0x80048000 0x2000>;
  372. dmas = <&dma_apbx 1>;
  373. dma-names = "tx";
  374. status = "disabled";
  375. };
  376. audio-in@8004c000 {
  377. reg = <0x8004c000 0x2000>;
  378. dmas = <&dma_apbx 0>;
  379. dma-names = "rx";
  380. status = "disabled";
  381. };
  382. lradc@80050000 {
  383. compatible = "fsl,imx23-lradc";
  384. reg = <0x80050000 0x2000>;
  385. interrupts = <36 37 38 39 40 41 42 43 44>;
  386. status = "disabled";
  387. };
  388. spdif@80054000 {
  389. reg = <0x80054000 2000>;
  390. dmas = <&dma_apbx 2>;
  391. dma-names = "tx";
  392. status = "disabled";
  393. };
  394. i2c@80058000 {
  395. reg = <0x80058000 0x2000>;
  396. dmas = <&dma_apbx 3>;
  397. dma-names = "rx-tx";
  398. status = "disabled";
  399. };
  400. rtc@8005c000 {
  401. compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
  402. reg = <0x8005c000 0x2000>;
  403. interrupts = <22>;
  404. };
  405. pwm: pwm@80064000 {
  406. compatible = "fsl,imx23-pwm";
  407. reg = <0x80064000 0x2000>;
  408. clocks = <&clks 30>;
  409. #pwm-cells = <2>;
  410. fsl,pwm-number = <5>;
  411. status = "disabled";
  412. };
  413. timrot@80068000 {
  414. compatible = "fsl,imx23-timrot", "fsl,timrot";
  415. reg = <0x80068000 0x2000>;
  416. interrupts = <28 29 30 31>;
  417. clocks = <&clks 28>;
  418. };
  419. auart0: serial@8006c000 {
  420. compatible = "fsl,imx23-auart";
  421. reg = <0x8006c000 0x2000>;
  422. interrupts = <24>;
  423. clocks = <&clks 32>;
  424. dmas = <&dma_apbx 6>, <&dma_apbx 7>;
  425. dma-names = "rx", "tx";
  426. status = "disabled";
  427. };
  428. auart1: serial@8006e000 {
  429. compatible = "fsl,imx23-auart";
  430. reg = <0x8006e000 0x2000>;
  431. interrupts = <59>;
  432. clocks = <&clks 32>;
  433. dmas = <&dma_apbx 8>, <&dma_apbx 9>;
  434. dma-names = "rx", "tx";
  435. status = "disabled";
  436. };
  437. duart: serial@80070000 {
  438. compatible = "arm,pl011", "arm,primecell";
  439. reg = <0x80070000 0x2000>;
  440. interrupts = <0>;
  441. clocks = <&clks 32>, <&clks 16>;
  442. clock-names = "uart", "apb_pclk";
  443. status = "disabled";
  444. };
  445. usbphy0: usbphy@8007c000 {
  446. compatible = "fsl,imx23-usbphy";
  447. reg = <0x8007c000 0x2000>;
  448. clocks = <&clks 41>;
  449. status = "disabled";
  450. };
  451. };
  452. };
  453. ahb@80080000 {
  454. compatible = "simple-bus";
  455. #address-cells = <1>;
  456. #size-cells = <1>;
  457. reg = <0x80080000 0x80000>;
  458. ranges;
  459. usb0: usb@80080000 {
  460. compatible = "fsl,imx23-usb", "fsl,imx27-usb";
  461. reg = <0x80080000 0x40000>;
  462. interrupts = <11>;
  463. fsl,usbphy = <&usbphy0>;
  464. clocks = <&clks 40>;
  465. status = "disabled";
  466. };
  467. };
  468. };