exynos5440.dtsi 6.6 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. aliases {
  16. spi0 = &spi_0;
  17. tmuctrl0 = &tmuctrl_0;
  18. tmuctrl1 = &tmuctrl_1;
  19. tmuctrl2 = &tmuctrl_2;
  20. };
  21. clock: clock-controller@160000 {
  22. compatible = "samsung,exynos5440-clock";
  23. reg = <0x160000 0x1000>;
  24. #clock-cells = <1>;
  25. };
  26. gic:interrupt-controller@2E0000 {
  27. compatible = "arm,cortex-a15-gic";
  28. #interrupt-cells = <3>;
  29. interrupt-controller;
  30. reg = <0x2E1000 0x1000>,
  31. <0x2E2000 0x1000>,
  32. <0x2E4000 0x2000>,
  33. <0x2E6000 0x2000>;
  34. interrupts = <1 9 0xf04>;
  35. };
  36. cpus {
  37. #address-cells = <1>;
  38. #size-cells = <0>;
  39. cpu@0 {
  40. device_type = "cpu";
  41. compatible = "arm,cortex-a15";
  42. reg = <0>;
  43. };
  44. cpu@1 {
  45. device_type = "cpu";
  46. compatible = "arm,cortex-a15";
  47. reg = <1>;
  48. };
  49. cpu@2 {
  50. device_type = "cpu";
  51. compatible = "arm,cortex-a15";
  52. reg = <2>;
  53. };
  54. cpu@3 {
  55. device_type = "cpu";
  56. compatible = "arm,cortex-a15";
  57. reg = <3>;
  58. };
  59. };
  60. arm-pmu {
  61. compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
  62. interrupts = <0 52 4>,
  63. <0 53 4>,
  64. <0 54 4>,
  65. <0 55 4>;
  66. };
  67. timer {
  68. compatible = "arm,cortex-a15-timer",
  69. "arm,armv7-timer";
  70. interrupts = <1 13 0xf08>,
  71. <1 14 0xf08>,
  72. <1 11 0xf08>,
  73. <1 10 0xf08>;
  74. clock-frequency = <50000000>;
  75. };
  76. cpufreq@160000 {
  77. compatible = "samsung,exynos5440-cpufreq";
  78. reg = <0x160000 0x1000>;
  79. interrupts = <0 57 0>;
  80. operating-points = <
  81. /* KHz uV */
  82. 1500000 1100000
  83. 1400000 1075000
  84. 1300000 1050000
  85. 1200000 1025000
  86. 1100000 1000000
  87. 1000000 975000
  88. 900000 950000
  89. 800000 925000
  90. >;
  91. };
  92. serial@B0000 {
  93. compatible = "samsung,exynos4210-uart";
  94. reg = <0xB0000 0x1000>;
  95. interrupts = <0 2 0>;
  96. clocks = <&clock 21>, <&clock 21>;
  97. clock-names = "uart", "clk_uart_baud0";
  98. };
  99. serial@C0000 {
  100. compatible = "samsung,exynos4210-uart";
  101. reg = <0xC0000 0x1000>;
  102. interrupts = <0 3 0>;
  103. clocks = <&clock 21>, <&clock 21>;
  104. clock-names = "uart", "clk_uart_baud0";
  105. };
  106. spi_0: spi@D0000 {
  107. compatible = "samsung,exynos5440-spi";
  108. reg = <0xD0000 0x100>;
  109. interrupts = <0 4 0>;
  110. #address-cells = <1>;
  111. #size-cells = <0>;
  112. samsung,spi-src-clk = <0>;
  113. num-cs = <1>;
  114. clocks = <&clock 21>, <&clock 16>;
  115. clock-names = "spi", "spi_busclk0";
  116. };
  117. pin_ctrl: pinctrl {
  118. compatible = "samsung,exynos5440-pinctrl";
  119. reg = <0xE0000 0x1000>;
  120. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
  121. <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
  122. interrupt-controller;
  123. #interrupt-cells = <2>;
  124. #gpio-cells = <2>;
  125. fan: fan {
  126. samsung,exynos5440-pin-function = <1>;
  127. };
  128. hdd_led0: hdd_led0 {
  129. samsung,exynos5440-pin-function = <2>;
  130. };
  131. hdd_led1: hdd_led1 {
  132. samsung,exynos5440-pin-function = <3>;
  133. };
  134. uart1: uart1 {
  135. samsung,exynos5440-pin-function = <4>;
  136. };
  137. };
  138. i2c@F0000 {
  139. compatible = "samsung,exynos5440-i2c";
  140. reg = <0xF0000 0x1000>;
  141. interrupts = <0 5 0>;
  142. #address-cells = <1>;
  143. #size-cells = <0>;
  144. clocks = <&clock 21>;
  145. clock-names = "i2c";
  146. };
  147. i2c@100000 {
  148. compatible = "samsung,exynos5440-i2c";
  149. reg = <0x100000 0x1000>;
  150. interrupts = <0 6 0>;
  151. #address-cells = <1>;
  152. #size-cells = <0>;
  153. clocks = <&clock 21>;
  154. clock-names = "i2c";
  155. };
  156. watchdog {
  157. compatible = "samsung,s3c2410-wdt";
  158. reg = <0x110000 0x1000>;
  159. interrupts = <0 1 0>;
  160. clocks = <&clock 21>;
  161. clock-names = "watchdog";
  162. };
  163. gmac: ethernet@00230000 {
  164. compatible = "snps,dwmac-3.70a";
  165. reg = <0x00230000 0x8000>;
  166. interrupt-parent = <&gic>;
  167. interrupts = <0 31 4>;
  168. interrupt-names = "macirq";
  169. phy-mode = "sgmii";
  170. clocks = <&clock 25>;
  171. clock-names = "stmmaceth";
  172. };
  173. amba {
  174. #address-cells = <1>;
  175. #size-cells = <1>;
  176. compatible = "arm,amba-bus";
  177. interrupt-parent = <&gic>;
  178. ranges;
  179. };
  180. rtc {
  181. compatible = "samsung,s3c6410-rtc";
  182. reg = <0x130000 0x1000>;
  183. interrupts = <0 17 0>, <0 16 0>;
  184. clocks = <&clock 21>;
  185. clock-names = "rtc";
  186. };
  187. tmuctrl_0: tmuctrl@160118 {
  188. compatible = "samsung,exynos5440-tmu";
  189. reg = <0x160118 0x230>, <0x160368 0x10>;
  190. interrupts = <0 58 0>;
  191. clocks = <&clock 21>;
  192. clock-names = "tmu_apbif";
  193. };
  194. tmuctrl_1: tmuctrl@16011C {
  195. compatible = "samsung,exynos5440-tmu";
  196. reg = <0x16011C 0x230>, <0x160368 0x10>;
  197. interrupts = <0 58 0>;
  198. clocks = <&clock 21>;
  199. clock-names = "tmu_apbif";
  200. };
  201. tmuctrl_2: tmuctrl@160120 {
  202. compatible = "samsung,exynos5440-tmu";
  203. reg = <0x160120 0x230>, <0x160368 0x10>;
  204. interrupts = <0 58 0>;
  205. clocks = <&clock 21>;
  206. clock-names = "tmu_apbif";
  207. };
  208. sata@210000 {
  209. compatible = "snps,exynos5440-ahci";
  210. reg = <0x210000 0x10000>;
  211. interrupts = <0 30 0>;
  212. clocks = <&clock 23>;
  213. clock-names = "sata";
  214. };
  215. ohci@220000 {
  216. compatible = "samsung,exynos5440-ohci";
  217. reg = <0x220000 0x1000>;
  218. interrupts = <0 29 0>;
  219. clocks = <&clock 24>;
  220. clock-names = "usbhost";
  221. };
  222. ehci@221000 {
  223. compatible = "samsung,exynos5440-ehci";
  224. reg = <0x221000 0x1000>;
  225. interrupts = <0 29 0>;
  226. clocks = <&clock 24>;
  227. clock-names = "usbhost";
  228. };
  229. pcie@290000 {
  230. compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
  231. reg = <0x290000 0x1000
  232. 0x270000 0x1000
  233. 0x271000 0x40>;
  234. interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
  235. clocks = <&clock 28>, <&clock 27>;
  236. clock-names = "pcie", "pcie_bus";
  237. #address-cells = <3>;
  238. #size-cells = <2>;
  239. device_type = "pci";
  240. ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */
  241. 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
  242. 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
  243. #interrupt-cells = <1>;
  244. interrupt-map-mask = <0 0 0 0>;
  245. interrupt-map = <0x0 0 &gic 53>;
  246. num-lanes = <4>;
  247. };
  248. pcie@2a0000 {
  249. compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
  250. reg = <0x2a0000 0x1000
  251. 0x272000 0x1000
  252. 0x271040 0x40>;
  253. interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
  254. clocks = <&clock 29>, <&clock 27>;
  255. clock-names = "pcie", "pcie_bus";
  256. #address-cells = <3>;
  257. #size-cells = <2>;
  258. device_type = "pci";
  259. ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */
  260. 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
  261. 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
  262. #interrupt-cells = <1>;
  263. interrupt-map-mask = <0 0 0 0>;
  264. interrupt-map = <0x0 0 &gic 56>;
  265. num-lanes = <4>;
  266. };
  267. };