exynos4x12.dtsi 4.6 KB

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  1. /*
  2. * Samsung's Exynos4x12 SoCs device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
  8. * based board files can include this file and provide values for board specfic
  9. * bindings.
  10. *
  11. * Note: This file does not include device nodes for all the controllers in
  12. * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
  13. * nodes can be added to this file.
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include "exynos4.dtsi"
  20. #include "exynos4x12-pinctrl.dtsi"
  21. / {
  22. aliases {
  23. pinctrl0 = &pinctrl_0;
  24. pinctrl1 = &pinctrl_1;
  25. pinctrl2 = &pinctrl_2;
  26. pinctrl3 = &pinctrl_3;
  27. fimc-lite0 = &fimc_lite_0;
  28. fimc-lite1 = &fimc_lite_1;
  29. };
  30. pd_isp: isp-power-domain@10023CA0 {
  31. compatible = "samsung,exynos4210-pd";
  32. reg = <0x10023CA0 0x20>;
  33. };
  34. clock: clock-controller@10030000 {
  35. compatible = "samsung,exynos4412-clock";
  36. reg = <0x10030000 0x20000>;
  37. #clock-cells = <1>;
  38. };
  39. pinctrl_0: pinctrl@11400000 {
  40. compatible = "samsung,exynos4x12-pinctrl";
  41. reg = <0x11400000 0x1000>;
  42. interrupts = <0 47 0>;
  43. };
  44. pinctrl_1: pinctrl@11000000 {
  45. compatible = "samsung,exynos4x12-pinctrl";
  46. reg = <0x11000000 0x1000>;
  47. interrupts = <0 46 0>;
  48. wakup_eint: wakeup-interrupt-controller {
  49. compatible = "samsung,exynos4210-wakeup-eint";
  50. interrupt-parent = <&gic>;
  51. interrupts = <0 32 0>;
  52. };
  53. };
  54. pinctrl_2: pinctrl@03860000 {
  55. compatible = "samsung,exynos4x12-pinctrl";
  56. reg = <0x03860000 0x1000>;
  57. interrupt-parent = <&combiner>;
  58. interrupts = <10 0>;
  59. };
  60. pinctrl_3: pinctrl@106E0000 {
  61. compatible = "samsung,exynos4x12-pinctrl";
  62. reg = <0x106E0000 0x1000>;
  63. interrupts = <0 72 0>;
  64. };
  65. g2d@10800000 {
  66. compatible = "samsung,exynos4212-g2d";
  67. reg = <0x10800000 0x1000>;
  68. interrupts = <0 89 0>;
  69. clocks = <&clock 177>, <&clock 277>;
  70. clock-names = "sclk_fimg2d", "fimg2d";
  71. status = "disabled";
  72. };
  73. camera {
  74. clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
  75. clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
  76. fimc_0: fimc@11800000 {
  77. compatible = "samsung,exynos4212-fimc";
  78. samsung,pix-limits = <4224 8192 1920 4224>;
  79. samsung,mainscaler-ext;
  80. samsung,isp-wb;
  81. samsung,cam-if;
  82. };
  83. fimc_1: fimc@11810000 {
  84. compatible = "samsung,exynos4212-fimc";
  85. samsung,pix-limits = <4224 8192 1920 4224>;
  86. samsung,mainscaler-ext;
  87. samsung,isp-wb;
  88. samsung,cam-if;
  89. };
  90. fimc_2: fimc@11820000 {
  91. compatible = "samsung,exynos4212-fimc";
  92. samsung,pix-limits = <4224 8192 1920 4224>;
  93. samsung,mainscaler-ext;
  94. samsung,isp-wb;
  95. samsung,lcd-wb;
  96. samsung,cam-if;
  97. };
  98. fimc_3: fimc@11830000 {
  99. compatible = "samsung,exynos4212-fimc";
  100. samsung,pix-limits = <1920 8192 1366 1920>;
  101. samsung,rotators = <0>;
  102. samsung,mainscaler-ext;
  103. samsung,isp-wb;
  104. samsung,lcd-wb;
  105. };
  106. fimc_lite_0: fimc-lite@12390000 {
  107. compatible = "samsung,exynos4212-fimc-lite";
  108. reg = <0x12390000 0x1000>;
  109. interrupts = <0 105 0>;
  110. samsung,power-domain = <&pd_isp>;
  111. clocks = <&clock 353>;
  112. clock-names = "flite";
  113. status = "disabled";
  114. };
  115. fimc_lite_1: fimc-lite@123A0000 {
  116. compatible = "samsung,exynos4212-fimc-lite";
  117. reg = <0x123A0000 0x1000>;
  118. interrupts = <0 106 0>;
  119. samsung,power-domain = <&pd_isp>;
  120. clocks = <&clock 354>;
  121. clock-names = "flite";
  122. status = "disabled";
  123. };
  124. fimc_is: fimc-is@12000000 {
  125. compatible = "samsung,exynos4212-fimc-is", "simple-bus";
  126. reg = <0x12000000 0x260000>;
  127. interrupts = <0 90 0>, <0 95 0>;
  128. samsung,power-domain = <&pd_isp>;
  129. clocks = <&clock 353>, <&clock 354>, <&clock 355>,
  130. <&clock 356>, <&clock 17>, <&clock 357>,
  131. <&clock 358>, <&clock 359>, <&clock 360>,
  132. <&clock 450>,<&clock 451>, <&clock 452>,
  133. <&clock 453>, <&clock 176>, <&clock 13>,
  134. <&clock 454>, <&clock 395>, <&clock 455>;
  135. clock-names = "lite0", "lite1", "ppmuispx",
  136. "ppmuispmx", "mpll", "isp",
  137. "drc", "fd", "mcuisp",
  138. "ispdiv0", "ispdiv1", "mcuispdiv0",
  139. "mcuispdiv1", "uart", "aclk200",
  140. "div_aclk200", "aclk400mcuisp",
  141. "div_aclk400mcuisp";
  142. #address-cells = <1>;
  143. #size-cells = <1>;
  144. ranges;
  145. status = "disabled";
  146. pmu {
  147. reg = <0x10020000 0x3000>;
  148. };
  149. i2c1_isp: i2c-isp@12140000 {
  150. compatible = "samsung,exynos4212-i2c-isp";
  151. reg = <0x12140000 0x100>;
  152. clocks = <&clock 370>;
  153. clock-names = "i2c_isp";
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. };
  157. };
  158. };
  159. };