exynos4.dtsi 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509
  1. /*
  2. * Samsung's Exynos4 SoC series common device tree source
  3. *
  4. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2010-2011 Linaro Ltd.
  7. * www.linaro.org
  8. *
  9. * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
  10. * SoCs from Exynos4 series can include this file and provide values for SoCs
  11. * specfic bindings.
  12. *
  13. * Note: This file does not include device nodes for all the controllers in
  14. * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15. * nodes can be added to this file.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License version 2 as
  19. * published by the Free Software Foundation.
  20. */
  21. #include "skeleton.dtsi"
  22. / {
  23. interrupt-parent = <&gic>;
  24. aliases {
  25. spi0 = &spi_0;
  26. spi1 = &spi_1;
  27. spi2 = &spi_2;
  28. i2c0 = &i2c_0;
  29. i2c1 = &i2c_1;
  30. i2c2 = &i2c_2;
  31. i2c3 = &i2c_3;
  32. i2c4 = &i2c_4;
  33. i2c5 = &i2c_5;
  34. i2c6 = &i2c_6;
  35. i2c7 = &i2c_7;
  36. csis0 = &csis_0;
  37. csis1 = &csis_1;
  38. fimc0 = &fimc_0;
  39. fimc1 = &fimc_1;
  40. fimc2 = &fimc_2;
  41. fimc3 = &fimc_3;
  42. };
  43. chipid@10000000 {
  44. compatible = "samsung,exynos4210-chipid";
  45. reg = <0x10000000 0x100>;
  46. };
  47. pd_mfc: mfc-power-domain@10023C40 {
  48. compatible = "samsung,exynos4210-pd";
  49. reg = <0x10023C40 0x20>;
  50. };
  51. pd_g3d: g3d-power-domain@10023C60 {
  52. compatible = "samsung,exynos4210-pd";
  53. reg = <0x10023C60 0x20>;
  54. };
  55. pd_lcd0: lcd0-power-domain@10023C80 {
  56. compatible = "samsung,exynos4210-pd";
  57. reg = <0x10023C80 0x20>;
  58. };
  59. pd_tv: tv-power-domain@10023C20 {
  60. compatible = "samsung,exynos4210-pd";
  61. reg = <0x10023C20 0x20>;
  62. };
  63. pd_cam: cam-power-domain@10023C00 {
  64. compatible = "samsung,exynos4210-pd";
  65. reg = <0x10023C00 0x20>;
  66. };
  67. pd_gps: gps-power-domain@10023CE0 {
  68. compatible = "samsung,exynos4210-pd";
  69. reg = <0x10023CE0 0x20>;
  70. };
  71. gic:interrupt-controller@10490000 {
  72. compatible = "arm,cortex-a9-gic";
  73. #interrupt-cells = <3>;
  74. interrupt-controller;
  75. reg = <0x10490000 0x1000>, <0x10480000 0x100>;
  76. };
  77. combiner:interrupt-controller@10440000 {
  78. compatible = "samsung,exynos4210-combiner";
  79. #interrupt-cells = <2>;
  80. interrupt-controller;
  81. reg = <0x10440000 0x1000>;
  82. };
  83. sys_reg: sysreg {
  84. compatible = "samsung,exynos4-sysreg", "syscon";
  85. reg = <0x10010000 0x400>;
  86. };
  87. camera {
  88. compatible = "samsung,fimc", "simple-bus";
  89. status = "disabled";
  90. #address-cells = <1>;
  91. #size-cells = <1>;
  92. ranges;
  93. clock_cam: clock-controller {
  94. #clock-cells = <1>;
  95. };
  96. fimc_0: fimc@11800000 {
  97. compatible = "samsung,exynos4210-fimc";
  98. reg = <0x11800000 0x1000>;
  99. interrupts = <0 84 0>;
  100. clocks = <&clock 256>, <&clock 128>;
  101. clock-names = "fimc", "sclk_fimc";
  102. samsung,power-domain = <&pd_cam>;
  103. samsung,sysreg = <&sys_reg>;
  104. status = "disabled";
  105. };
  106. fimc_1: fimc@11810000 {
  107. compatible = "samsung,exynos4210-fimc";
  108. reg = <0x11810000 0x1000>;
  109. interrupts = <0 85 0>;
  110. clocks = <&clock 257>, <&clock 129>;
  111. clock-names = "fimc", "sclk_fimc";
  112. samsung,power-domain = <&pd_cam>;
  113. samsung,sysreg = <&sys_reg>;
  114. status = "disabled";
  115. };
  116. fimc_2: fimc@11820000 {
  117. compatible = "samsung,exynos4210-fimc";
  118. reg = <0x11820000 0x1000>;
  119. interrupts = <0 86 0>;
  120. clocks = <&clock 258>, <&clock 130>;
  121. clock-names = "fimc", "sclk_fimc";
  122. samsung,power-domain = <&pd_cam>;
  123. samsung,sysreg = <&sys_reg>;
  124. status = "disabled";
  125. };
  126. fimc_3: fimc@11830000 {
  127. compatible = "samsung,exynos4210-fimc";
  128. reg = <0x11830000 0x1000>;
  129. interrupts = <0 87 0>;
  130. clocks = <&clock 259>, <&clock 131>;
  131. clock-names = "fimc", "sclk_fimc";
  132. samsung,power-domain = <&pd_cam>;
  133. samsung,sysreg = <&sys_reg>;
  134. status = "disabled";
  135. };
  136. csis_0: csis@11880000 {
  137. compatible = "samsung,exynos4210-csis";
  138. reg = <0x11880000 0x4000>;
  139. interrupts = <0 78 0>;
  140. clocks = <&clock 260>, <&clock 134>;
  141. clock-names = "csis", "sclk_csis";
  142. bus-width = <4>;
  143. samsung,power-domain = <&pd_cam>;
  144. status = "disabled";
  145. #address-cells = <1>;
  146. #size-cells = <0>;
  147. };
  148. csis_1: csis@11890000 {
  149. compatible = "samsung,exynos4210-csis";
  150. reg = <0x11890000 0x4000>;
  151. interrupts = <0 80 0>;
  152. clocks = <&clock 261>, <&clock 135>;
  153. clock-names = "csis", "sclk_csis";
  154. bus-width = <2>;
  155. samsung,power-domain = <&pd_cam>;
  156. status = "disabled";
  157. #address-cells = <1>;
  158. #size-cells = <0>;
  159. };
  160. };
  161. watchdog@10060000 {
  162. compatible = "samsung,s3c2410-wdt";
  163. reg = <0x10060000 0x100>;
  164. interrupts = <0 43 0>;
  165. clocks = <&clock 345>;
  166. clock-names = "watchdog";
  167. status = "disabled";
  168. };
  169. rtc@10070000 {
  170. compatible = "samsung,s3c6410-rtc";
  171. reg = <0x10070000 0x100>;
  172. interrupts = <0 44 0>, <0 45 0>;
  173. clocks = <&clock 346>;
  174. clock-names = "rtc";
  175. status = "disabled";
  176. };
  177. keypad@100A0000 {
  178. compatible = "samsung,s5pv210-keypad";
  179. reg = <0x100A0000 0x100>;
  180. interrupts = <0 109 0>;
  181. clocks = <&clock 347>;
  182. clock-names = "keypad";
  183. status = "disabled";
  184. };
  185. sdhci@12510000 {
  186. compatible = "samsung,exynos4210-sdhci";
  187. reg = <0x12510000 0x100>;
  188. interrupts = <0 73 0>;
  189. clocks = <&clock 297>, <&clock 145>;
  190. clock-names = "hsmmc", "mmc_busclk.2";
  191. status = "disabled";
  192. };
  193. sdhci@12520000 {
  194. compatible = "samsung,exynos4210-sdhci";
  195. reg = <0x12520000 0x100>;
  196. interrupts = <0 74 0>;
  197. clocks = <&clock 298>, <&clock 146>;
  198. clock-names = "hsmmc", "mmc_busclk.2";
  199. status = "disabled";
  200. };
  201. sdhci@12530000 {
  202. compatible = "samsung,exynos4210-sdhci";
  203. reg = <0x12530000 0x100>;
  204. interrupts = <0 75 0>;
  205. clocks = <&clock 299>, <&clock 147>;
  206. clock-names = "hsmmc", "mmc_busclk.2";
  207. status = "disabled";
  208. };
  209. sdhci@12540000 {
  210. compatible = "samsung,exynos4210-sdhci";
  211. reg = <0x12540000 0x100>;
  212. interrupts = <0 76 0>;
  213. clocks = <&clock 300>, <&clock 148>;
  214. clock-names = "hsmmc", "mmc_busclk.2";
  215. status = "disabled";
  216. };
  217. ehci@12580000 {
  218. compatible = "samsung,exynos4210-ehci";
  219. reg = <0x12580000 0x100>;
  220. interrupts = <0 70 0>;
  221. clocks = <&clock 304>;
  222. clock-names = "usbhost";
  223. status = "disabled";
  224. };
  225. ohci@12590000 {
  226. compatible = "samsung,exynos4210-ohci";
  227. reg = <0x12590000 0x100>;
  228. interrupts = <0 70 0>;
  229. clocks = <&clock 304>;
  230. clock-names = "usbhost";
  231. status = "disabled";
  232. };
  233. mfc: codec@13400000 {
  234. compatible = "samsung,mfc-v5";
  235. reg = <0x13400000 0x10000>;
  236. interrupts = <0 94 0>;
  237. samsung,power-domain = <&pd_mfc>;
  238. clocks = <&clock 273>;
  239. clock-names = "mfc";
  240. status = "disabled";
  241. };
  242. serial@13800000 {
  243. compatible = "samsung,exynos4210-uart";
  244. reg = <0x13800000 0x100>;
  245. interrupts = <0 52 0>;
  246. clocks = <&clock 312>, <&clock 151>;
  247. clock-names = "uart", "clk_uart_baud0";
  248. status = "disabled";
  249. };
  250. serial@13810000 {
  251. compatible = "samsung,exynos4210-uart";
  252. reg = <0x13810000 0x100>;
  253. interrupts = <0 53 0>;
  254. clocks = <&clock 313>, <&clock 152>;
  255. clock-names = "uart", "clk_uart_baud0";
  256. status = "disabled";
  257. };
  258. serial@13820000 {
  259. compatible = "samsung,exynos4210-uart";
  260. reg = <0x13820000 0x100>;
  261. interrupts = <0 54 0>;
  262. clocks = <&clock 314>, <&clock 153>;
  263. clock-names = "uart", "clk_uart_baud0";
  264. status = "disabled";
  265. };
  266. serial@13830000 {
  267. compatible = "samsung,exynos4210-uart";
  268. reg = <0x13830000 0x100>;
  269. interrupts = <0 55 0>;
  270. clocks = <&clock 315>, <&clock 154>;
  271. clock-names = "uart", "clk_uart_baud0";
  272. status = "disabled";
  273. };
  274. i2c_0: i2c@13860000 {
  275. #address-cells = <1>;
  276. #size-cells = <0>;
  277. compatible = "samsung,s3c2440-i2c";
  278. reg = <0x13860000 0x100>;
  279. interrupts = <0 58 0>;
  280. clocks = <&clock 317>;
  281. clock-names = "i2c";
  282. pinctrl-names = "default";
  283. pinctrl-0 = <&i2c0_bus>;
  284. status = "disabled";
  285. };
  286. i2c_1: i2c@13870000 {
  287. #address-cells = <1>;
  288. #size-cells = <0>;
  289. compatible = "samsung,s3c2440-i2c";
  290. reg = <0x13870000 0x100>;
  291. interrupts = <0 59 0>;
  292. clocks = <&clock 318>;
  293. clock-names = "i2c";
  294. pinctrl-names = "default";
  295. pinctrl-0 = <&i2c1_bus>;
  296. status = "disabled";
  297. };
  298. i2c_2: i2c@13880000 {
  299. #address-cells = <1>;
  300. #size-cells = <0>;
  301. compatible = "samsung,s3c2440-i2c";
  302. reg = <0x13880000 0x100>;
  303. interrupts = <0 60 0>;
  304. clocks = <&clock 319>;
  305. clock-names = "i2c";
  306. status = "disabled";
  307. };
  308. i2c_3: i2c@13890000 {
  309. #address-cells = <1>;
  310. #size-cells = <0>;
  311. compatible = "samsung,s3c2440-i2c";
  312. reg = <0x13890000 0x100>;
  313. interrupts = <0 61 0>;
  314. clocks = <&clock 320>;
  315. clock-names = "i2c";
  316. status = "disabled";
  317. };
  318. i2c_4: i2c@138A0000 {
  319. #address-cells = <1>;
  320. #size-cells = <0>;
  321. compatible = "samsung,s3c2440-i2c";
  322. reg = <0x138A0000 0x100>;
  323. interrupts = <0 62 0>;
  324. clocks = <&clock 321>;
  325. clock-names = "i2c";
  326. status = "disabled";
  327. };
  328. i2c_5: i2c@138B0000 {
  329. #address-cells = <1>;
  330. #size-cells = <0>;
  331. compatible = "samsung,s3c2440-i2c";
  332. reg = <0x138B0000 0x100>;
  333. interrupts = <0 63 0>;
  334. clocks = <&clock 322>;
  335. clock-names = "i2c";
  336. status = "disabled";
  337. };
  338. i2c_6: i2c@138C0000 {
  339. #address-cells = <1>;
  340. #size-cells = <0>;
  341. compatible = "samsung,s3c2440-i2c";
  342. reg = <0x138C0000 0x100>;
  343. interrupts = <0 64 0>;
  344. clocks = <&clock 323>;
  345. clock-names = "i2c";
  346. status = "disabled";
  347. };
  348. i2c_7: i2c@138D0000 {
  349. #address-cells = <1>;
  350. #size-cells = <0>;
  351. compatible = "samsung,s3c2440-i2c";
  352. reg = <0x138D0000 0x100>;
  353. interrupts = <0 65 0>;
  354. clocks = <&clock 324>;
  355. clock-names = "i2c";
  356. status = "disabled";
  357. };
  358. spi_0: spi@13920000 {
  359. compatible = "samsung,exynos4210-spi";
  360. reg = <0x13920000 0x100>;
  361. interrupts = <0 66 0>;
  362. dmas = <&pdma0 7>, <&pdma0 6>;
  363. dma-names = "tx", "rx";
  364. #address-cells = <1>;
  365. #size-cells = <0>;
  366. clocks = <&clock 327>, <&clock 159>;
  367. clock-names = "spi", "spi_busclk0";
  368. pinctrl-names = "default";
  369. pinctrl-0 = <&spi0_bus>;
  370. status = "disabled";
  371. };
  372. spi_1: spi@13930000 {
  373. compatible = "samsung,exynos4210-spi";
  374. reg = <0x13930000 0x100>;
  375. interrupts = <0 67 0>;
  376. dmas = <&pdma1 7>, <&pdma1 6>;
  377. dma-names = "tx", "rx";
  378. #address-cells = <1>;
  379. #size-cells = <0>;
  380. clocks = <&clock 328>, <&clock 160>;
  381. clock-names = "spi", "spi_busclk0";
  382. pinctrl-names = "default";
  383. pinctrl-0 = <&spi1_bus>;
  384. status = "disabled";
  385. };
  386. spi_2: spi@13940000 {
  387. compatible = "samsung,exynos4210-spi";
  388. reg = <0x13940000 0x100>;
  389. interrupts = <0 68 0>;
  390. dmas = <&pdma0 9>, <&pdma0 8>;
  391. dma-names = "tx", "rx";
  392. #address-cells = <1>;
  393. #size-cells = <0>;
  394. clocks = <&clock 329>, <&clock 161>;
  395. clock-names = "spi", "spi_busclk0";
  396. pinctrl-names = "default";
  397. pinctrl-0 = <&spi2_bus>;
  398. status = "disabled";
  399. };
  400. pwm@139D0000 {
  401. compatible = "samsung,exynos4210-pwm";
  402. reg = <0x139D0000 0x1000>;
  403. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
  404. clocks = <&clock 336>;
  405. clock-names = "timers";
  406. #pwm-cells = <2>;
  407. status = "disabled";
  408. };
  409. amba {
  410. #address-cells = <1>;
  411. #size-cells = <1>;
  412. compatible = "arm,amba-bus";
  413. interrupt-parent = <&gic>;
  414. ranges;
  415. pdma0: pdma@12680000 {
  416. compatible = "arm,pl330", "arm,primecell";
  417. reg = <0x12680000 0x1000>;
  418. interrupts = <0 35 0>;
  419. clocks = <&clock 292>;
  420. clock-names = "apb_pclk";
  421. #dma-cells = <1>;
  422. #dma-channels = <8>;
  423. #dma-requests = <32>;
  424. };
  425. pdma1: pdma@12690000 {
  426. compatible = "arm,pl330", "arm,primecell";
  427. reg = <0x12690000 0x1000>;
  428. interrupts = <0 36 0>;
  429. clocks = <&clock 293>;
  430. clock-names = "apb_pclk";
  431. #dma-cells = <1>;
  432. #dma-channels = <8>;
  433. #dma-requests = <32>;
  434. };
  435. mdma1: mdma@12850000 {
  436. compatible = "arm,pl330", "arm,primecell";
  437. reg = <0x12850000 0x1000>;
  438. interrupts = <0 34 0>;
  439. clocks = <&clock 279>;
  440. clock-names = "apb_pclk";
  441. #dma-cells = <1>;
  442. #dma-channels = <8>;
  443. #dma-requests = <1>;
  444. };
  445. };
  446. fimd: fimd@11c00000 {
  447. compatible = "samsung,exynos4210-fimd";
  448. interrupt-parent = <&combiner>;
  449. reg = <0x11c00000 0x20000>;
  450. interrupt-names = "fifo", "vsync", "lcd_sys";
  451. interrupts = <11 0>, <11 1>, <11 2>;
  452. clocks = <&clock 140>, <&clock 283>;
  453. clock-names = "sclk_fimd", "fimd";
  454. samsung,power-domain = <&pd_lcd0>;
  455. status = "disabled";
  456. };
  457. };