bcm2835.dtsi 2.8 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "brcm,bcm2835";
  4. model = "BCM2835";
  5. interrupt-parent = <&intc>;
  6. chosen {
  7. bootargs = "earlyprintk console=ttyAMA0";
  8. };
  9. soc {
  10. compatible = "simple-bus";
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. ranges = <0x7e000000 0x20000000 0x02000000>;
  14. timer {
  15. compatible = "brcm,bcm2835-system-timer";
  16. reg = <0x7e003000 0x1000>;
  17. interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  18. clock-frequency = <1000000>;
  19. };
  20. intc: interrupt-controller {
  21. compatible = "brcm,bcm2835-armctrl-ic";
  22. reg = <0x7e00b200 0x200>;
  23. interrupt-controller;
  24. #interrupt-cells = <2>;
  25. };
  26. watchdog {
  27. compatible = "brcm,bcm2835-pm-wdt";
  28. reg = <0x7e100000 0x28>;
  29. };
  30. rng {
  31. compatible = "brcm,bcm2835-rng";
  32. reg = <0x7e104000 0x10>;
  33. };
  34. uart@20201000 {
  35. compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
  36. reg = <0x7e201000 0x1000>;
  37. interrupts = <2 25>;
  38. clock-frequency = <3000000>;
  39. arm,primecell-periphid = <0x00241011>;
  40. };
  41. gpio: gpio {
  42. compatible = "brcm,bcm2835-gpio";
  43. reg = <0x7e200000 0xb4>;
  44. /*
  45. * The GPIO IP block is designed for 3 banks of GPIOs.
  46. * Each bank has a GPIO interrupt for itself.
  47. * There is an overall "any bank" interrupt.
  48. * In order, these are GIC interrupts 17, 18, 19, 20.
  49. * Since the BCM2835 only has 2 banks, the 2nd bank
  50. * interrupt output appears to be mirrored onto the
  51. * 3rd bank's interrupt signal.
  52. * So, a bank0 interrupt shows up on 17, 20, and
  53. * a bank1 interrupt shows up on 18, 19, 20!
  54. */
  55. interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
  56. gpio-controller;
  57. #gpio-cells = <2>;
  58. interrupt-controller;
  59. #interrupt-cells = <2>;
  60. };
  61. spi: spi@20204000 {
  62. compatible = "brcm,bcm2835-spi";
  63. reg = <0x7e204000 0x1000>;
  64. interrupts = <2 22>;
  65. clocks = <&clk_spi>;
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. status = "disabled";
  69. };
  70. i2c0: i2c@20205000 {
  71. compatible = "brcm,bcm2835-i2c";
  72. reg = <0x7e205000 0x1000>;
  73. interrupts = <2 21>;
  74. clocks = <&clk_i2c>;
  75. status = "disabled";
  76. };
  77. i2c1: i2c@20804000 {
  78. compatible = "brcm,bcm2835-i2c";
  79. reg = <0x7e804000 0x1000>;
  80. interrupts = <2 21>;
  81. clocks = <&clk_i2c>;
  82. status = "disabled";
  83. };
  84. sdhci: sdhci {
  85. compatible = "brcm,bcm2835-sdhci";
  86. reg = <0x7e300000 0x100>;
  87. interrupts = <2 30>;
  88. clocks = <&clk_mmc>;
  89. status = "disabled";
  90. };
  91. };
  92. clocks {
  93. compatible = "simple-bus";
  94. #address-cells = <1>;
  95. #size-cells = <0>;
  96. clk_mmc: mmc {
  97. compatible = "fixed-clock";
  98. reg = <0>;
  99. #clock-cells = <0>;
  100. clock-frequency = <100000000>;
  101. };
  102. clk_i2c: i2c {
  103. compatible = "fixed-clock";
  104. reg = <1>;
  105. #clock-cells = <0>;
  106. clock-frequency = <250000000>;
  107. };
  108. clk_spi: spi {
  109. compatible = "fixed-clock";
  110. reg = <2>;
  111. #clock-cells = <0>;
  112. clock-frequency = <250000000>;
  113. };
  114. };
  115. };