mmu_context.h 4.7 KB

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  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * vineetg: May 2011
  9. * -Refactored get_new_mmu_context( ) to only handle live-mm.
  10. * retiring-mm handled in other hooks
  11. *
  12. * Vineetg: March 25th, 2008: Bug #92690
  13. * -Major rewrite of Core ASID allocation routine get_new_mmu_context
  14. *
  15. * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
  16. */
  17. #ifndef _ASM_ARC_MMU_CONTEXT_H
  18. #define _ASM_ARC_MMU_CONTEXT_H
  19. #include <asm/arcregs.h>
  20. #include <asm/tlb.h>
  21. #include <asm-generic/mm_hooks.h>
  22. /* ARC700 ASID Management
  23. *
  24. * ARC MMU provides 8-bit ASID (0..255) to TAG TLB entries, allowing entries
  25. * with same vaddr (different tasks) to co-exit. This provides for
  26. * "Fast Context Switch" i.e. no TLB flush on ctxt-switch
  27. *
  28. * Linux assigns each task a unique ASID. A simple round-robin allocation
  29. * of H/w ASID is done using software tracker @asid_cache.
  30. * When it reaches max 255, the allocation cycle starts afresh by flushing
  31. * the entire TLB and wrapping ASID back to zero.
  32. *
  33. * A new allocation cycle, post rollover, could potentially reassign an ASID
  34. * to a different task. Thus the rule is to refresh the ASID in a new cycle.
  35. * The 32 bit @asid_cache (and mm->asid) have 8 bits MMU PID and rest 24 bits
  36. * serve as cycle/generation indicator and natural 32 bit unsigned math
  37. * automagically increments the generation when lower 8 bits rollover.
  38. */
  39. #define MM_CTXT_ASID_MASK 0x000000ff /* MMU PID reg :8 bit PID */
  40. #define MM_CTXT_CYCLE_MASK (~MM_CTXT_ASID_MASK)
  41. #define MM_CTXT_FIRST_CYCLE (MM_CTXT_ASID_MASK + 1)
  42. #define MM_CTXT_NO_ASID 0UL
  43. #define hw_pid(mm) (mm->context.asid & MM_CTXT_ASID_MASK)
  44. extern unsigned int asid_cache;
  45. /*
  46. * Get a new ASID if task doesn't have a valid one (unalloc or from prev cycle)
  47. * Also set the MMU PID register to existing/updated ASID
  48. */
  49. static inline void get_new_mmu_context(struct mm_struct *mm)
  50. {
  51. unsigned long flags;
  52. local_irq_save(flags);
  53. /*
  54. * Move to new ASID if it was not from current alloc-cycle/generation.
  55. * This is done by ensuring that the generation bits in both mm->ASID
  56. * and cpu's ASID counter are exactly same.
  57. *
  58. * Note: Callers needing new ASID unconditionally, independent of
  59. * generation, e.g. local_flush_tlb_mm() for forking parent,
  60. * first need to destroy the context, setting it to invalid
  61. * value.
  62. */
  63. if (!((mm->context.asid ^ asid_cache) & MM_CTXT_CYCLE_MASK))
  64. goto set_hw;
  65. /* move to new ASID and handle rollover */
  66. if (unlikely(!(++asid_cache & MM_CTXT_ASID_MASK))) {
  67. flush_tlb_all();
  68. /*
  69. * Above checke for rollover of 8 bit ASID in 32 bit container.
  70. * If the container itself wrapped around, set it to a non zero
  71. * "generation" to distinguish from no context
  72. */
  73. if (!asid_cache)
  74. asid_cache = MM_CTXT_FIRST_CYCLE;
  75. }
  76. /* Assign new ASID to tsk */
  77. mm->context.asid = asid_cache;
  78. set_hw:
  79. write_aux_reg(ARC_REG_PID, hw_pid(mm) | MMU_ENABLE);
  80. local_irq_restore(flags);
  81. }
  82. /*
  83. * Initialize the context related info for a new mm_struct
  84. * instance.
  85. */
  86. static inline int
  87. init_new_context(struct task_struct *tsk, struct mm_struct *mm)
  88. {
  89. mm->context.asid = MM_CTXT_NO_ASID;
  90. return 0;
  91. }
  92. /* Prepare the MMU for task: setup PID reg with allocated ASID
  93. If task doesn't have an ASID (never alloc or stolen, get a new ASID)
  94. */
  95. static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  96. struct task_struct *tsk)
  97. {
  98. #ifndef CONFIG_SMP
  99. /* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */
  100. write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd);
  101. #endif
  102. get_new_mmu_context(next);
  103. }
  104. /*
  105. * Called at the time of execve() to get a new ASID
  106. * Note the subtlety here: get_new_mmu_context() behaves differently here
  107. * vs. in switch_mm(). Here it always returns a new ASID, because mm has
  108. * an unallocated "initial" value, while in latter, it moves to a new ASID,
  109. * only if it was unallocated
  110. */
  111. #define activate_mm(prev, next) switch_mm(prev, next, NULL)
  112. static inline void destroy_context(struct mm_struct *mm)
  113. {
  114. mm->context.asid = MM_CTXT_NO_ASID;
  115. }
  116. /* it seemed that deactivate_mm( ) is a reasonable place to do book-keeping
  117. * for retiring-mm. However destroy_context( ) still needs to do that because
  118. * between mm_release( ) = >deactive_mm( ) and
  119. * mmput => .. => __mmdrop( ) => destroy_context( )
  120. * there is a good chance that task gets sched-out/in, making it's ASID valid
  121. * again (this teased me for a whole day).
  122. */
  123. #define deactivate_mm(tsk, mm) do { } while (0)
  124. #define enter_lazy_tlb(mm, tsk)
  125. #endif /* __ASM_ARC_MMU_CONTEXT_H */