abilis_tb101.dtsi 8.6 KB

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  1. /*
  2. * Abilis Systems TB101 SOC device tree
  3. *
  4. * Copyright (C) Abilis Systems 2013
  5. *
  6. * Author: Christian Ruppert <christian.ruppert@abilis.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. /include/ "abilis_tb10x.dtsi"
  22. / {
  23. clock-frequency = <500000000>; /* 500 MHZ */
  24. soc100 {
  25. bus-frequency = <166666666>;
  26. pll0: oscillator {
  27. clock-frequency = <1000000000>;
  28. };
  29. cpu_clk: clkdiv_cpu {
  30. clock-mult = <1>;
  31. clock-div = <2>;
  32. };
  33. ahb_clk: clkdiv_ahb {
  34. clock-mult = <1>;
  35. clock-div = <6>;
  36. };
  37. iomux: iomux@FF10601c {
  38. /* Port 1 */
  39. pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
  40. pingrp = "mis0_pins";
  41. };
  42. pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
  43. pingrp = "mis1_pins";
  44. };
  45. pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
  46. pingrp = "gpioa_pins";
  47. };
  48. pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */
  49. pingrp = "mip1_pins";
  50. };
  51. /* Port 2 */
  52. pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */
  53. pingrp = "mis2_pins";
  54. };
  55. pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */
  56. pingrp = "mis3_pins";
  57. };
  58. pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
  59. pingrp = "gpioc_pins";
  60. };
  61. pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */
  62. pingrp = "mip3_pins";
  63. };
  64. /* Port 3 */
  65. pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */
  66. pingrp = "mis4_pins";
  67. };
  68. pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */
  69. pingrp = "mis5_pins";
  70. };
  71. pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
  72. pingrp = "gpioe_pins";
  73. };
  74. pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */
  75. pingrp = "mip5_pins";
  76. };
  77. /* Port 4 */
  78. pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */
  79. pingrp = "mis6_pins";
  80. };
  81. pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */
  82. pingrp = "mis7_pins";
  83. };
  84. pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
  85. pingrp = "gpiog_pins";
  86. };
  87. pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */
  88. pingrp = "mip7_pins";
  89. };
  90. /* Port 5 */
  91. pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
  92. pingrp = "gpioj_pins";
  93. };
  94. pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
  95. pingrp = "gpiok_pins";
  96. };
  97. pctl_ciplus: pctl-ciplus { /* CI+ interface */
  98. pingrp = "ciplus_pins";
  99. };
  100. pctl_mcard: pctl-mcard { /* M-Card interface */
  101. pingrp = "mcard_pins";
  102. };
  103. pctl_stc0: pctl-stc0 { /* Smart card I/F 0 */
  104. pingrp = "stc0_pins";
  105. };
  106. pctl_stc1: pctl-stc1 { /* Smart card I/F 1 */
  107. pingrp = "stc1_pins";
  108. };
  109. /* Port 6 */
  110. pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */
  111. pingrp = "mop_pins";
  112. };
  113. pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
  114. pingrp = "mos0_pins";
  115. };
  116. pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
  117. pingrp = "mos1_pins";
  118. };
  119. pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
  120. pingrp = "mos2_pins";
  121. };
  122. pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
  123. pingrp = "mos3_pins";
  124. };
  125. /* Port 7 */
  126. pctl_uart0: pctl-uart0 { /* UART 0 */
  127. pingrp = "uart0_pins";
  128. };
  129. pctl_uart1: pctl-uart1 { /* UART 1 */
  130. pingrp = "uart1_pins";
  131. };
  132. pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
  133. pingrp = "gpiol_pins";
  134. };
  135. pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
  136. pingrp = "gpiom_pins";
  137. };
  138. /* Port 8 */
  139. pctl_spi3: pctl-spi3 {
  140. pingrp = "spi3_pins";
  141. };
  142. pctl_jtag: pctl-jtag {
  143. pingrp = "jtag_pins";
  144. };
  145. /* Port 9 */
  146. pctl_spi1: pctl-spi1 {
  147. pingrp = "spi1_pins";
  148. };
  149. pctl_gpio_n: pctl-gpio-n {
  150. pingrp = "gpion_pins";
  151. };
  152. /* Unmuxed GPIOs */
  153. pctl_gpio_b: pctl-gpio-b {
  154. pingrp = "gpiob_pins";
  155. };
  156. pctl_gpio_d: pctl-gpio-d {
  157. pingrp = "gpiod_pins";
  158. };
  159. pctl_gpio_f: pctl-gpio-f {
  160. pingrp = "gpiof_pins";
  161. };
  162. pctl_gpio_h: pctl-gpio-h {
  163. pingrp = "gpioh_pins";
  164. };
  165. pctl_gpio_i: pctl-gpio-i {
  166. pingrp = "gpioi_pins";
  167. };
  168. };
  169. gpioa: gpio@FF140000 {
  170. compatible = "abilis,tb10x-gpio";
  171. interrupt-controller;
  172. #interrupt-cells = <1>;
  173. interrupt-parent = <&tb10x_ictl>;
  174. interrupts = <27 2>;
  175. reg = <0xFF140000 0x1000>;
  176. gpio-controller;
  177. #gpio-cells = <1>;
  178. gpio-base = <0>;
  179. gpio-pins = <&pctl_gpio_a>;
  180. };
  181. gpiob: gpio@FF141000 {
  182. compatible = "abilis,tb10x-gpio";
  183. interrupt-controller;
  184. #interrupt-cells = <1>;
  185. interrupt-parent = <&tb10x_ictl>;
  186. interrupts = <27 2>;
  187. reg = <0xFF141000 0x1000>;
  188. gpio-controller;
  189. #gpio-cells = <1>;
  190. gpio-base = <3>;
  191. gpio-pins = <&pctl_gpio_b>;
  192. };
  193. gpioc: gpio@FF142000 {
  194. compatible = "abilis,tb10x-gpio";
  195. interrupt-controller;
  196. #interrupt-cells = <1>;
  197. interrupt-parent = <&tb10x_ictl>;
  198. interrupts = <27 2>;
  199. reg = <0xFF142000 0x1000>;
  200. gpio-controller;
  201. #gpio-cells = <1>;
  202. gpio-base = <5>;
  203. gpio-pins = <&pctl_gpio_c>;
  204. };
  205. gpiod: gpio@FF143000 {
  206. compatible = "abilis,tb10x-gpio";
  207. interrupt-controller;
  208. #interrupt-cells = <1>;
  209. interrupt-parent = <&tb10x_ictl>;
  210. interrupts = <27 2>;
  211. reg = <0xFF143000 0x1000>;
  212. gpio-controller;
  213. #gpio-cells = <1>;
  214. gpio-base = <8>;
  215. gpio-pins = <&pctl_gpio_d>;
  216. };
  217. gpioe: gpio@FF144000 {
  218. compatible = "abilis,tb10x-gpio";
  219. interrupt-controller;
  220. #interrupt-cells = <1>;
  221. interrupt-parent = <&tb10x_ictl>;
  222. interrupts = <27 2>;
  223. reg = <0xFF144000 0x1000>;
  224. gpio-controller;
  225. #gpio-cells = <1>;
  226. gpio-base = <10>;
  227. gpio-pins = <&pctl_gpio_e>;
  228. };
  229. gpiof: gpio@FF145000 {
  230. compatible = "abilis,tb10x-gpio";
  231. interrupt-controller;
  232. #interrupt-cells = <1>;
  233. interrupt-parent = <&tb10x_ictl>;
  234. interrupts = <27 2>;
  235. reg = <0xFF145000 0x1000>;
  236. gpio-controller;
  237. #gpio-cells = <1>;
  238. gpio-base = <13>;
  239. gpio-pins = <&pctl_gpio_f>;
  240. };
  241. gpiog: gpio@FF146000 {
  242. compatible = "abilis,tb10x-gpio";
  243. interrupt-controller;
  244. #interrupt-cells = <1>;
  245. interrupt-parent = <&tb10x_ictl>;
  246. interrupts = <27 2>;
  247. reg = <0xFF146000 0x1000>;
  248. gpio-controller;
  249. #gpio-cells = <1>;
  250. gpio-base = <15>;
  251. gpio-pins = <&pctl_gpio_g>;
  252. };
  253. gpioh: gpio@FF147000 {
  254. compatible = "abilis,tb10x-gpio";
  255. interrupt-controller;
  256. #interrupt-cells = <1>;
  257. interrupt-parent = <&tb10x_ictl>;
  258. interrupts = <27 2>;
  259. reg = <0xFF147000 0x1000>;
  260. gpio-controller;
  261. #gpio-cells = <1>;
  262. gpio-base = <18>;
  263. gpio-pins = <&pctl_gpio_h>;
  264. };
  265. gpioi: gpio@FF148000 {
  266. compatible = "abilis,tb10x-gpio";
  267. interrupt-controller;
  268. #interrupt-cells = <1>;
  269. interrupt-parent = <&tb10x_ictl>;
  270. interrupts = <27 2>;
  271. reg = <0xFF148000 0x1000>;
  272. gpio-controller;
  273. #gpio-cells = <1>;
  274. gpio-base = <20>;
  275. gpio-pins = <&pctl_gpio_i>;
  276. };
  277. gpioj: gpio@FF149000 {
  278. compatible = "abilis,tb10x-gpio";
  279. interrupt-controller;
  280. #interrupt-cells = <1>;
  281. interrupt-parent = <&tb10x_ictl>;
  282. interrupts = <27 2>;
  283. reg = <0xFF149000 0x1000>;
  284. gpio-controller;
  285. #gpio-cells = <1>;
  286. gpio-base = <32>;
  287. gpio-pins = <&pctl_gpio_j>;
  288. };
  289. gpiok: gpio@FF14a000 {
  290. compatible = "abilis,tb10x-gpio";
  291. interrupt-controller;
  292. #interrupt-cells = <1>;
  293. interrupt-parent = <&tb10x_ictl>;
  294. interrupts = <27 2>;
  295. reg = <0xFF14A000 0x1000>;
  296. gpio-controller;
  297. #gpio-cells = <1>;
  298. gpio-base = <64>;
  299. gpio-pins = <&pctl_gpio_k>;
  300. };
  301. gpiol: gpio@FF14b000 {
  302. compatible = "abilis,tb10x-gpio";
  303. interrupt-controller;
  304. #interrupt-cells = <1>;
  305. interrupt-parent = <&tb10x_ictl>;
  306. interrupts = <27 2>;
  307. reg = <0xFF14B000 0x1000>;
  308. gpio-controller;
  309. #gpio-cells = <1>;
  310. gpio-base = <86>;
  311. gpio-pins = <&pctl_gpio_l>;
  312. };
  313. gpiom: gpio@FF14c000 {
  314. compatible = "abilis,tb10x-gpio";
  315. interrupt-controller;
  316. #interrupt-cells = <1>;
  317. interrupt-parent = <&tb10x_ictl>;
  318. interrupts = <27 2>;
  319. reg = <0xFF14C000 0x1000>;
  320. gpio-controller;
  321. #gpio-cells = <1>;
  322. gpio-base = <90>;
  323. gpio-pins = <&pctl_gpio_m>;
  324. };
  325. gpion: gpio@FF14d000 {
  326. compatible = "abilis,tb10x-gpio";
  327. interrupt-controller;
  328. #interrupt-cells = <1>;
  329. interrupt-parent = <&tb10x_ictl>;
  330. interrupts = <27 2>;
  331. reg = <0xFF14D000 0x1000>;
  332. gpio-controller;
  333. #gpio-cells = <1>;
  334. gpio-base = <94>;
  335. gpio-pins = <&pctl_gpio_n>;
  336. };
  337. };
  338. };