spi-davinci.txt 1.4 KB

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  1. Davinci SPI controller device bindings
  2. Required properties:
  3. - #address-cells: number of cells required to define a chip select
  4. address on the SPI bus. Should be set to 1.
  5. - #size-cells: should be zero.
  6. - compatible:
  7. - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
  8. - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
  9. - reg: Offset and length of SPI controller register space
  10. - num-cs: Number of chip selects
  11. - ti,davinci-spi-intr-line: interrupt line used to connect the SPI
  12. IP to the interrupt controller within the SoC. Possible values
  13. are 0 and 1. Manual says one of the two possible interrupt
  14. lines can be tied to the interrupt controller. Set this
  15. based on a specifc SoC configuration.
  16. - interrupts: interrupt number mapped to CPU.
  17. - clocks: spi clk phandle
  18. Example of a NOR flash slave device (n25q032) connected to DaVinci
  19. SPI controller device over the SPI bus.
  20. spi0:spi@20BF0000 {
  21. #address-cells = <1>;
  22. #size-cells = <0>;
  23. compatible = "ti,dm6446-spi";
  24. reg = <0x20BF0000 0x1000>;
  25. num-cs = <4>;
  26. ti,davinci-spi-intr-line = <0>;
  27. interrupts = <338>;
  28. clocks = <&clkspi>;
  29. flash: n25q032@0 {
  30. #address-cells = <1>;
  31. #size-cells = <1>;
  32. compatible = "st,m25p32";
  33. spi-max-frequency = <25000000>;
  34. reg = <0>;
  35. partition@0 {
  36. label = "u-boot-spl";
  37. reg = <0x0 0x80000>;
  38. read-only;
  39. };
  40. partition@1 {
  41. label = "test";
  42. reg = <0x80000 0x380000>;
  43. };
  44. };
  45. };