atmel,at91-pinctrl.txt 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142
  1. * Atmel AT91 Pinmux Controller
  2. The AT91 Pinmux Controller, enables the IC
  3. to share one PAD to several functional blocks. The sharing is done by
  4. multiplexing the PAD input/output signals. For each PAD there are up to
  5. 8 muxing options (called periph modes). Since different modules require
  6. different PAD settings (like pull up, keeper, etc) the contoller controls
  7. also the PAD settings parameters.
  8. Please refer to pinctrl-bindings.txt in this directory for details of the
  9. common pinctrl bindings used by client devices, including the meaning of the
  10. phrase "pin configuration node".
  11. Atmel AT91 pin configuration node is a node of a group of pins which can be
  12. used for a specific device or function. This node represents both mux and config
  13. of the pins in that group. The 'pins' selects the function mode(also named pin
  14. mode) this pin can work on and the 'config' configures various pad settings
  15. such as pull-up, multi drive, etc.
  16. Required properties for iomux controller:
  17. - compatible: "atmel,at91rm9200-pinctrl"
  18. - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
  19. configured in this periph mode. All the periph and bank need to be describe.
  20. How to create such array:
  21. Each column will represent the possible peripheral of the pinctrl
  22. Each line will represent a pio bank
  23. Take an example on the 9260
  24. Peripheral: 2 ( A and B)
  25. Bank: 3 (A, B and C)
  26. =>
  27. /* A B */
  28. 0xffffffff 0xffc00c3b /* pioA */
  29. 0xffffffff 0x7fff3ccf /* pioB */
  30. 0xffffffff 0x007fffff /* pioC */
  31. For each peripheral/bank we will descibe in a u32 if a pin can be
  32. configured in it by putting 1 to the pin bit (1 << pin)
  33. Let's take the pioA on peripheral B
  34. From the datasheet Table 10-2.
  35. Peripheral B
  36. PA0 MCDB0
  37. PA1 MCCDB
  38. PA2
  39. PA3 MCDB3
  40. PA4 MCDB2
  41. PA5 MCDB1
  42. PA6
  43. PA7
  44. PA8
  45. PA9
  46. PA10 ETX2
  47. PA11 ETX3
  48. PA12
  49. PA13
  50. PA14
  51. PA15
  52. PA16
  53. PA17
  54. PA18
  55. PA19
  56. PA20
  57. PA21
  58. PA22 ETXER
  59. PA23 ETX2
  60. PA24 ETX3
  61. PA25 ERX2
  62. PA26 ERX3
  63. PA27 ERXCK
  64. PA28 ECRS
  65. PA29 ECOL
  66. PA30 RXD4
  67. PA31 TXD4
  68. => 0xffc00c3b
  69. Required properties for pin configuration node:
  70. - atmel,pins: 4 integers array, represents a group of pins mux and config
  71. setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
  72. The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
  73. PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
  74. Bits used for CONFIG:
  75. PULL_UP (1 << 0): indicate this pin need a pull up.
  76. MULTIDRIVE (1 << 1): indicate this pin need to be configured as multidrive.
  77. DEGLITCH (1 << 2): indicate this pin need deglitch.
  78. PULL_DOWN (1 << 3): indicate this pin need a pull down.
  79. DIS_SCHMIT (1 << 4): indicate this pin need to disable schmit trigger.
  80. DEBOUNCE (1 << 16): indicate this pin need debounce.
  81. DEBOUNCE_VAL (0x3fff << 17): debounce val.
  82. NOTE:
  83. Some requirements for using atmel,at91rm9200-pinctrl binding:
  84. 1. We have pin function node defined under at91 controller node to represent
  85. what pinmux functions this SoC supports.
  86. 2. The driver can use the function node's name and pin configuration node's
  87. name describe the pin function and group hierarchy.
  88. For example, Linux at91 pinctrl driver takes the function node's name
  89. as the function name and pin configuration node's name as group name to
  90. create the map table.
  91. 3. Each pin configuration node should have a phandle, devices can set pins
  92. configurations by referring to the phandle of that pin configuration node.
  93. 4. The gpio controller must be describe in the pinctrl simple-bus.
  94. Examples:
  95. pinctrl@fffff400 {
  96. #address-cells = <1>;
  97. #size-cells = <1>;
  98. ranges;
  99. compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
  100. reg = <0xfffff400 0x600>;
  101. atmel,mux-mask = <
  102. /* A B */
  103. 0xffffffff 0xffc00c3b /* pioA */
  104. 0xffffffff 0x7fff3ccf /* pioB */
  105. 0xffffffff 0x007fffff /* pioC */
  106. >;
  107. /* shared pinctrl settings */
  108. dbgu {
  109. pinctrl_dbgu: dbgu-0 {
  110. atmel,pins =
  111. <1 14 0x1 0x0 /* PB14 periph A */
  112. 1 15 0x1 0x1>; /* PB15 periph A with pullup */
  113. };
  114. };
  115. };
  116. dbgu: serial@fffff200 {
  117. compatible = "atmel,at91sam9260-usart";
  118. reg = <0xfffff200 0x200>;
  119. interrupts = <1 4 7>;
  120. pinctrl-names = "default";
  121. pinctrl-0 = <&pinctrl_dbgu>;
  122. status = "disabled";
  123. };