arch_timer.txt 2.1 KB

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  1. * ARM architected timer
  2. ARM cores may have a per-core architected timer, which provides per-cpu timers,
  3. or a memory mapped architected timer, which provides up to 8 frames with a
  4. physical and optional virtual timer per frame.
  5. The per-core architected timer is attached to a GIC to deliver its
  6. per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
  7. to deliver its interrupts via SPIs.
  8. ** CP15 Timer node properties:
  9. - compatible : Should at least contain one of
  10. "arm,armv7-timer"
  11. "arm,armv8-timer"
  12. - interrupts : Interrupt list for secure, non-secure, virtual and
  13. hypervisor timers, in that order.
  14. - clock-frequency : The frequency of the main counter, in Hz. Optional.
  15. Example:
  16. timer {
  17. compatible = "arm,cortex-a15-timer",
  18. "arm,armv7-timer";
  19. interrupts = <1 13 0xf08>,
  20. <1 14 0xf08>,
  21. <1 11 0xf08>,
  22. <1 10 0xf08>;
  23. clock-frequency = <100000000>;
  24. };
  25. ** Memory mapped timer node properties:
  26. - compatible : Should at least contain "arm,armv7-timer-mem".
  27. - clock-frequency : The frequency of the main counter, in Hz. Optional.
  28. - reg : The control frame base address.
  29. Note that #address-cells, #size-cells, and ranges shall be present to ensure
  30. the CPU can address a frame's registers.
  31. A timer node has up to 8 frame sub-nodes, each with the following properties:
  32. - frame-number: 0 to 7.
  33. - interrupts : Interrupt list for physical and virtual timers in that order.
  34. The virtual timer interrupt is optional.
  35. - reg : The first and second view base addresses in that order. The second view
  36. base address is optional.
  37. - status : "disabled" indicates the frame is not available for use. Optional.
  38. Example:
  39. timer@f0000000 {
  40. compatible = "arm,armv7-timer-mem";
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. ranges;
  44. reg = <0xf0000000 0x1000>;
  45. clock-frequency = <50000000>;
  46. frame@f0001000 {
  47. frame-number = <0>
  48. interrupts = <0 13 0x8>,
  49. <0 14 0x8>;
  50. reg = <0xf0001000 0x1000>,
  51. <0xf0002000 0x1000>;
  52. };
  53. frame@f0003000 {
  54. frame-number = <1>
  55. interrupts = <0 15 0x8>;
  56. reg = <0xf0003000 0x1000>;
  57. status = "disabled";
  58. };
  59. };