probe_32.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429
  1. /*
  2. * Default generic APIC driver. This handles up to 8 CPUs.
  3. *
  4. * Copyright 2003 Andi Kleen, SuSE Labs.
  5. * Subject to the GNU Public License, v.2
  6. *
  7. * Generic x86 APIC driver probe layer.
  8. */
  9. #include <linux/threads.h>
  10. #include <linux/cpumask.h>
  11. #include <linux/module.h>
  12. #include <linux/string.h>
  13. #include <linux/kernel.h>
  14. #include <linux/ctype.h>
  15. #include <linux/init.h>
  16. #include <linux/errno.h>
  17. #include <asm/fixmap.h>
  18. #include <asm/mpspec.h>
  19. #include <asm/apicdef.h>
  20. #include <asm/genapic.h>
  21. #include <asm/setup.h>
  22. #include <linux/threads.h>
  23. #include <linux/cpumask.h>
  24. #include <asm/mpspec.h>
  25. #include <asm/genapic.h>
  26. #include <asm/fixmap.h>
  27. #include <asm/apicdef.h>
  28. #include <linux/kernel.h>
  29. #include <linux/string.h>
  30. #include <linux/smp.h>
  31. #include <linux/init.h>
  32. #include <asm/genapic.h>
  33. #include <asm/ipi.h>
  34. #include <linux/smp.h>
  35. #include <linux/init.h>
  36. #include <linux/interrupt.h>
  37. #include <asm/acpi.h>
  38. #include <asm/arch_hooks.h>
  39. #include <asm/e820.h>
  40. #include <asm/setup.h>
  41. #include <asm/genapic.h>
  42. #ifdef CONFIG_HOTPLUG_CPU
  43. #define DEFAULT_SEND_IPI (1)
  44. #else
  45. #define DEFAULT_SEND_IPI (0)
  46. #endif
  47. int no_broadcast = DEFAULT_SEND_IPI;
  48. #ifdef CONFIG_X86_LOCAL_APIC
  49. void default_setup_apic_routing(void)
  50. {
  51. #ifdef CONFIG_X86_IO_APIC
  52. printk(KERN_INFO
  53. "Enabling APIC mode: Flat. Using %d I/O APICs\n",
  54. nr_ioapics);
  55. #endif
  56. }
  57. static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
  58. {
  59. /*
  60. * Careful. Some cpus do not strictly honor the set of cpus
  61. * specified in the interrupt destination when using lowest
  62. * priority interrupt delivery mode.
  63. *
  64. * In particular there was a hyperthreading cpu observed to
  65. * deliver interrupts to the wrong hyperthread when only one
  66. * hyperthread was specified in the interrupt desitination.
  67. */
  68. *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
  69. }
  70. /* should be called last. */
  71. static int probe_default(void)
  72. {
  73. return 1;
  74. }
  75. struct genapic apic_default = {
  76. .name = "default",
  77. .probe = probe_default,
  78. .acpi_madt_oem_check = NULL,
  79. .apic_id_registered = default_apic_id_registered,
  80. .irq_delivery_mode = dest_LowestPrio,
  81. /* logical delivery broadcast to all CPUs: */
  82. .irq_dest_mode = 1,
  83. .target_cpus = default_target_cpus,
  84. .disable_esr = 0,
  85. .dest_logical = APIC_DEST_LOGICAL,
  86. .check_apicid_used = default_check_apicid_used,
  87. .check_apicid_present = default_check_apicid_present,
  88. .vector_allocation_domain = default_vector_allocation_domain,
  89. .init_apic_ldr = default_init_apic_ldr,
  90. .ioapic_phys_id_map = default_ioapic_phys_id_map,
  91. .setup_apic_routing = default_setup_apic_routing,
  92. .multi_timer_check = NULL,
  93. .apicid_to_node = default_apicid_to_node,
  94. .cpu_to_logical_apicid = default_cpu_to_logical_apicid,
  95. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  96. .apicid_to_cpu_present = default_apicid_to_cpu_present,
  97. .setup_portio_remap = NULL,
  98. .check_phys_apicid_present = default_check_phys_apicid_present,
  99. .enable_apic_mode = NULL,
  100. .phys_pkg_id = default_phys_pkg_id,
  101. .mps_oem_check = NULL,
  102. .get_apic_id = default_get_apic_id,
  103. .set_apic_id = NULL,
  104. .apic_id_mask = 0x0F << 24,
  105. .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
  106. .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
  107. .send_IPI_mask = default_send_IPI_mask_logical,
  108. .send_IPI_mask_allbutself = default_send_IPI_mask_allbutself_logical,
  109. .send_IPI_allbutself = default_send_IPI_allbutself,
  110. .send_IPI_all = default_send_IPI_all,
  111. .send_IPI_self = default_send_IPI_self,
  112. .wakeup_cpu = NULL,
  113. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  114. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  115. .wait_for_init_deassert = default_wait_for_init_deassert,
  116. .smp_callin_clear_local_apic = NULL,
  117. .store_NMI_vector = NULL,
  118. .inquire_remote_apic = default_inquire_remote_apic,
  119. .read = native_apic_mem_read,
  120. .write = native_apic_mem_write,
  121. .icr_read = native_apic_icr_read,
  122. .icr_write = native_apic_icr_write,
  123. .wait_icr_idle = native_apic_wait_icr_idle,
  124. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  125. };
  126. extern struct genapic apic_numaq;
  127. extern struct genapic apic_summit;
  128. extern struct genapic apic_bigsmp;
  129. extern struct genapic apic_es7000;
  130. extern struct genapic apic_default;
  131. struct genapic *apic = &apic_default;
  132. EXPORT_SYMBOL_GPL(apic);
  133. static struct genapic *apic_probe[] __initdata = {
  134. #ifdef CONFIG_X86_NUMAQ
  135. &apic_numaq,
  136. #endif
  137. #ifdef CONFIG_X86_SUMMIT
  138. &apic_summit,
  139. #endif
  140. #ifdef CONFIG_X86_BIGSMP
  141. &apic_bigsmp,
  142. #endif
  143. #ifdef CONFIG_X86_ES7000
  144. &apic_es7000,
  145. #endif
  146. &apic_default, /* must be last */
  147. NULL,
  148. };
  149. static int cmdline_apic __initdata;
  150. static int __init parse_apic(char *arg)
  151. {
  152. int i;
  153. if (!arg)
  154. return -EINVAL;
  155. for (i = 0; apic_probe[i]; i++) {
  156. if (!strcmp(apic_probe[i]->name, arg)) {
  157. apic = apic_probe[i];
  158. cmdline_apic = 1;
  159. return 0;
  160. }
  161. }
  162. if (x86_quirks->update_genapic)
  163. x86_quirks->update_genapic();
  164. /* Parsed again by __setup for debug/verbose */
  165. return 0;
  166. }
  167. early_param("apic", parse_apic);
  168. void __init generic_bigsmp_probe(void)
  169. {
  170. #ifdef CONFIG_X86_BIGSMP
  171. /*
  172. * This routine is used to switch to bigsmp mode when
  173. * - There is no apic= option specified by the user
  174. * - generic_apic_probe() has chosen apic_default as the sub_arch
  175. * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
  176. */
  177. if (!cmdline_apic && apic == &apic_default) {
  178. if (apic_bigsmp.probe()) {
  179. apic = &apic_bigsmp;
  180. if (x86_quirks->update_genapic)
  181. x86_quirks->update_genapic();
  182. printk(KERN_INFO "Overriding APIC driver with %s\n",
  183. apic->name);
  184. }
  185. }
  186. #endif
  187. }
  188. void __init generic_apic_probe(void)
  189. {
  190. if (!cmdline_apic) {
  191. int i;
  192. for (i = 0; apic_probe[i]; i++) {
  193. if (apic_probe[i]->probe()) {
  194. apic = apic_probe[i];
  195. break;
  196. }
  197. }
  198. /* Not visible without early console */
  199. if (!apic_probe[i])
  200. panic("Didn't find an APIC driver");
  201. if (x86_quirks->update_genapic)
  202. x86_quirks->update_genapic();
  203. }
  204. printk(KERN_INFO "Using APIC driver %s\n", apic->name);
  205. }
  206. /* These functions can switch the APIC even after the initial ->probe() */
  207. int __init
  208. generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
  209. {
  210. int i;
  211. for (i = 0; apic_probe[i]; ++i) {
  212. if (!apic_probe[i]->mps_oem_check)
  213. continue;
  214. if (!apic_probe[i]->mps_oem_check(mpc, oem, productid))
  215. continue;
  216. if (!cmdline_apic) {
  217. apic = apic_probe[i];
  218. if (x86_quirks->update_genapic)
  219. x86_quirks->update_genapic();
  220. printk(KERN_INFO "Switched to APIC driver `%s'.\n",
  221. apic->name);
  222. }
  223. return 1;
  224. }
  225. return 0;
  226. }
  227. int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  228. {
  229. int i;
  230. for (i = 0; apic_probe[i]; ++i) {
  231. if (!apic_probe[i]->acpi_madt_oem_check)
  232. continue;
  233. if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id))
  234. continue;
  235. if (!cmdline_apic) {
  236. apic = apic_probe[i];
  237. if (x86_quirks->update_genapic)
  238. x86_quirks->update_genapic();
  239. printk(KERN_INFO "Switched to APIC driver `%s'.\n",
  240. apic->name);
  241. }
  242. return 1;
  243. }
  244. return 0;
  245. }
  246. #endif /* CONFIG_X86_LOCAL_APIC */
  247. /**
  248. * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
  249. *
  250. * Description:
  251. * Perform any necessary interrupt initialisation prior to setting up
  252. * the "ordinary" interrupt call gates. For legacy reasons, the ISA
  253. * interrupts should be initialised here if the machine emulates a PC
  254. * in any way.
  255. **/
  256. void __init pre_intr_init_hook(void)
  257. {
  258. if (x86_quirks->arch_pre_intr_init) {
  259. if (x86_quirks->arch_pre_intr_init())
  260. return;
  261. }
  262. init_ISA_irqs();
  263. }
  264. /**
  265. * intr_init_hook - post gate setup interrupt initialisation
  266. *
  267. * Description:
  268. * Fill in any interrupts that may have been left out by the general
  269. * init_IRQ() routine. interrupts having to do with the machine rather
  270. * than the devices on the I/O bus (like APIC interrupts in intel MP
  271. * systems) are started here.
  272. **/
  273. void __init intr_init_hook(void)
  274. {
  275. if (x86_quirks->arch_intr_init) {
  276. if (x86_quirks->arch_intr_init())
  277. return;
  278. }
  279. }
  280. /**
  281. * pre_setup_arch_hook - hook called prior to any setup_arch() execution
  282. *
  283. * Description:
  284. * generally used to activate any machine specific identification
  285. * routines that may be needed before setup_arch() runs. On Voyager
  286. * this is used to get the board revision and type.
  287. **/
  288. void __init pre_setup_arch_hook(void)
  289. {
  290. }
  291. /**
  292. * trap_init_hook - initialise system specific traps
  293. *
  294. * Description:
  295. * Called as the final act of trap_init(). Used in VISWS to initialise
  296. * the various board specific APIC traps.
  297. **/
  298. void __init trap_init_hook(void)
  299. {
  300. if (x86_quirks->arch_trap_init) {
  301. if (x86_quirks->arch_trap_init())
  302. return;
  303. }
  304. }
  305. static struct irqaction irq0 = {
  306. .handler = timer_interrupt,
  307. .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
  308. .mask = CPU_MASK_NONE,
  309. .name = "timer"
  310. };
  311. /**
  312. * pre_time_init_hook - do any specific initialisations before.
  313. *
  314. **/
  315. void __init pre_time_init_hook(void)
  316. {
  317. if (x86_quirks->arch_pre_time_init)
  318. x86_quirks->arch_pre_time_init();
  319. }
  320. /**
  321. * time_init_hook - do any specific initialisations for the system timer.
  322. *
  323. * Description:
  324. * Must plug the system timer interrupt source at HZ into the IRQ listed
  325. * in irq_vectors.h:TIMER_IRQ
  326. **/
  327. void __init time_init_hook(void)
  328. {
  329. if (x86_quirks->arch_time_init) {
  330. /*
  331. * A nonzero return code does not mean failure, it means
  332. * that the architecture quirk does not want any
  333. * generic (timer) setup to be performed after this:
  334. */
  335. if (x86_quirks->arch_time_init())
  336. return;
  337. }
  338. irq0.mask = cpumask_of_cpu(0);
  339. setup_irq(0, &irq0);
  340. }
  341. #ifdef CONFIG_MCA
  342. /**
  343. * mca_nmi_hook - hook into MCA specific NMI chain
  344. *
  345. * Description:
  346. * The MCA (Microchannel Architecture) has an NMI chain for NMI sources
  347. * along the MCA bus. Use this to hook into that chain if you will need
  348. * it.
  349. **/
  350. void mca_nmi_hook(void)
  351. {
  352. /*
  353. * If I recall correctly, there's a whole bunch of other things that
  354. * we can do to check for NMI problems, but that's all I know about
  355. * at the moment.
  356. */
  357. pr_warning("NMI generated from unknown source!\n");
  358. }
  359. #endif
  360. static __init int no_ipi_broadcast(char *str)
  361. {
  362. get_option(&str, &no_broadcast);
  363. pr_info("Using %s mode\n",
  364. no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
  365. return 1;
  366. }
  367. __setup("no_ipi_broadcast=", no_ipi_broadcast);
  368. static int __init print_ipi_mode(void)
  369. {
  370. pr_info("Using IPI %s mode\n",
  371. no_broadcast ? "No-Shortcut" : "Shortcut");
  372. return 0;
  373. }
  374. late_initcall(print_ipi_mode);