main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. unsigned long flags;
  100. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  101. if (--sc->ps_usecount != 0)
  102. goto unlock;
  103. spin_lock(&common->cc_lock);
  104. ath_hw_cycle_counters_update(common);
  105. spin_unlock(&common->cc_lock);
  106. if (sc->ps_idle)
  107. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA |
  112. PS_WAIT_FOR_TX_ACK)))
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  114. unlock:
  115. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  116. }
  117. void ath_start_ani(struct ath_common *common)
  118. {
  119. struct ath_hw *ah = common->ah;
  120. unsigned long timestamp = jiffies_to_msecs(jiffies);
  121. struct ath_softc *sc = (struct ath_softc *) common->priv;
  122. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  123. return;
  124. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  125. return;
  126. common->ani.longcal_timer = timestamp;
  127. common->ani.shortcal_timer = timestamp;
  128. common->ani.checkani_timer = timestamp;
  129. mod_timer(&common->ani.timer,
  130. jiffies +
  131. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  132. }
  133. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  134. {
  135. struct ath_hw *ah = sc->sc_ah;
  136. struct ath9k_channel *chan = &ah->channels[channel];
  137. struct survey_info *survey = &sc->survey[channel];
  138. if (chan->noisefloor) {
  139. survey->filled |= SURVEY_INFO_NOISE_DBM;
  140. survey->noise = chan->noisefloor;
  141. }
  142. }
  143. /*
  144. * Updates the survey statistics and returns the busy time since last
  145. * update in %, if the measurement duration was long enough for the
  146. * result to be useful, -1 otherwise.
  147. */
  148. static int ath_update_survey_stats(struct ath_softc *sc)
  149. {
  150. struct ath_hw *ah = sc->sc_ah;
  151. struct ath_common *common = ath9k_hw_common(ah);
  152. int pos = ah->curchan - &ah->channels[0];
  153. struct survey_info *survey = &sc->survey[pos];
  154. struct ath_cycle_counters *cc = &common->cc_survey;
  155. unsigned int div = common->clockrate * 1000;
  156. int ret = 0;
  157. if (!ah->curchan)
  158. return -1;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. if (cc->cycles < div)
  172. return -1;
  173. if (cc->cycles > 0)
  174. ret = cc->rx_busy * 100 / cc->cycles;
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. return ret;
  178. }
  179. /*
  180. * Set/change channels. If the channel is really being changed, it's done
  181. * by reseting the chip. To accomplish this we must first cleanup any pending
  182. * DMA, then restart stuff.
  183. */
  184. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  185. struct ath9k_channel *hchan)
  186. {
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. sc->hw_busy_count = 0;
  197. del_timer_sync(&common->ani.timer);
  198. cancel_work_sync(&sc->paprd_work);
  199. cancel_work_sync(&sc->hw_check_work);
  200. cancel_delayed_work_sync(&sc->tx_complete_work);
  201. cancel_delayed_work_sync(&sc->hw_pll_work);
  202. ath9k_ps_wakeup(sc);
  203. spin_lock_bh(&sc->sc_pcu_lock);
  204. /*
  205. * This is only performed if the channel settings have
  206. * actually changed.
  207. *
  208. * To switch channels clear any pending DMA operations;
  209. * wait long enough for the RX fifo to drain, reset the
  210. * hardware at the new frequency, and then re-enable
  211. * the relevant bits of the h/w.
  212. */
  213. ath9k_hw_disable_interrupts(ah);
  214. stopped = ath_drain_all_txq(sc, false);
  215. if (!ath_stoprecv(sc))
  216. stopped = false;
  217. if (!ath9k_hw_check_alive(ah))
  218. stopped = false;
  219. /* XXX: do not flush receive queue here. We don't want
  220. * to flush data frames already in queue because of
  221. * changing channel. */
  222. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  223. fastcc = false;
  224. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  225. caldata = &sc->caldata;
  226. ath_dbg(common, ATH_DBG_CONFIG,
  227. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  228. sc->sc_ah->curchan->channel,
  229. channel->center_freq, conf_is_ht40(conf),
  230. fastcc);
  231. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  232. if (r) {
  233. ath_err(common,
  234. "Unable to reset channel (%u MHz), reset status %d\n",
  235. channel->center_freq, r);
  236. goto ps_restore;
  237. }
  238. if (ath_startrecv(sc) != 0) {
  239. ath_err(common, "Unable to restart recv logic\n");
  240. r = -EIO;
  241. goto ps_restore;
  242. }
  243. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  244. sc->config.txpowlimit, &sc->curtxpow);
  245. ath9k_hw_set_interrupts(ah, ah->imask);
  246. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  247. if (sc->sc_flags & SC_OP_BEACONS)
  248. ath_set_beacon(sc);
  249. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  250. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  251. if (!common->disable_ani)
  252. ath_start_ani(common);
  253. }
  254. ps_restore:
  255. ieee80211_wake_queues(hw);
  256. spin_unlock_bh(&sc->sc_pcu_lock);
  257. ath9k_ps_restore(sc);
  258. return r;
  259. }
  260. static void ath_paprd_activate(struct ath_softc *sc)
  261. {
  262. struct ath_hw *ah = sc->sc_ah;
  263. struct ath9k_hw_cal_data *caldata = ah->caldata;
  264. struct ath_common *common = ath9k_hw_common(ah);
  265. int chain;
  266. if (!caldata || !caldata->paprd_done)
  267. return;
  268. ath9k_ps_wakeup(sc);
  269. ar9003_paprd_enable(ah, false);
  270. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  271. if (!(common->tx_chainmask & BIT(chain)))
  272. continue;
  273. ar9003_paprd_populate_single_table(ah, caldata, chain);
  274. }
  275. ar9003_paprd_enable(ah, true);
  276. ath9k_ps_restore(sc);
  277. }
  278. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  279. {
  280. struct ieee80211_hw *hw = sc->hw;
  281. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  282. struct ath_hw *ah = sc->sc_ah;
  283. struct ath_common *common = ath9k_hw_common(ah);
  284. struct ath_tx_control txctl;
  285. int time_left;
  286. memset(&txctl, 0, sizeof(txctl));
  287. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  288. memset(tx_info, 0, sizeof(*tx_info));
  289. tx_info->band = hw->conf.channel->band;
  290. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  291. tx_info->control.rates[0].idx = 0;
  292. tx_info->control.rates[0].count = 1;
  293. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  294. tx_info->control.rates[1].idx = -1;
  295. init_completion(&sc->paprd_complete);
  296. txctl.paprd = BIT(chain);
  297. if (ath_tx_start(hw, skb, &txctl) != 0) {
  298. ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
  299. dev_kfree_skb_any(skb);
  300. return false;
  301. }
  302. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  303. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  304. if (!time_left)
  305. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
  306. "Timeout waiting for paprd training on TX chain %d\n",
  307. chain);
  308. return !!time_left;
  309. }
  310. void ath_paprd_calibrate(struct work_struct *work)
  311. {
  312. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  313. struct ieee80211_hw *hw = sc->hw;
  314. struct ath_hw *ah = sc->sc_ah;
  315. struct ieee80211_hdr *hdr;
  316. struct sk_buff *skb = NULL;
  317. struct ath9k_hw_cal_data *caldata = ah->caldata;
  318. struct ath_common *common = ath9k_hw_common(ah);
  319. int ftype;
  320. int chain_ok = 0;
  321. int chain;
  322. int len = 1800;
  323. if (!caldata)
  324. return;
  325. ath9k_ps_wakeup(sc);
  326. if (ar9003_paprd_init_table(ah) < 0)
  327. goto fail_paprd;
  328. skb = alloc_skb(len, GFP_KERNEL);
  329. if (!skb)
  330. goto fail_paprd;
  331. skb_put(skb, len);
  332. memset(skb->data, 0, len);
  333. hdr = (struct ieee80211_hdr *)skb->data;
  334. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  335. hdr->frame_control = cpu_to_le16(ftype);
  336. hdr->duration_id = cpu_to_le16(10);
  337. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  338. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  339. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  340. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  341. if (!(common->tx_chainmask & BIT(chain)))
  342. continue;
  343. chain_ok = 0;
  344. ath_dbg(common, ATH_DBG_CALIBRATE,
  345. "Sending PAPRD frame for thermal measurement "
  346. "on chain %d\n", chain);
  347. if (!ath_paprd_send_frame(sc, skb, chain))
  348. goto fail_paprd;
  349. ar9003_paprd_setup_gain_table(ah, chain);
  350. ath_dbg(common, ATH_DBG_CALIBRATE,
  351. "Sending PAPRD training frame on chain %d\n", chain);
  352. if (!ath_paprd_send_frame(sc, skb, chain))
  353. goto fail_paprd;
  354. if (!ar9003_paprd_is_done(ah))
  355. break;
  356. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  357. break;
  358. chain_ok = 1;
  359. }
  360. kfree_skb(skb);
  361. if (chain_ok) {
  362. caldata->paprd_done = true;
  363. ath_paprd_activate(sc);
  364. }
  365. fail_paprd:
  366. ath9k_ps_restore(sc);
  367. }
  368. /*
  369. * This routine performs the periodic noise floor calibration function
  370. * that is used to adjust and optimize the chip performance. This
  371. * takes environmental changes (location, temperature) into account.
  372. * When the task is complete, it reschedules itself depending on the
  373. * appropriate interval that was calculated.
  374. */
  375. void ath_ani_calibrate(unsigned long data)
  376. {
  377. struct ath_softc *sc = (struct ath_softc *)data;
  378. struct ath_hw *ah = sc->sc_ah;
  379. struct ath_common *common = ath9k_hw_common(ah);
  380. bool longcal = false;
  381. bool shortcal = false;
  382. bool aniflag = false;
  383. unsigned int timestamp = jiffies_to_msecs(jiffies);
  384. u32 cal_interval, short_cal_interval, long_cal_interval;
  385. unsigned long flags;
  386. if (ah->caldata && ah->caldata->nfcal_interference)
  387. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  388. else
  389. long_cal_interval = ATH_LONG_CALINTERVAL;
  390. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  391. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  392. /* Only calibrate if awake */
  393. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  394. goto set_timer;
  395. ath9k_ps_wakeup(sc);
  396. /* Long calibration runs independently of short calibration. */
  397. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  398. longcal = true;
  399. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  400. common->ani.longcal_timer = timestamp;
  401. }
  402. /* Short calibration applies only while caldone is false */
  403. if (!common->ani.caldone) {
  404. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  405. shortcal = true;
  406. ath_dbg(common, ATH_DBG_ANI,
  407. "shortcal @%lu\n", jiffies);
  408. common->ani.shortcal_timer = timestamp;
  409. common->ani.resetcal_timer = timestamp;
  410. }
  411. } else {
  412. if ((timestamp - common->ani.resetcal_timer) >=
  413. ATH_RESTART_CALINTERVAL) {
  414. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  415. if (common->ani.caldone)
  416. common->ani.resetcal_timer = timestamp;
  417. }
  418. }
  419. /* Verify whether we must check ANI */
  420. if ((timestamp - common->ani.checkani_timer) >=
  421. ah->config.ani_poll_interval) {
  422. aniflag = true;
  423. common->ani.checkani_timer = timestamp;
  424. }
  425. /* Call ANI routine if necessary */
  426. if (aniflag) {
  427. spin_lock_irqsave(&common->cc_lock, flags);
  428. ath9k_hw_ani_monitor(ah, ah->curchan);
  429. ath_update_survey_stats(sc);
  430. spin_unlock_irqrestore(&common->cc_lock, flags);
  431. }
  432. /* Perform calibration if necessary */
  433. if (longcal || shortcal) {
  434. common->ani.caldone =
  435. ath9k_hw_calibrate(ah, ah->curchan,
  436. common->rx_chainmask, longcal);
  437. }
  438. ath9k_ps_restore(sc);
  439. set_timer:
  440. /*
  441. * Set timer interval based on previous results.
  442. * The interval must be the shortest necessary to satisfy ANI,
  443. * short calibration and long calibration.
  444. */
  445. cal_interval = ATH_LONG_CALINTERVAL;
  446. if (sc->sc_ah->config.enable_ani)
  447. cal_interval = min(cal_interval,
  448. (u32)ah->config.ani_poll_interval);
  449. if (!common->ani.caldone)
  450. cal_interval = min(cal_interval, (u32)short_cal_interval);
  451. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  452. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  453. if (!ah->caldata->paprd_done)
  454. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  455. else if (!ah->paprd_table_write_done)
  456. ath_paprd_activate(sc);
  457. }
  458. }
  459. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  460. {
  461. struct ath_node *an;
  462. struct ath_hw *ah = sc->sc_ah;
  463. an = (struct ath_node *)sta->drv_priv;
  464. #ifdef CONFIG_ATH9K_DEBUGFS
  465. spin_lock(&sc->nodes_lock);
  466. list_add(&an->list, &sc->nodes);
  467. spin_unlock(&sc->nodes_lock);
  468. an->sta = sta;
  469. #endif
  470. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  471. sc->sc_flags |= SC_OP_ENABLE_APM;
  472. if (sc->sc_flags & SC_OP_TXAGGR) {
  473. ath_tx_node_init(sc, an);
  474. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  475. sta->ht_cap.ampdu_factor);
  476. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  477. }
  478. }
  479. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  480. {
  481. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  482. #ifdef CONFIG_ATH9K_DEBUGFS
  483. spin_lock(&sc->nodes_lock);
  484. list_del(&an->list);
  485. spin_unlock(&sc->nodes_lock);
  486. an->sta = NULL;
  487. #endif
  488. if (sc->sc_flags & SC_OP_TXAGGR)
  489. ath_tx_node_cleanup(sc, an);
  490. }
  491. void ath_hw_check(struct work_struct *work)
  492. {
  493. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  494. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  495. unsigned long flags;
  496. int busy;
  497. ath9k_ps_wakeup(sc);
  498. if (ath9k_hw_check_alive(sc->sc_ah))
  499. goto out;
  500. spin_lock_irqsave(&common->cc_lock, flags);
  501. busy = ath_update_survey_stats(sc);
  502. spin_unlock_irqrestore(&common->cc_lock, flags);
  503. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  504. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  505. if (busy >= 99) {
  506. if (++sc->hw_busy_count >= 3)
  507. ath_reset(sc, true);
  508. } else if (busy >= 0)
  509. sc->hw_busy_count = 0;
  510. out:
  511. ath9k_ps_restore(sc);
  512. }
  513. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  514. {
  515. static int count;
  516. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  517. if (pll_sqsum >= 0x40000) {
  518. count++;
  519. if (count == 3) {
  520. /* Rx is hung for more than 500ms. Reset it */
  521. ath_dbg(common, ATH_DBG_RESET,
  522. "Possible RX hang, resetting");
  523. ath_reset(sc, true);
  524. count = 0;
  525. }
  526. } else
  527. count = 0;
  528. }
  529. void ath_hw_pll_work(struct work_struct *work)
  530. {
  531. struct ath_softc *sc = container_of(work, struct ath_softc,
  532. hw_pll_work.work);
  533. u32 pll_sqsum;
  534. if (AR_SREV_9485(sc->sc_ah)) {
  535. ath9k_ps_wakeup(sc);
  536. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  537. ath9k_ps_restore(sc);
  538. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  539. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  540. }
  541. }
  542. void ath9k_tasklet(unsigned long data)
  543. {
  544. struct ath_softc *sc = (struct ath_softc *)data;
  545. struct ath_hw *ah = sc->sc_ah;
  546. struct ath_common *common = ath9k_hw_common(ah);
  547. u32 status = sc->intrstatus;
  548. u32 rxmask;
  549. if ((status & ATH9K_INT_FATAL) ||
  550. (status & ATH9K_INT_BB_WATCHDOG)) {
  551. ath_reset(sc, true);
  552. return;
  553. }
  554. ath9k_ps_wakeup(sc);
  555. spin_lock(&sc->sc_pcu_lock);
  556. /*
  557. * Only run the baseband hang check if beacons stop working in AP or
  558. * IBSS mode, because it has a high false positive rate. For station
  559. * mode it should not be necessary, since the upper layers will detect
  560. * this through a beacon miss automatically and the following channel
  561. * change will trigger a hardware reset anyway
  562. */
  563. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  564. !ath9k_hw_check_alive(ah))
  565. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  566. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  567. /*
  568. * TSF sync does not look correct; remain awake to sync with
  569. * the next Beacon.
  570. */
  571. ath_dbg(common, ATH_DBG_PS,
  572. "TSFOOR - Sync with next Beacon\n");
  573. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC |
  574. PS_TSFOOR_SYNC;
  575. }
  576. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  577. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  578. ATH9K_INT_RXORN);
  579. else
  580. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  581. if (status & rxmask) {
  582. /* Check for high priority Rx first */
  583. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  584. (status & ATH9K_INT_RXHP))
  585. ath_rx_tasklet(sc, 0, true);
  586. ath_rx_tasklet(sc, 0, false);
  587. }
  588. if (status & ATH9K_INT_TX) {
  589. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  590. ath_tx_edma_tasklet(sc);
  591. else
  592. ath_tx_tasklet(sc);
  593. }
  594. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  595. if (status & ATH9K_INT_GENTIMER)
  596. ath_gen_timer_isr(sc->sc_ah);
  597. /* re-enable hardware interrupt */
  598. ath9k_hw_enable_interrupts(ah);
  599. spin_unlock(&sc->sc_pcu_lock);
  600. ath9k_ps_restore(sc);
  601. }
  602. irqreturn_t ath_isr(int irq, void *dev)
  603. {
  604. #define SCHED_INTR ( \
  605. ATH9K_INT_FATAL | \
  606. ATH9K_INT_BB_WATCHDOG | \
  607. ATH9K_INT_RXORN | \
  608. ATH9K_INT_RXEOL | \
  609. ATH9K_INT_RX | \
  610. ATH9K_INT_RXLP | \
  611. ATH9K_INT_RXHP | \
  612. ATH9K_INT_TX | \
  613. ATH9K_INT_BMISS | \
  614. ATH9K_INT_CST | \
  615. ATH9K_INT_TSFOOR | \
  616. ATH9K_INT_GENTIMER)
  617. struct ath_softc *sc = dev;
  618. struct ath_hw *ah = sc->sc_ah;
  619. struct ath_common *common = ath9k_hw_common(ah);
  620. enum ath9k_int status;
  621. bool sched = false;
  622. /*
  623. * The hardware is not ready/present, don't
  624. * touch anything. Note this can happen early
  625. * on if the IRQ is shared.
  626. */
  627. if (sc->sc_flags & SC_OP_INVALID)
  628. return IRQ_NONE;
  629. /* shared irq, not for us */
  630. if (!ath9k_hw_intrpend(ah))
  631. return IRQ_NONE;
  632. /*
  633. * Figure out the reason(s) for the interrupt. Note
  634. * that the hal returns a pseudo-ISR that may include
  635. * bits we haven't explicitly enabled so we mask the
  636. * value to insure we only process bits we requested.
  637. */
  638. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  639. status &= ah->imask; /* discard unasked-for bits */
  640. /*
  641. * If there are no status bits set, then this interrupt was not
  642. * for me (should have been caught above).
  643. */
  644. if (!status)
  645. return IRQ_NONE;
  646. /* Cache the status */
  647. sc->intrstatus = status;
  648. if (status & SCHED_INTR)
  649. sched = true;
  650. /*
  651. * If a FATAL or RXORN interrupt is received, we have to reset the
  652. * chip immediately.
  653. */
  654. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  655. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  656. goto chip_reset;
  657. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  658. (status & ATH9K_INT_BB_WATCHDOG)) {
  659. spin_lock(&common->cc_lock);
  660. ath_hw_cycle_counters_update(common);
  661. ar9003_hw_bb_watchdog_dbg_info(ah);
  662. spin_unlock(&common->cc_lock);
  663. goto chip_reset;
  664. }
  665. if (status & ATH9K_INT_SWBA)
  666. tasklet_schedule(&sc->bcon_tasklet);
  667. if (status & ATH9K_INT_TXURN)
  668. ath9k_hw_updatetxtriglevel(ah, true);
  669. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  670. if (status & ATH9K_INT_RXEOL) {
  671. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  672. ath9k_hw_set_interrupts(ah, ah->imask);
  673. }
  674. }
  675. if (status & ATH9K_INT_MIB) {
  676. /*
  677. * Disable interrupts until we service the MIB
  678. * interrupt; otherwise it will continue to
  679. * fire.
  680. */
  681. ath9k_hw_disable_interrupts(ah);
  682. /*
  683. * Let the hal handle the event. We assume
  684. * it will clear whatever condition caused
  685. * the interrupt.
  686. */
  687. spin_lock(&common->cc_lock);
  688. ath9k_hw_proc_mib_event(ah);
  689. spin_unlock(&common->cc_lock);
  690. ath9k_hw_enable_interrupts(ah);
  691. }
  692. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  693. if (status & ATH9K_INT_TIM_TIMER) {
  694. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  695. goto chip_reset;
  696. /* Clear RxAbort bit so that we can
  697. * receive frames */
  698. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  699. ath9k_hw_setrxabort(sc->sc_ah, 0);
  700. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  701. }
  702. chip_reset:
  703. ath_debug_stat_interrupt(sc, status);
  704. if (sched) {
  705. /* turn off every interrupt */
  706. ath9k_hw_disable_interrupts(ah);
  707. tasklet_schedule(&sc->intr_tq);
  708. }
  709. return IRQ_HANDLED;
  710. #undef SCHED_INTR
  711. }
  712. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  713. {
  714. struct ath_hw *ah = sc->sc_ah;
  715. struct ath_common *common = ath9k_hw_common(ah);
  716. struct ieee80211_channel *channel = hw->conf.channel;
  717. int r;
  718. ath9k_ps_wakeup(sc);
  719. spin_lock_bh(&sc->sc_pcu_lock);
  720. ath9k_hw_configpcipowersave(ah, 0, 0);
  721. if (!ah->curchan)
  722. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  723. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  724. if (r) {
  725. ath_err(common,
  726. "Unable to reset channel (%u MHz), reset status %d\n",
  727. channel->center_freq, r);
  728. }
  729. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  730. sc->config.txpowlimit, &sc->curtxpow);
  731. if (ath_startrecv(sc) != 0) {
  732. ath_err(common, "Unable to restart recv logic\n");
  733. goto out;
  734. }
  735. if (sc->sc_flags & SC_OP_BEACONS)
  736. ath_set_beacon(sc); /* restart beacons */
  737. /* Re-Enable interrupts */
  738. ath9k_hw_set_interrupts(ah, ah->imask);
  739. /* Enable LED */
  740. ath9k_hw_cfg_output(ah, ah->led_pin,
  741. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  742. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  743. ieee80211_wake_queues(hw);
  744. ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
  745. out:
  746. spin_unlock_bh(&sc->sc_pcu_lock);
  747. ath9k_ps_restore(sc);
  748. }
  749. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  750. {
  751. struct ath_hw *ah = sc->sc_ah;
  752. struct ieee80211_channel *channel = hw->conf.channel;
  753. int r;
  754. ath9k_ps_wakeup(sc);
  755. cancel_delayed_work_sync(&sc->hw_pll_work);
  756. spin_lock_bh(&sc->sc_pcu_lock);
  757. ieee80211_stop_queues(hw);
  758. /*
  759. * Keep the LED on when the radio is disabled
  760. * during idle unassociated state.
  761. */
  762. if (!sc->ps_idle) {
  763. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  764. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  765. }
  766. /* Disable interrupts */
  767. ath9k_hw_disable_interrupts(ah);
  768. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  769. ath_stoprecv(sc); /* turn off frame recv */
  770. ath_flushrecv(sc); /* flush recv queue */
  771. if (!ah->curchan)
  772. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  773. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  774. if (r) {
  775. ath_err(ath9k_hw_common(sc->sc_ah),
  776. "Unable to reset channel (%u MHz), reset status %d\n",
  777. channel->center_freq, r);
  778. }
  779. ath9k_hw_phy_disable(ah);
  780. ath9k_hw_configpcipowersave(ah, 1, 1);
  781. spin_unlock_bh(&sc->sc_pcu_lock);
  782. ath9k_ps_restore(sc);
  783. }
  784. int ath_reset(struct ath_softc *sc, bool retry_tx)
  785. {
  786. struct ath_hw *ah = sc->sc_ah;
  787. struct ath_common *common = ath9k_hw_common(ah);
  788. struct ieee80211_hw *hw = sc->hw;
  789. int r;
  790. sc->hw_busy_count = 0;
  791. /* Stop ANI */
  792. del_timer_sync(&common->ani.timer);
  793. ath9k_ps_wakeup(sc);
  794. spin_lock_bh(&sc->sc_pcu_lock);
  795. ieee80211_stop_queues(hw);
  796. ath9k_hw_disable_interrupts(ah);
  797. ath_drain_all_txq(sc, retry_tx);
  798. ath_stoprecv(sc);
  799. ath_flushrecv(sc);
  800. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  801. if (r)
  802. ath_err(common,
  803. "Unable to reset hardware; reset status %d\n", r);
  804. if (ath_startrecv(sc) != 0)
  805. ath_err(common, "Unable to start recv logic\n");
  806. /*
  807. * We may be doing a reset in response to a request
  808. * that changes the channel so update any state that
  809. * might change as a result.
  810. */
  811. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  812. sc->config.txpowlimit, &sc->curtxpow);
  813. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  814. ath_set_beacon(sc); /* restart beacons */
  815. ath9k_hw_set_interrupts(ah, ah->imask);
  816. if (retry_tx) {
  817. int i;
  818. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  819. if (ATH_TXQ_SETUP(sc, i)) {
  820. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  821. ath_txq_schedule(sc, &sc->tx.txq[i]);
  822. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  823. }
  824. }
  825. }
  826. ieee80211_wake_queues(hw);
  827. spin_unlock_bh(&sc->sc_pcu_lock);
  828. /* Start ANI */
  829. if (!common->disable_ani)
  830. ath_start_ani(common);
  831. ath9k_ps_restore(sc);
  832. return r;
  833. }
  834. /**********************/
  835. /* mac80211 callbacks */
  836. /**********************/
  837. static int ath9k_start(struct ieee80211_hw *hw)
  838. {
  839. struct ath_softc *sc = hw->priv;
  840. struct ath_hw *ah = sc->sc_ah;
  841. struct ath_common *common = ath9k_hw_common(ah);
  842. struct ieee80211_channel *curchan = hw->conf.channel;
  843. struct ath9k_channel *init_channel;
  844. int r;
  845. ath_dbg(common, ATH_DBG_CONFIG,
  846. "Starting driver with initial channel: %d MHz\n",
  847. curchan->center_freq);
  848. ath9k_ps_wakeup(sc);
  849. mutex_lock(&sc->mutex);
  850. /* setup initial channel */
  851. sc->chan_idx = curchan->hw_value;
  852. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  853. /* Reset SERDES registers */
  854. ath9k_hw_configpcipowersave(ah, 0, 0);
  855. /*
  856. * The basic interface to setting the hardware in a good
  857. * state is ``reset''. On return the hardware is known to
  858. * be powered up and with interrupts disabled. This must
  859. * be followed by initialization of the appropriate bits
  860. * and then setup of the interrupt mask.
  861. */
  862. spin_lock_bh(&sc->sc_pcu_lock);
  863. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  864. if (r) {
  865. ath_err(common,
  866. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  867. r, curchan->center_freq);
  868. spin_unlock_bh(&sc->sc_pcu_lock);
  869. goto mutex_unlock;
  870. }
  871. /*
  872. * This is needed only to setup initial state
  873. * but it's best done after a reset.
  874. */
  875. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  876. sc->config.txpowlimit, &sc->curtxpow);
  877. /*
  878. * Setup the hardware after reset:
  879. * The receive engine is set going.
  880. * Frame transmit is handled entirely
  881. * in the frame output path; there's nothing to do
  882. * here except setup the interrupt mask.
  883. */
  884. if (ath_startrecv(sc) != 0) {
  885. ath_err(common, "Unable to start recv logic\n");
  886. r = -EIO;
  887. spin_unlock_bh(&sc->sc_pcu_lock);
  888. goto mutex_unlock;
  889. }
  890. spin_unlock_bh(&sc->sc_pcu_lock);
  891. /* Setup our intr mask. */
  892. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  893. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  894. ATH9K_INT_GLOBAL;
  895. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  896. ah->imask |= ATH9K_INT_RXHP |
  897. ATH9K_INT_RXLP |
  898. ATH9K_INT_BB_WATCHDOG;
  899. else
  900. ah->imask |= ATH9K_INT_RX;
  901. ah->imask |= ATH9K_INT_GTT;
  902. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  903. ah->imask |= ATH9K_INT_CST;
  904. sc->sc_flags &= ~SC_OP_INVALID;
  905. sc->sc_ah->is_monitoring = false;
  906. /* Disable BMISS interrupt when we're not associated */
  907. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  908. ath9k_hw_set_interrupts(ah, ah->imask);
  909. ieee80211_wake_queues(hw);
  910. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  911. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  912. !ah->btcoex_hw.enabled) {
  913. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  914. AR_STOMP_LOW_WLAN_WGHT);
  915. ath9k_hw_btcoex_enable(ah);
  916. if (common->bus_ops->bt_coex_prep)
  917. common->bus_ops->bt_coex_prep(common);
  918. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  919. ath9k_btcoex_timer_resume(sc);
  920. }
  921. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  922. common->bus_ops->extn_synch_en(common);
  923. mutex_unlock:
  924. mutex_unlock(&sc->mutex);
  925. ath9k_ps_restore(sc);
  926. return r;
  927. }
  928. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  929. {
  930. struct ath_softc *sc = hw->priv;
  931. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  932. struct ath_tx_control txctl;
  933. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  934. if (sc->ps_enabled) {
  935. /*
  936. * mac80211 does not set PM field for normal data frames, so we
  937. * need to update that based on the current PS mode.
  938. */
  939. if (ieee80211_is_data(hdr->frame_control) &&
  940. !ieee80211_is_nullfunc(hdr->frame_control) &&
  941. !ieee80211_has_pm(hdr->frame_control)) {
  942. ath_dbg(common, ATH_DBG_PS,
  943. "Add PM=1 for a TX frame while in PS mode\n");
  944. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  945. }
  946. }
  947. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  948. /*
  949. * We are using PS-Poll and mac80211 can request TX while in
  950. * power save mode. Need to wake up hardware for the TX to be
  951. * completed and if needed, also for RX of buffered frames.
  952. */
  953. ath9k_ps_wakeup(sc);
  954. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  955. ath9k_hw_setrxabort(sc->sc_ah, 0);
  956. if (ieee80211_is_pspoll(hdr->frame_control)) {
  957. ath_dbg(common, ATH_DBG_PS,
  958. "Sending PS-Poll to pick a buffered frame\n");
  959. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  960. } else {
  961. ath_dbg(common, ATH_DBG_PS,
  962. "Wake up to complete TX\n");
  963. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  964. }
  965. /*
  966. * The actual restore operation will happen only after
  967. * the sc_flags bit is cleared. We are just dropping
  968. * the ps_usecount here.
  969. */
  970. ath9k_ps_restore(sc);
  971. }
  972. memset(&txctl, 0, sizeof(struct ath_tx_control));
  973. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  974. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  975. if (ath_tx_start(hw, skb, &txctl) != 0) {
  976. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  977. goto exit;
  978. }
  979. return;
  980. exit:
  981. dev_kfree_skb_any(skb);
  982. }
  983. static void ath9k_stop(struct ieee80211_hw *hw)
  984. {
  985. struct ath_softc *sc = hw->priv;
  986. struct ath_hw *ah = sc->sc_ah;
  987. struct ath_common *common = ath9k_hw_common(ah);
  988. mutex_lock(&sc->mutex);
  989. cancel_delayed_work_sync(&sc->tx_complete_work);
  990. cancel_delayed_work_sync(&sc->hw_pll_work);
  991. cancel_work_sync(&sc->paprd_work);
  992. cancel_work_sync(&sc->hw_check_work);
  993. if (sc->sc_flags & SC_OP_INVALID) {
  994. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  995. mutex_unlock(&sc->mutex);
  996. return;
  997. }
  998. /* Ensure HW is awake when we try to shut it down. */
  999. ath9k_ps_wakeup(sc);
  1000. if (ah->btcoex_hw.enabled) {
  1001. ath9k_hw_btcoex_disable(ah);
  1002. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1003. ath9k_btcoex_timer_pause(sc);
  1004. }
  1005. spin_lock_bh(&sc->sc_pcu_lock);
  1006. /* prevent tasklets to enable interrupts once we disable them */
  1007. ah->imask &= ~ATH9K_INT_GLOBAL;
  1008. /* make sure h/w will not generate any interrupt
  1009. * before setting the invalid flag. */
  1010. ath9k_hw_disable_interrupts(ah);
  1011. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1012. ath_drain_all_txq(sc, false);
  1013. ath_stoprecv(sc);
  1014. ath9k_hw_phy_disable(ah);
  1015. } else
  1016. sc->rx.rxlink = NULL;
  1017. if (sc->rx.frag) {
  1018. dev_kfree_skb_any(sc->rx.frag);
  1019. sc->rx.frag = NULL;
  1020. }
  1021. /* disable HAL and put h/w to sleep */
  1022. ath9k_hw_disable(ah);
  1023. ath9k_hw_configpcipowersave(ah, 1, 1);
  1024. spin_unlock_bh(&sc->sc_pcu_lock);
  1025. /* we can now sync irq and kill any running tasklets, since we already
  1026. * disabled interrupts and not holding a spin lock */
  1027. synchronize_irq(sc->irq);
  1028. tasklet_kill(&sc->intr_tq);
  1029. tasklet_kill(&sc->bcon_tasklet);
  1030. ath9k_ps_restore(sc);
  1031. sc->ps_idle = true;
  1032. ath_radio_disable(sc, hw);
  1033. sc->sc_flags |= SC_OP_INVALID;
  1034. mutex_unlock(&sc->mutex);
  1035. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1036. }
  1037. bool ath9k_uses_beacons(int type)
  1038. {
  1039. switch (type) {
  1040. case NL80211_IFTYPE_AP:
  1041. case NL80211_IFTYPE_ADHOC:
  1042. case NL80211_IFTYPE_MESH_POINT:
  1043. return true;
  1044. default:
  1045. return false;
  1046. }
  1047. }
  1048. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1049. struct ieee80211_vif *vif)
  1050. {
  1051. struct ath_vif *avp = (void *)vif->drv_priv;
  1052. ath9k_set_beaconing_status(sc, false);
  1053. ath_beacon_return(sc, avp);
  1054. ath9k_set_beaconing_status(sc, true);
  1055. sc->sc_flags &= ~SC_OP_BEACONS;
  1056. }
  1057. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1058. {
  1059. struct ath9k_vif_iter_data *iter_data = data;
  1060. int i;
  1061. if (iter_data->hw_macaddr)
  1062. for (i = 0; i < ETH_ALEN; i++)
  1063. iter_data->mask[i] &=
  1064. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1065. switch (vif->type) {
  1066. case NL80211_IFTYPE_AP:
  1067. iter_data->naps++;
  1068. break;
  1069. case NL80211_IFTYPE_STATION:
  1070. iter_data->nstations++;
  1071. break;
  1072. case NL80211_IFTYPE_ADHOC:
  1073. iter_data->nadhocs++;
  1074. break;
  1075. case NL80211_IFTYPE_MESH_POINT:
  1076. iter_data->nmeshes++;
  1077. break;
  1078. case NL80211_IFTYPE_WDS:
  1079. iter_data->nwds++;
  1080. break;
  1081. default:
  1082. iter_data->nothers++;
  1083. break;
  1084. }
  1085. }
  1086. /* Called with sc->mutex held. */
  1087. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1088. struct ieee80211_vif *vif,
  1089. struct ath9k_vif_iter_data *iter_data)
  1090. {
  1091. struct ath_softc *sc = hw->priv;
  1092. struct ath_hw *ah = sc->sc_ah;
  1093. struct ath_common *common = ath9k_hw_common(ah);
  1094. /*
  1095. * Use the hardware MAC address as reference, the hardware uses it
  1096. * together with the BSSID mask when matching addresses.
  1097. */
  1098. memset(iter_data, 0, sizeof(*iter_data));
  1099. iter_data->hw_macaddr = common->macaddr;
  1100. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1101. if (vif)
  1102. ath9k_vif_iter(iter_data, vif->addr, vif);
  1103. /* Get list of all active MAC addresses */
  1104. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1105. iter_data);
  1106. }
  1107. /* Called with sc->mutex held. */
  1108. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1109. struct ieee80211_vif *vif)
  1110. {
  1111. struct ath_softc *sc = hw->priv;
  1112. struct ath_hw *ah = sc->sc_ah;
  1113. struct ath_common *common = ath9k_hw_common(ah);
  1114. struct ath9k_vif_iter_data iter_data;
  1115. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1116. /* Set BSSID mask. */
  1117. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1118. ath_hw_setbssidmask(common);
  1119. /* Set op-mode & TSF */
  1120. if (iter_data.naps > 0) {
  1121. ath9k_hw_set_tsfadjust(ah, 1);
  1122. sc->sc_flags |= SC_OP_TSF_RESET;
  1123. ah->opmode = NL80211_IFTYPE_AP;
  1124. } else {
  1125. ath9k_hw_set_tsfadjust(ah, 0);
  1126. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1127. if (iter_data.nmeshes)
  1128. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1129. else if (iter_data.nwds)
  1130. ah->opmode = NL80211_IFTYPE_AP;
  1131. else if (iter_data.nadhocs)
  1132. ah->opmode = NL80211_IFTYPE_ADHOC;
  1133. else
  1134. ah->opmode = NL80211_IFTYPE_STATION;
  1135. }
  1136. /*
  1137. * Enable MIB interrupts when there are hardware phy counters.
  1138. */
  1139. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1140. if (ah->config.enable_ani)
  1141. ah->imask |= ATH9K_INT_MIB;
  1142. ah->imask |= ATH9K_INT_TSFOOR;
  1143. } else {
  1144. ah->imask &= ~ATH9K_INT_MIB;
  1145. ah->imask &= ~ATH9K_INT_TSFOOR;
  1146. }
  1147. ath9k_hw_set_interrupts(ah, ah->imask);
  1148. /* Set up ANI */
  1149. if (iter_data.naps > 0) {
  1150. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1151. if (!common->disable_ani) {
  1152. sc->sc_flags |= SC_OP_ANI_RUN;
  1153. ath_start_ani(common);
  1154. }
  1155. } else {
  1156. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1157. del_timer_sync(&common->ani.timer);
  1158. }
  1159. }
  1160. /* Called with sc->mutex held, vif counts set up properly. */
  1161. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1162. struct ieee80211_vif *vif)
  1163. {
  1164. struct ath_softc *sc = hw->priv;
  1165. ath9k_calculate_summary_state(hw, vif);
  1166. if (ath9k_uses_beacons(vif->type)) {
  1167. int error;
  1168. /* This may fail because upper levels do not have beacons
  1169. * properly configured yet. That's OK, we assume it
  1170. * will be properly configured and then we will be notified
  1171. * in the info_changed method and set up beacons properly
  1172. * there.
  1173. */
  1174. ath9k_set_beaconing_status(sc, false);
  1175. error = ath_beacon_alloc(sc, vif);
  1176. if (!error)
  1177. ath_beacon_config(sc, vif);
  1178. ath9k_set_beaconing_status(sc, true);
  1179. }
  1180. }
  1181. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1182. struct ieee80211_vif *vif)
  1183. {
  1184. struct ath_softc *sc = hw->priv;
  1185. struct ath_hw *ah = sc->sc_ah;
  1186. struct ath_common *common = ath9k_hw_common(ah);
  1187. int ret = 0;
  1188. ath9k_ps_wakeup(sc);
  1189. mutex_lock(&sc->mutex);
  1190. switch (vif->type) {
  1191. case NL80211_IFTYPE_STATION:
  1192. case NL80211_IFTYPE_WDS:
  1193. case NL80211_IFTYPE_ADHOC:
  1194. case NL80211_IFTYPE_AP:
  1195. case NL80211_IFTYPE_MESH_POINT:
  1196. break;
  1197. default:
  1198. ath_err(common, "Interface type %d not yet supported\n",
  1199. vif->type);
  1200. ret = -EOPNOTSUPP;
  1201. goto out;
  1202. }
  1203. if (ath9k_uses_beacons(vif->type)) {
  1204. if (sc->nbcnvifs >= ATH_BCBUF) {
  1205. ath_err(common, "Not enough beacon buffers when adding"
  1206. " new interface of type: %i\n",
  1207. vif->type);
  1208. ret = -ENOBUFS;
  1209. goto out;
  1210. }
  1211. }
  1212. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1213. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1214. sc->nvifs > 0)) {
  1215. ath_err(common, "Cannot create ADHOC interface when other"
  1216. " interfaces already exist.\n");
  1217. ret = -EINVAL;
  1218. goto out;
  1219. }
  1220. ath_dbg(common, ATH_DBG_CONFIG,
  1221. "Attach a VIF of type: %d\n", vif->type);
  1222. sc->nvifs++;
  1223. ath9k_do_vif_add_setup(hw, vif);
  1224. out:
  1225. mutex_unlock(&sc->mutex);
  1226. ath9k_ps_restore(sc);
  1227. return ret;
  1228. }
  1229. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1230. struct ieee80211_vif *vif,
  1231. enum nl80211_iftype new_type,
  1232. bool p2p)
  1233. {
  1234. struct ath_softc *sc = hw->priv;
  1235. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1236. int ret = 0;
  1237. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1238. mutex_lock(&sc->mutex);
  1239. ath9k_ps_wakeup(sc);
  1240. /* See if new interface type is valid. */
  1241. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1242. (sc->nvifs > 1)) {
  1243. ath_err(common, "When using ADHOC, it must be the only"
  1244. " interface.\n");
  1245. ret = -EINVAL;
  1246. goto out;
  1247. }
  1248. if (ath9k_uses_beacons(new_type) &&
  1249. !ath9k_uses_beacons(vif->type)) {
  1250. if (sc->nbcnvifs >= ATH_BCBUF) {
  1251. ath_err(common, "No beacon slot available\n");
  1252. ret = -ENOBUFS;
  1253. goto out;
  1254. }
  1255. }
  1256. /* Clean up old vif stuff */
  1257. if (ath9k_uses_beacons(vif->type))
  1258. ath9k_reclaim_beacon(sc, vif);
  1259. /* Add new settings */
  1260. vif->type = new_type;
  1261. vif->p2p = p2p;
  1262. ath9k_do_vif_add_setup(hw, vif);
  1263. out:
  1264. ath9k_ps_restore(sc);
  1265. mutex_unlock(&sc->mutex);
  1266. return ret;
  1267. }
  1268. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1269. struct ieee80211_vif *vif)
  1270. {
  1271. struct ath_softc *sc = hw->priv;
  1272. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1273. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1274. ath9k_ps_wakeup(sc);
  1275. mutex_lock(&sc->mutex);
  1276. sc->nvifs--;
  1277. /* Reclaim beacon resources */
  1278. if (ath9k_uses_beacons(vif->type))
  1279. ath9k_reclaim_beacon(sc, vif);
  1280. ath9k_calculate_summary_state(hw, NULL);
  1281. mutex_unlock(&sc->mutex);
  1282. ath9k_ps_restore(sc);
  1283. }
  1284. static void ath9k_enable_ps(struct ath_softc *sc)
  1285. {
  1286. struct ath_hw *ah = sc->sc_ah;
  1287. sc->ps_enabled = true;
  1288. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1289. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1290. ah->imask |= ATH9K_INT_TIM_TIMER;
  1291. ath9k_hw_set_interrupts(ah, ah->imask);
  1292. }
  1293. ath9k_hw_setrxabort(ah, 1);
  1294. }
  1295. }
  1296. static void ath9k_disable_ps(struct ath_softc *sc)
  1297. {
  1298. struct ath_hw *ah = sc->sc_ah;
  1299. sc->ps_enabled = false;
  1300. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1301. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1302. ath9k_hw_setrxabort(ah, 0);
  1303. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1304. PS_WAIT_FOR_CAB |
  1305. PS_WAIT_FOR_PSPOLL_DATA |
  1306. PS_WAIT_FOR_TX_ACK);
  1307. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1308. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1309. ath9k_hw_set_interrupts(ah, ah->imask);
  1310. }
  1311. }
  1312. }
  1313. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1314. {
  1315. struct ath_softc *sc = hw->priv;
  1316. struct ath_hw *ah = sc->sc_ah;
  1317. struct ath_common *common = ath9k_hw_common(ah);
  1318. struct ieee80211_conf *conf = &hw->conf;
  1319. bool disable_radio = false;
  1320. mutex_lock(&sc->mutex);
  1321. /*
  1322. * Leave this as the first check because we need to turn on the
  1323. * radio if it was disabled before prior to processing the rest
  1324. * of the changes. Likewise we must only disable the radio towards
  1325. * the end.
  1326. */
  1327. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1328. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1329. if (!sc->ps_idle) {
  1330. ath_radio_enable(sc, hw);
  1331. ath_dbg(common, ATH_DBG_CONFIG,
  1332. "not-idle: enabling radio\n");
  1333. } else {
  1334. disable_radio = true;
  1335. }
  1336. }
  1337. /*
  1338. * We just prepare to enable PS. We have to wait until our AP has
  1339. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1340. * those ACKs and end up retransmitting the same null data frames.
  1341. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1342. */
  1343. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1344. unsigned long flags;
  1345. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1346. if (conf->flags & IEEE80211_CONF_PS)
  1347. ath9k_enable_ps(sc);
  1348. else
  1349. ath9k_disable_ps(sc);
  1350. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1351. }
  1352. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1353. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1354. ath_dbg(common, ATH_DBG_CONFIG,
  1355. "Monitor mode is enabled\n");
  1356. sc->sc_ah->is_monitoring = true;
  1357. } else {
  1358. ath_dbg(common, ATH_DBG_CONFIG,
  1359. "Monitor mode is disabled\n");
  1360. sc->sc_ah->is_monitoring = false;
  1361. }
  1362. }
  1363. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1364. struct ieee80211_channel *curchan = hw->conf.channel;
  1365. int pos = curchan->hw_value;
  1366. int old_pos = -1;
  1367. unsigned long flags;
  1368. if (ah->curchan)
  1369. old_pos = ah->curchan - &ah->channels[0];
  1370. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1371. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1372. else
  1373. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1374. ath_dbg(common, ATH_DBG_CONFIG,
  1375. "Set channel: %d MHz type: %d\n",
  1376. curchan->center_freq, conf->channel_type);
  1377. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1378. curchan, conf->channel_type);
  1379. /* update survey stats for the old channel before switching */
  1380. spin_lock_irqsave(&common->cc_lock, flags);
  1381. ath_update_survey_stats(sc);
  1382. spin_unlock_irqrestore(&common->cc_lock, flags);
  1383. /*
  1384. * If the operating channel changes, change the survey in-use flags
  1385. * along with it.
  1386. * Reset the survey data for the new channel, unless we're switching
  1387. * back to the operating channel from an off-channel operation.
  1388. */
  1389. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1390. sc->cur_survey != &sc->survey[pos]) {
  1391. if (sc->cur_survey)
  1392. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1393. sc->cur_survey = &sc->survey[pos];
  1394. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1395. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1396. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1397. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1398. }
  1399. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1400. ath_err(common, "Unable to set channel\n");
  1401. mutex_unlock(&sc->mutex);
  1402. return -EINVAL;
  1403. }
  1404. /*
  1405. * The most recent snapshot of channel->noisefloor for the old
  1406. * channel is only available after the hardware reset. Copy it to
  1407. * the survey stats now.
  1408. */
  1409. if (old_pos >= 0)
  1410. ath_update_survey_nf(sc, old_pos);
  1411. }
  1412. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1413. ath_dbg(common, ATH_DBG_CONFIG,
  1414. "Set power: %d\n", conf->power_level);
  1415. sc->config.txpowlimit = 2 * conf->power_level;
  1416. ath9k_ps_wakeup(sc);
  1417. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1418. sc->config.txpowlimit, &sc->curtxpow);
  1419. ath9k_ps_restore(sc);
  1420. }
  1421. if (disable_radio) {
  1422. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1423. ath_radio_disable(sc, hw);
  1424. }
  1425. mutex_unlock(&sc->mutex);
  1426. return 0;
  1427. }
  1428. #define SUPPORTED_FILTERS \
  1429. (FIF_PROMISC_IN_BSS | \
  1430. FIF_ALLMULTI | \
  1431. FIF_CONTROL | \
  1432. FIF_PSPOLL | \
  1433. FIF_OTHER_BSS | \
  1434. FIF_BCN_PRBRESP_PROMISC | \
  1435. FIF_PROBE_REQ | \
  1436. FIF_FCSFAIL)
  1437. /* FIXME: sc->sc_full_reset ? */
  1438. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1439. unsigned int changed_flags,
  1440. unsigned int *total_flags,
  1441. u64 multicast)
  1442. {
  1443. struct ath_softc *sc = hw->priv;
  1444. u32 rfilt;
  1445. changed_flags &= SUPPORTED_FILTERS;
  1446. *total_flags &= SUPPORTED_FILTERS;
  1447. sc->rx.rxfilter = *total_flags;
  1448. ath9k_ps_wakeup(sc);
  1449. rfilt = ath_calcrxfilter(sc);
  1450. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1451. ath9k_ps_restore(sc);
  1452. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1453. "Set HW RX filter: 0x%x\n", rfilt);
  1454. }
  1455. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1456. struct ieee80211_vif *vif,
  1457. struct ieee80211_sta *sta)
  1458. {
  1459. struct ath_softc *sc = hw->priv;
  1460. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1461. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1462. struct ieee80211_key_conf ps_key = { };
  1463. ath_node_attach(sc, sta);
  1464. if (vif->type != NL80211_IFTYPE_AP &&
  1465. vif->type != NL80211_IFTYPE_AP_VLAN)
  1466. return 0;
  1467. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1468. return 0;
  1469. }
  1470. static void ath9k_del_ps_key(struct ath_softc *sc,
  1471. struct ieee80211_vif *vif,
  1472. struct ieee80211_sta *sta)
  1473. {
  1474. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1475. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1476. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1477. if (!an->ps_key)
  1478. return;
  1479. ath_key_delete(common, &ps_key);
  1480. }
  1481. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1482. struct ieee80211_vif *vif,
  1483. struct ieee80211_sta *sta)
  1484. {
  1485. struct ath_softc *sc = hw->priv;
  1486. ath9k_del_ps_key(sc, vif, sta);
  1487. ath_node_detach(sc, sta);
  1488. return 0;
  1489. }
  1490. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1491. struct ieee80211_vif *vif,
  1492. enum sta_notify_cmd cmd,
  1493. struct ieee80211_sta *sta)
  1494. {
  1495. struct ath_softc *sc = hw->priv;
  1496. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1497. switch (cmd) {
  1498. case STA_NOTIFY_SLEEP:
  1499. an->sleeping = true;
  1500. if (ath_tx_aggr_sleep(sc, an))
  1501. ieee80211_sta_set_tim(sta);
  1502. break;
  1503. case STA_NOTIFY_AWAKE:
  1504. an->sleeping = false;
  1505. ath_tx_aggr_wakeup(sc, an);
  1506. break;
  1507. }
  1508. }
  1509. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1510. const struct ieee80211_tx_queue_params *params)
  1511. {
  1512. struct ath_softc *sc = hw->priv;
  1513. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1514. struct ath_txq *txq;
  1515. struct ath9k_tx_queue_info qi;
  1516. int ret = 0;
  1517. if (queue >= WME_NUM_AC)
  1518. return 0;
  1519. txq = sc->tx.txq_map[queue];
  1520. ath9k_ps_wakeup(sc);
  1521. mutex_lock(&sc->mutex);
  1522. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1523. qi.tqi_aifs = params->aifs;
  1524. qi.tqi_cwmin = params->cw_min;
  1525. qi.tqi_cwmax = params->cw_max;
  1526. qi.tqi_burstTime = params->txop;
  1527. ath_dbg(common, ATH_DBG_CONFIG,
  1528. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1529. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1530. params->cw_max, params->txop);
  1531. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1532. if (ret)
  1533. ath_err(common, "TXQ Update failed\n");
  1534. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1535. if (queue == WME_AC_BE && !ret)
  1536. ath_beaconq_config(sc);
  1537. mutex_unlock(&sc->mutex);
  1538. ath9k_ps_restore(sc);
  1539. return ret;
  1540. }
  1541. static int ath9k_set_key(struct ieee80211_hw *hw,
  1542. enum set_key_cmd cmd,
  1543. struct ieee80211_vif *vif,
  1544. struct ieee80211_sta *sta,
  1545. struct ieee80211_key_conf *key)
  1546. {
  1547. struct ath_softc *sc = hw->priv;
  1548. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1549. int ret = 0;
  1550. if (ath9k_modparam_nohwcrypt)
  1551. return -ENOSPC;
  1552. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1553. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1554. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1555. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1556. /*
  1557. * For now, disable hw crypto for the RSN IBSS group keys. This
  1558. * could be optimized in the future to use a modified key cache
  1559. * design to support per-STA RX GTK, but until that gets
  1560. * implemented, use of software crypto for group addressed
  1561. * frames is a acceptable to allow RSN IBSS to be used.
  1562. */
  1563. return -EOPNOTSUPP;
  1564. }
  1565. mutex_lock(&sc->mutex);
  1566. ath9k_ps_wakeup(sc);
  1567. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1568. switch (cmd) {
  1569. case SET_KEY:
  1570. if (sta)
  1571. ath9k_del_ps_key(sc, vif, sta);
  1572. ret = ath_key_config(common, vif, sta, key);
  1573. if (ret >= 0) {
  1574. key->hw_key_idx = ret;
  1575. /* push IV and Michael MIC generation to stack */
  1576. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1577. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1578. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1579. if (sc->sc_ah->sw_mgmt_crypto &&
  1580. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1581. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1582. ret = 0;
  1583. }
  1584. break;
  1585. case DISABLE_KEY:
  1586. ath_key_delete(common, key);
  1587. break;
  1588. default:
  1589. ret = -EINVAL;
  1590. }
  1591. ath9k_ps_restore(sc);
  1592. mutex_unlock(&sc->mutex);
  1593. return ret;
  1594. }
  1595. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1596. {
  1597. struct ath_softc *sc = data;
  1598. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1599. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1600. struct ath_vif *avp = (void *)vif->drv_priv;
  1601. /*
  1602. * Skip iteration if primary station vif's bss info
  1603. * was not changed
  1604. */
  1605. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1606. return;
  1607. if (bss_conf->assoc) {
  1608. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1609. avp->primary_sta_vif = true;
  1610. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1611. common->curaid = bss_conf->aid;
  1612. ath9k_hw_write_associd(sc->sc_ah);
  1613. ath_dbg(common, ATH_DBG_CONFIG,
  1614. "Bss Info ASSOC %d, bssid: %pM\n",
  1615. bss_conf->aid, common->curbssid);
  1616. ath_beacon_config(sc, vif);
  1617. /*
  1618. * Request a re-configuration of Beacon related timers
  1619. * on the receipt of the first Beacon frame (i.e.,
  1620. * after time sync with the AP).
  1621. */
  1622. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1623. /* Reset rssi stats */
  1624. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1625. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1626. if (!common->disable_ani) {
  1627. sc->sc_flags |= SC_OP_ANI_RUN;
  1628. ath_start_ani(common);
  1629. }
  1630. }
  1631. }
  1632. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1633. {
  1634. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1635. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1636. struct ath_vif *avp = (void *)vif->drv_priv;
  1637. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1638. return;
  1639. /* Reconfigure bss info */
  1640. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1641. ath_dbg(common, ATH_DBG_CONFIG,
  1642. "Bss Info DISASSOC %d, bssid %pM\n",
  1643. common->curaid, common->curbssid);
  1644. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1645. avp->primary_sta_vif = false;
  1646. memset(common->curbssid, 0, ETH_ALEN);
  1647. common->curaid = 0;
  1648. }
  1649. ieee80211_iterate_active_interfaces_atomic(
  1650. sc->hw, ath9k_bss_iter, sc);
  1651. /*
  1652. * None of station vifs are associated.
  1653. * Clear bssid & aid
  1654. */
  1655. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1656. ath9k_hw_write_associd(sc->sc_ah);
  1657. /* Stop ANI */
  1658. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1659. del_timer_sync(&common->ani.timer);
  1660. }
  1661. }
  1662. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1663. struct ieee80211_vif *vif,
  1664. struct ieee80211_bss_conf *bss_conf,
  1665. u32 changed)
  1666. {
  1667. struct ath_softc *sc = hw->priv;
  1668. struct ath_hw *ah = sc->sc_ah;
  1669. struct ath_common *common = ath9k_hw_common(ah);
  1670. struct ath_vif *avp = (void *)vif->drv_priv;
  1671. int slottime;
  1672. int error;
  1673. ath9k_ps_wakeup(sc);
  1674. mutex_lock(&sc->mutex);
  1675. if (changed & BSS_CHANGED_BSSID) {
  1676. ath9k_config_bss(sc, vif);
  1677. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1678. common->curbssid, common->curaid);
  1679. }
  1680. if (changed & BSS_CHANGED_IBSS) {
  1681. /* There can be only one vif available */
  1682. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1683. common->curaid = bss_conf->aid;
  1684. ath9k_hw_write_associd(sc->sc_ah);
  1685. if (bss_conf->ibss_joined) {
  1686. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1687. if (!common->disable_ani) {
  1688. sc->sc_flags |= SC_OP_ANI_RUN;
  1689. ath_start_ani(common);
  1690. }
  1691. } else {
  1692. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1693. del_timer_sync(&common->ani.timer);
  1694. }
  1695. }
  1696. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1697. if ((changed & BSS_CHANGED_BEACON) ||
  1698. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1699. ath9k_set_beaconing_status(sc, false);
  1700. error = ath_beacon_alloc(sc, vif);
  1701. if (!error)
  1702. ath_beacon_config(sc, vif);
  1703. ath9k_set_beaconing_status(sc, true);
  1704. }
  1705. if (changed & BSS_CHANGED_ERP_SLOT) {
  1706. if (bss_conf->use_short_slot)
  1707. slottime = 9;
  1708. else
  1709. slottime = 20;
  1710. if (vif->type == NL80211_IFTYPE_AP) {
  1711. /*
  1712. * Defer update, so that connected stations can adjust
  1713. * their settings at the same time.
  1714. * See beacon.c for more details
  1715. */
  1716. sc->beacon.slottime = slottime;
  1717. sc->beacon.updateslot = UPDATE;
  1718. } else {
  1719. ah->slottime = slottime;
  1720. ath9k_hw_init_global_settings(ah);
  1721. }
  1722. }
  1723. /* Disable transmission of beacons */
  1724. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1725. !bss_conf->enable_beacon) {
  1726. ath9k_set_beaconing_status(sc, false);
  1727. avp->is_bslot_active = false;
  1728. ath9k_set_beaconing_status(sc, true);
  1729. }
  1730. if (changed & BSS_CHANGED_BEACON_INT) {
  1731. /*
  1732. * In case of AP mode, the HW TSF has to be reset
  1733. * when the beacon interval changes.
  1734. */
  1735. if (vif->type == NL80211_IFTYPE_AP) {
  1736. sc->sc_flags |= SC_OP_TSF_RESET;
  1737. ath9k_set_beaconing_status(sc, false);
  1738. error = ath_beacon_alloc(sc, vif);
  1739. if (!error)
  1740. ath_beacon_config(sc, vif);
  1741. ath9k_set_beaconing_status(sc, true);
  1742. } else
  1743. ath_beacon_config(sc, vif);
  1744. }
  1745. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1746. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1747. bss_conf->use_short_preamble);
  1748. if (bss_conf->use_short_preamble)
  1749. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1750. else
  1751. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1752. }
  1753. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1754. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1755. bss_conf->use_cts_prot);
  1756. if (bss_conf->use_cts_prot &&
  1757. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1758. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1759. else
  1760. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1761. }
  1762. mutex_unlock(&sc->mutex);
  1763. ath9k_ps_restore(sc);
  1764. }
  1765. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1766. {
  1767. struct ath_softc *sc = hw->priv;
  1768. u64 tsf;
  1769. mutex_lock(&sc->mutex);
  1770. ath9k_ps_wakeup(sc);
  1771. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1772. ath9k_ps_restore(sc);
  1773. mutex_unlock(&sc->mutex);
  1774. return tsf;
  1775. }
  1776. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1777. {
  1778. struct ath_softc *sc = hw->priv;
  1779. mutex_lock(&sc->mutex);
  1780. ath9k_ps_wakeup(sc);
  1781. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1782. ath9k_ps_restore(sc);
  1783. mutex_unlock(&sc->mutex);
  1784. }
  1785. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1786. {
  1787. struct ath_softc *sc = hw->priv;
  1788. mutex_lock(&sc->mutex);
  1789. ath9k_ps_wakeup(sc);
  1790. ath9k_hw_reset_tsf(sc->sc_ah);
  1791. ath9k_ps_restore(sc);
  1792. mutex_unlock(&sc->mutex);
  1793. }
  1794. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1795. struct ieee80211_vif *vif,
  1796. enum ieee80211_ampdu_mlme_action action,
  1797. struct ieee80211_sta *sta,
  1798. u16 tid, u16 *ssn, u8 buf_size)
  1799. {
  1800. struct ath_softc *sc = hw->priv;
  1801. int ret = 0;
  1802. local_bh_disable();
  1803. switch (action) {
  1804. case IEEE80211_AMPDU_RX_START:
  1805. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1806. ret = -ENOTSUPP;
  1807. break;
  1808. case IEEE80211_AMPDU_RX_STOP:
  1809. break;
  1810. case IEEE80211_AMPDU_TX_START:
  1811. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1812. return -EOPNOTSUPP;
  1813. ath9k_ps_wakeup(sc);
  1814. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1815. if (!ret)
  1816. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1817. ath9k_ps_restore(sc);
  1818. break;
  1819. case IEEE80211_AMPDU_TX_STOP:
  1820. ath9k_ps_wakeup(sc);
  1821. ath_tx_aggr_stop(sc, sta, tid);
  1822. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1823. ath9k_ps_restore(sc);
  1824. break;
  1825. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1826. ath9k_ps_wakeup(sc);
  1827. ath_tx_aggr_resume(sc, sta, tid);
  1828. ath9k_ps_restore(sc);
  1829. break;
  1830. default:
  1831. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1832. }
  1833. local_bh_enable();
  1834. return ret;
  1835. }
  1836. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1837. struct survey_info *survey)
  1838. {
  1839. struct ath_softc *sc = hw->priv;
  1840. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1841. struct ieee80211_supported_band *sband;
  1842. struct ieee80211_channel *chan;
  1843. unsigned long flags;
  1844. int pos;
  1845. spin_lock_irqsave(&common->cc_lock, flags);
  1846. if (idx == 0)
  1847. ath_update_survey_stats(sc);
  1848. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1849. if (sband && idx >= sband->n_channels) {
  1850. idx -= sband->n_channels;
  1851. sband = NULL;
  1852. }
  1853. if (!sband)
  1854. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1855. if (!sband || idx >= sband->n_channels) {
  1856. spin_unlock_irqrestore(&common->cc_lock, flags);
  1857. return -ENOENT;
  1858. }
  1859. chan = &sband->channels[idx];
  1860. pos = chan->hw_value;
  1861. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1862. survey->channel = chan;
  1863. spin_unlock_irqrestore(&common->cc_lock, flags);
  1864. return 0;
  1865. }
  1866. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1867. {
  1868. struct ath_softc *sc = hw->priv;
  1869. struct ath_hw *ah = sc->sc_ah;
  1870. mutex_lock(&sc->mutex);
  1871. ah->coverage_class = coverage_class;
  1872. ath9k_hw_init_global_settings(ah);
  1873. mutex_unlock(&sc->mutex);
  1874. }
  1875. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1876. {
  1877. struct ath_softc *sc = hw->priv;
  1878. struct ath_hw *ah = sc->sc_ah;
  1879. struct ath_common *common = ath9k_hw_common(ah);
  1880. int timeout = 200; /* ms */
  1881. int i, j;
  1882. bool drain_txq;
  1883. mutex_lock(&sc->mutex);
  1884. cancel_delayed_work_sync(&sc->tx_complete_work);
  1885. if (sc->sc_flags & SC_OP_INVALID) {
  1886. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1887. mutex_unlock(&sc->mutex);
  1888. return;
  1889. }
  1890. if (drop)
  1891. timeout = 1;
  1892. for (j = 0; j < timeout; j++) {
  1893. bool npend = false;
  1894. if (j)
  1895. usleep_range(1000, 2000);
  1896. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1897. if (!ATH_TXQ_SETUP(sc, i))
  1898. continue;
  1899. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1900. if (npend)
  1901. break;
  1902. }
  1903. if (!npend)
  1904. goto out;
  1905. }
  1906. ath9k_ps_wakeup(sc);
  1907. spin_lock_bh(&sc->sc_pcu_lock);
  1908. drain_txq = ath_drain_all_txq(sc, false);
  1909. spin_unlock_bh(&sc->sc_pcu_lock);
  1910. if (!drain_txq)
  1911. ath_reset(sc, false);
  1912. ath9k_ps_restore(sc);
  1913. ieee80211_wake_queues(hw);
  1914. out:
  1915. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1916. mutex_unlock(&sc->mutex);
  1917. }
  1918. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1919. {
  1920. struct ath_softc *sc = hw->priv;
  1921. int i;
  1922. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1923. if (!ATH_TXQ_SETUP(sc, i))
  1924. continue;
  1925. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1926. return true;
  1927. }
  1928. return false;
  1929. }
  1930. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1931. {
  1932. struct ath_softc *sc = hw->priv;
  1933. struct ath_hw *ah = sc->sc_ah;
  1934. struct ieee80211_vif *vif;
  1935. struct ath_vif *avp;
  1936. struct ath_buf *bf;
  1937. struct ath_tx_status ts;
  1938. int status;
  1939. vif = sc->beacon.bslot[0];
  1940. if (!vif)
  1941. return 0;
  1942. avp = (void *)vif->drv_priv;
  1943. if (!avp->is_bslot_active)
  1944. return 0;
  1945. if (!sc->beacon.tx_processed) {
  1946. tasklet_disable(&sc->bcon_tasklet);
  1947. bf = avp->av_bcbuf;
  1948. if (!bf || !bf->bf_mpdu)
  1949. goto skip;
  1950. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1951. if (status == -EINPROGRESS)
  1952. goto skip;
  1953. sc->beacon.tx_processed = true;
  1954. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1955. skip:
  1956. tasklet_enable(&sc->bcon_tasklet);
  1957. }
  1958. return sc->beacon.tx_last;
  1959. }
  1960. struct ieee80211_ops ath9k_ops = {
  1961. .tx = ath9k_tx,
  1962. .start = ath9k_start,
  1963. .stop = ath9k_stop,
  1964. .add_interface = ath9k_add_interface,
  1965. .change_interface = ath9k_change_interface,
  1966. .remove_interface = ath9k_remove_interface,
  1967. .config = ath9k_config,
  1968. .configure_filter = ath9k_configure_filter,
  1969. .sta_add = ath9k_sta_add,
  1970. .sta_remove = ath9k_sta_remove,
  1971. .sta_notify = ath9k_sta_notify,
  1972. .conf_tx = ath9k_conf_tx,
  1973. .bss_info_changed = ath9k_bss_info_changed,
  1974. .set_key = ath9k_set_key,
  1975. .get_tsf = ath9k_get_tsf,
  1976. .set_tsf = ath9k_set_tsf,
  1977. .reset_tsf = ath9k_reset_tsf,
  1978. .ampdu_action = ath9k_ampdu_action,
  1979. .get_survey = ath9k_get_survey,
  1980. .rfkill_poll = ath9k_rfkill_poll_state,
  1981. .set_coverage_class = ath9k_set_coverage_class,
  1982. .flush = ath9k_flush,
  1983. .tx_frames_pending = ath9k_tx_frames_pending,
  1984. .tx_last_beacon = ath9k_tx_last_beacon,
  1985. };