pci.h 6.4 KB

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  1. #ifndef DRIVERS_PCI_H
  2. #define DRIVERS_PCI_H
  3. #define PCI_CFG_SPACE_SIZE 256
  4. #define PCI_CFG_SPACE_EXP_SIZE 4096
  5. /* Functions internal to the PCI core code */
  6. extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
  7. extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  8. extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  9. extern void pci_cleanup_rom(struct pci_dev *dev);
  10. #ifdef HAVE_PCI_MMAP
  11. extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
  12. struct vm_area_struct *vma);
  13. #endif
  14. /**
  15. * Firmware PM callbacks
  16. *
  17. * @is_manageable - returns 'true' if given device is power manageable by the
  18. * platform firmware
  19. *
  20. * @set_state - invokes the platform firmware to set the device's power state
  21. *
  22. * @choose_state - returns PCI power state of given device preferred by the
  23. * platform; to be used during system-wide transitions from a
  24. * sleeping state to the working state and vice versa
  25. *
  26. * @can_wakeup - returns 'true' if given device is capable of waking up the
  27. * system from a sleeping state
  28. *
  29. * @sleep_wake - enables/disables the system wake up capability of given device
  30. *
  31. * If given platform is generally capable of power managing PCI devices, all of
  32. * these callbacks are mandatory.
  33. */
  34. struct pci_platform_pm_ops {
  35. bool (*is_manageable)(struct pci_dev *dev);
  36. int (*set_state)(struct pci_dev *dev, pci_power_t state);
  37. pci_power_t (*choose_state)(struct pci_dev *dev);
  38. bool (*can_wakeup)(struct pci_dev *dev);
  39. int (*sleep_wake)(struct pci_dev *dev, bool enable);
  40. };
  41. extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
  42. extern void pci_pm_init(struct pci_dev *dev);
  43. extern void platform_pci_wakeup_init(struct pci_dev *dev);
  44. extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  45. extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
  46. extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
  47. extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
  48. extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
  49. extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
  50. extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
  51. struct pci_vpd_ops {
  52. ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
  53. ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
  54. void (*release)(struct pci_dev *dev);
  55. };
  56. struct pci_vpd {
  57. unsigned int len;
  58. const struct pci_vpd_ops *ops;
  59. struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
  60. };
  61. extern int pci_vpd_pci22_init(struct pci_dev *dev);
  62. static inline void pci_vpd_release(struct pci_dev *dev)
  63. {
  64. if (dev->vpd)
  65. dev->vpd->ops->release(dev);
  66. }
  67. /* PCI /proc functions */
  68. #ifdef CONFIG_PROC_FS
  69. extern int pci_proc_attach_device(struct pci_dev *dev);
  70. extern int pci_proc_detach_device(struct pci_dev *dev);
  71. extern int pci_proc_detach_bus(struct pci_bus *bus);
  72. #else
  73. static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
  74. static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
  75. static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
  76. #endif
  77. /* Functions for PCI Hotplug drivers to use */
  78. extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
  79. #ifdef HAVE_PCI_LEGACY
  80. extern void pci_create_legacy_files(struct pci_bus *bus);
  81. extern void pci_remove_legacy_files(struct pci_bus *bus);
  82. #else
  83. static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
  84. static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
  85. #endif
  86. /* Lock for read/write access to pci device and bus lists */
  87. extern struct rw_semaphore pci_bus_sem;
  88. extern unsigned int pci_pm_d3_delay;
  89. #ifdef CONFIG_PCI_MSI
  90. void pci_no_msi(void);
  91. extern void pci_msi_init_pci_dev(struct pci_dev *dev);
  92. #else
  93. static inline void pci_no_msi(void) { }
  94. static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
  95. #endif
  96. #ifdef CONFIG_PCIEAER
  97. void pci_no_aer(void);
  98. #else
  99. static inline void pci_no_aer(void) { }
  100. #endif
  101. static inline int pci_no_d1d2(struct pci_dev *dev)
  102. {
  103. unsigned int parent_dstates = 0;
  104. if (dev->bus->self)
  105. parent_dstates = dev->bus->self->no_d1d2;
  106. return (dev->no_d1d2 || parent_dstates);
  107. }
  108. extern int pcie_mch_quirk;
  109. extern struct device_attribute pci_dev_attrs[];
  110. extern struct device_attribute dev_attr_cpuaffinity;
  111. extern struct device_attribute dev_attr_cpulistaffinity;
  112. /**
  113. * pci_match_one_device - Tell if a PCI device structure has a matching
  114. * PCI device id structure
  115. * @id: single PCI device id structure to match
  116. * @dev: the PCI device structure to match against
  117. *
  118. * Returns the matching pci_device_id structure or %NULL if there is no match.
  119. */
  120. static inline const struct pci_device_id *
  121. pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
  122. {
  123. if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
  124. (id->device == PCI_ANY_ID || id->device == dev->device) &&
  125. (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
  126. (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
  127. !((id->class ^ dev->class) & id->class_mask))
  128. return id;
  129. return NULL;
  130. }
  131. struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
  132. /* PCI slot sysfs helper code */
  133. #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
  134. extern struct kset *pci_slots_kset;
  135. struct pci_slot_attribute {
  136. struct attribute attr;
  137. ssize_t (*show)(struct pci_slot *, char *);
  138. ssize_t (*store)(struct pci_slot *, const char *, size_t);
  139. };
  140. #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
  141. enum pci_bar_type {
  142. pci_bar_unknown, /* Standard PCI BAR probe */
  143. pci_bar_io, /* An io port BAR */
  144. pci_bar_mem32, /* A 32-bit memory BAR */
  145. pci_bar_mem64, /* A 64-bit memory BAR */
  146. };
  147. extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
  148. struct resource *res, unsigned int reg);
  149. extern int pci_resource_bar(struct pci_dev *dev, int resno,
  150. enum pci_bar_type *type);
  151. extern int pci_bus_add_child(struct pci_bus *bus);
  152. extern void pci_enable_ari(struct pci_dev *dev);
  153. /**
  154. * pci_ari_enabled - query ARI forwarding status
  155. * @bus: the PCI bus
  156. *
  157. * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
  158. */
  159. static inline int pci_ari_enabled(struct pci_bus *bus)
  160. {
  161. return bus->self && bus->self->ari_enabled;
  162. }
  163. #endif /* DRIVERS_PCI_H */