Kconfig 2.1 KB

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  1. config STMMAC_ETH
  2. tristate "STMicroelectronics 10/100/1000 Ethernet driver"
  3. depends on HAS_IOMEM
  4. select NET_CORE
  5. select MII
  6. select PHYLIB
  7. select CRC32
  8. ---help---
  9. This is the driver for the Ethernet IPs are built around a
  10. Synopsys IP Core and only tested on the STMicroelectronics
  11. platforms.
  12. if STMMAC_ETH
  13. config STMMAC_DEBUG_FS
  14. bool "Enable monitoring via sysFS "
  15. default n
  16. depends on STMMAC_ETH && DEBUG_FS
  17. -- help
  18. The stmmac entry in /sys reports DMA TX/RX rings
  19. or (if supported) the HW cap register.
  20. config STMMAC_DA
  21. bool "STMMAC DMA arbitration scheme"
  22. default n
  23. ---help---
  24. Selecting this option, rx has priority over Tx (only for Giga
  25. Ethernet device).
  26. By default, the DMA arbitration scheme is based on Round-robin
  27. (rx:tx priority is 1:1).
  28. config STMMAC_DUAL_MAC
  29. bool "STMMAC: dual mac support (EXPERIMENTAL)"
  30. default n
  31. depends on EXPERIMENTAL && STMMAC_ETH && !STMMAC_TIMER
  32. ---help---
  33. Some ST SoCs (for example the stx7141 and stx7200c2) have two
  34. Ethernet Controllers. This option turns on the second Ethernet
  35. device on this kind of platforms.
  36. config STMMAC_TIMER
  37. bool "STMMAC Timer optimisation"
  38. default n
  39. depends on RTC_HCTOSYS_DEVICE
  40. ---help---
  41. Use an external timer for mitigating the number of network
  42. interrupts. Currently, for SH architectures, it is possible
  43. to use the TMU channel 2 and the SH-RTC device.
  44. choice
  45. prompt "Select Timer device"
  46. depends on STMMAC_TIMER
  47. config STMMAC_TMU_TIMER
  48. bool "TMU channel 2"
  49. depends on CPU_SH4
  50. ---help---
  51. config STMMAC_RTC_TIMER
  52. bool "Real time clock"
  53. depends on RTC_CLASS
  54. ---help---
  55. endchoice
  56. choice
  57. prompt "Select the DMA TX/RX descriptor operating modes"
  58. depends on STMMAC_ETH
  59. ---help---
  60. This driver supports DMA descriptor to operate both in dual buffer
  61. (RING) and linked-list(CHAINED) mode. In RING mode each descriptor
  62. points to two data buffer pointers whereas in CHAINED mode they
  63. points to only one data buffer pointer.
  64. config STMMAC_RING
  65. bool "Enable Descriptor Ring Mode"
  66. config STMMAC_CHAINED
  67. bool "Enable Descriptor Chained Mode"
  68. endchoice
  69. endif