init.c 32 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/sdio_func.h>
  17. #include "core.h"
  18. #include "cfg80211.h"
  19. #include "target.h"
  20. #include "debug.h"
  21. #include "hif-ops.h"
  22. unsigned int debug_mask;
  23. module_param(debug_mask, uint, 0644);
  24. /*
  25. * Include definitions here that can be used to tune the WLAN module
  26. * behavior. Different customers can tune the behavior as per their needs,
  27. * here.
  28. */
  29. /*
  30. * This configuration item enable/disable keepalive support.
  31. * Keepalive support: In the absence of any data traffic to AP, null
  32. * frames will be sent to the AP at periodic interval, to keep the association
  33. * active. This configuration item defines the periodic interval.
  34. * Use value of zero to disable keepalive support
  35. * Default: 60 seconds
  36. */
  37. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  38. /*
  39. * This configuration item sets the value of disconnect timeout
  40. * Firmware delays sending the disconnec event to the host for this
  41. * timeout after is gets disconnected from the current AP.
  42. * If the firmware successly roams within the disconnect timeout
  43. * it sends a new connect event
  44. */
  45. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  46. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  47. enum addr_type {
  48. DATASET_PATCH_ADDR,
  49. APP_LOAD_ADDR,
  50. APP_START_OVERRIDE_ADDR,
  51. };
  52. #define ATH6KL_DATA_OFFSET 64
  53. struct sk_buff *ath6kl_buf_alloc(int size)
  54. {
  55. struct sk_buff *skb;
  56. u16 reserved;
  57. /* Add chacheline space at front and back of buffer */
  58. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  59. sizeof(struct htc_packet);
  60. skb = dev_alloc_skb(size + reserved);
  61. if (skb)
  62. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  63. return skb;
  64. }
  65. void ath6kl_init_profile_info(struct ath6kl *ar)
  66. {
  67. ar->ssid_len = 0;
  68. memset(ar->ssid, 0, sizeof(ar->ssid));
  69. ar->dot11_auth_mode = OPEN_AUTH;
  70. ar->auth_mode = NONE_AUTH;
  71. ar->prwise_crypto = NONE_CRYPT;
  72. ar->prwise_crypto_len = 0;
  73. ar->grp_crypto = NONE_CRYPT;
  74. ar->grp_crpto_len = 0;
  75. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  76. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  77. memset(ar->bssid, 0, sizeof(ar->bssid));
  78. ar->bss_ch = 0;
  79. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  80. }
  81. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  82. {
  83. switch (ar->nw_type) {
  84. case INFRA_NETWORK:
  85. return HI_OPTION_FW_MODE_BSS_STA;
  86. case ADHOC_NETWORK:
  87. return HI_OPTION_FW_MODE_IBSS;
  88. case AP_NETWORK:
  89. return HI_OPTION_FW_MODE_AP;
  90. default:
  91. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  92. return 0xff;
  93. }
  94. }
  95. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  96. u32 item_offset)
  97. {
  98. u32 addr = 0;
  99. if (ar->target_type == TARGET_TYPE_AR6003)
  100. addr = ATH6KL_HI_START_ADDR + item_offset;
  101. return addr;
  102. }
  103. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  104. {
  105. u32 address, data;
  106. struct host_app_area host_app_area;
  107. /* Fetch the address of the host_app_area_s
  108. * instance in the host interest area */
  109. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  110. address = TARG_VTOP(address);
  111. if (ath6kl_read_reg_diag(ar, &address, &data))
  112. return -EIO;
  113. address = TARG_VTOP(data);
  114. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  115. if (ath6kl_access_datadiag(ar, address,
  116. (u8 *)&host_app_area,
  117. sizeof(struct host_app_area), false))
  118. return -EIO;
  119. return 0;
  120. }
  121. static inline void set_ac2_ep_map(struct ath6kl *ar,
  122. u8 ac,
  123. enum htc_endpoint_id ep)
  124. {
  125. ar->ac2ep_map[ac] = ep;
  126. ar->ep2ac_map[ep] = ac;
  127. }
  128. /* connect to a service */
  129. static int ath6kl_connectservice(struct ath6kl *ar,
  130. struct htc_service_connect_req *con_req,
  131. char *desc)
  132. {
  133. int status;
  134. struct htc_service_connect_resp response;
  135. memset(&response, 0, sizeof(response));
  136. status = htc_conn_service(ar->htc_target, con_req, &response);
  137. if (status) {
  138. ath6kl_err("failed to connect to %s service status:%d\n",
  139. desc, status);
  140. return status;
  141. }
  142. switch (con_req->svc_id) {
  143. case WMI_CONTROL_SVC:
  144. if (test_bit(WMI_ENABLED, &ar->flag))
  145. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  146. ar->ctrl_ep = response.endpoint;
  147. break;
  148. case WMI_DATA_BE_SVC:
  149. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  150. break;
  151. case WMI_DATA_BK_SVC:
  152. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  153. break;
  154. case WMI_DATA_VI_SVC:
  155. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  156. break;
  157. case WMI_DATA_VO_SVC:
  158. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  159. break;
  160. default:
  161. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  162. return -EINVAL;
  163. }
  164. return 0;
  165. }
  166. static int ath6kl_init_service_ep(struct ath6kl *ar)
  167. {
  168. struct htc_service_connect_req connect;
  169. memset(&connect, 0, sizeof(connect));
  170. /* these fields are the same for all service endpoints */
  171. connect.ep_cb.rx = ath6kl_rx;
  172. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  173. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  174. /*
  175. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  176. * gets called.
  177. */
  178. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  179. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  180. if (!connect.ep_cb.rx_refill_thresh)
  181. connect.ep_cb.rx_refill_thresh++;
  182. /* connect to control service */
  183. connect.svc_id = WMI_CONTROL_SVC;
  184. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  185. return -EIO;
  186. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  187. /*
  188. * Limit the HTC message size on the send path, although e can
  189. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  190. * (802.3) frames on the send path.
  191. */
  192. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  193. /*
  194. * To reduce the amount of committed memory for larger A_MSDU
  195. * frames, use the recv-alloc threshold mechanism for larger
  196. * packets.
  197. */
  198. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  199. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  200. /*
  201. * For the remaining data services set the connection flag to
  202. * reduce dribbling, if configured to do so.
  203. */
  204. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  205. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  206. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  207. connect.svc_id = WMI_DATA_BE_SVC;
  208. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  209. return -EIO;
  210. /* connect to back-ground map this to WMI LOW_PRI */
  211. connect.svc_id = WMI_DATA_BK_SVC;
  212. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  213. return -EIO;
  214. /* connect to Video service, map this to to HI PRI */
  215. connect.svc_id = WMI_DATA_VI_SVC;
  216. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  217. return -EIO;
  218. /*
  219. * Connect to VO service, this is currently not mapped to a WMI
  220. * priority stream due to historical reasons. WMI originally
  221. * defined 3 priorities over 3 mailboxes We can change this when
  222. * WMI is reworked so that priorities are not dependent on
  223. * mailboxes.
  224. */
  225. connect.svc_id = WMI_DATA_VO_SVC;
  226. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  227. return -EIO;
  228. return 0;
  229. }
  230. static void ath6kl_init_control_info(struct ath6kl *ar)
  231. {
  232. u8 ctr;
  233. clear_bit(WMI_ENABLED, &ar->flag);
  234. ath6kl_init_profile_info(ar);
  235. ar->def_txkey_index = 0;
  236. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  237. ar->ch_hint = 0;
  238. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  239. ar->listen_intvl_b = 0;
  240. ar->tx_pwr = 0;
  241. clear_bit(SKIP_SCAN, &ar->flag);
  242. set_bit(WMM_ENABLED, &ar->flag);
  243. ar->intra_bss = 1;
  244. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  245. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  246. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  247. memset((u8 *)ar->sta_list, 0,
  248. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  249. spin_lock_init(&ar->mcastpsq_lock);
  250. /* Init the PS queues */
  251. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  252. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  253. skb_queue_head_init(&ar->sta_list[ctr].psq);
  254. }
  255. skb_queue_head_init(&ar->mcastpsq);
  256. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  257. }
  258. /*
  259. * Set HTC/Mbox operational parameters, this can only be called when the
  260. * target is in the BMI phase.
  261. */
  262. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  263. u8 htc_ctrl_buf)
  264. {
  265. int status;
  266. u32 blk_size;
  267. blk_size = ar->mbox_info.block_size;
  268. if (htc_ctrl_buf)
  269. blk_size |= ((u32)htc_ctrl_buf) << 16;
  270. /* set the host interest area for the block size */
  271. status = ath6kl_bmi_write(ar,
  272. ath6kl_get_hi_item_addr(ar,
  273. HI_ITEM(hi_mbox_io_block_sz)),
  274. (u8 *)&blk_size,
  275. 4);
  276. if (status) {
  277. ath6kl_err("bmi_write_memory for IO block size failed\n");
  278. goto out;
  279. }
  280. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  281. blk_size,
  282. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  283. if (mbox_isr_yield_val) {
  284. /* set the host interest area for the mbox ISR yield limit */
  285. status = ath6kl_bmi_write(ar,
  286. ath6kl_get_hi_item_addr(ar,
  287. HI_ITEM(hi_mbox_isr_yield_limit)),
  288. (u8 *)&mbox_isr_yield_val,
  289. 4);
  290. if (status) {
  291. ath6kl_err("bmi_write_memory for yield limit failed\n");
  292. goto out;
  293. }
  294. }
  295. out:
  296. return status;
  297. }
  298. #define REG_DUMP_COUNT_AR6003 60
  299. #define REGISTER_DUMP_LEN_MAX 60
  300. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  301. {
  302. u32 address;
  303. u32 regdump_loc = 0;
  304. int status;
  305. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  306. u32 i;
  307. if (ar->target_type != TARGET_TYPE_AR6003)
  308. return;
  309. /* the reg dump pointer is copied to the host interest area */
  310. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  311. address = TARG_VTOP(address);
  312. /* read RAM location through diagnostic window */
  313. status = ath6kl_read_reg_diag(ar, &address, &regdump_loc);
  314. if (status || !regdump_loc) {
  315. ath6kl_err("failed to get ptr to register dump area\n");
  316. return;
  317. }
  318. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  319. regdump_loc);
  320. regdump_loc = TARG_VTOP(regdump_loc);
  321. /* fetch register dump data */
  322. status = ath6kl_access_datadiag(ar,
  323. regdump_loc,
  324. (u8 *)&regdump_val[0],
  325. REG_DUMP_COUNT_AR6003 * (sizeof(u32)),
  326. true);
  327. if (status) {
  328. ath6kl_err("failed to get register dump\n");
  329. return;
  330. }
  331. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  332. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  333. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  334. i, regdump_val[i]);
  335. }
  336. void ath6kl_target_failure(struct ath6kl *ar)
  337. {
  338. ath6kl_err("target asserted\n");
  339. /* try dumping target assertion information (if any) */
  340. ath6kl_dump_target_assert_info(ar);
  341. }
  342. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  343. {
  344. int status = 0;
  345. /*
  346. * Configure the device for rx dot11 header rules. "0,0" are the
  347. * default values. Required if checksum offload is needed. Set
  348. * RxMetaVersion to 2.
  349. */
  350. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  351. ar->rx_meta_ver, 0, 0)) {
  352. ath6kl_err("unable to set the rx frame format\n");
  353. status = -EIO;
  354. }
  355. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  356. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  357. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  358. ath6kl_err("unable to set power save fail event policy\n");
  359. status = -EIO;
  360. }
  361. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  362. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  363. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  364. ath6kl_err("unable to set barker preamble policy\n");
  365. status = -EIO;
  366. }
  367. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  368. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  369. ath6kl_err("unable to set keep alive interval\n");
  370. status = -EIO;
  371. }
  372. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  373. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  374. ath6kl_err("unable to set disconnect timeout\n");
  375. status = -EIO;
  376. }
  377. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  378. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  379. ath6kl_err("unable to set txop bursting\n");
  380. status = -EIO;
  381. }
  382. return status;
  383. }
  384. int ath6kl_configure_target(struct ath6kl *ar)
  385. {
  386. u32 param, ram_reserved_size;
  387. u8 fw_iftype;
  388. fw_iftype = ath6kl_get_fw_iftype(ar);
  389. if (fw_iftype == 0xff)
  390. return -EINVAL;
  391. /* Tell target which HTC version it is used*/
  392. param = HTC_PROTOCOL_VERSION;
  393. if (ath6kl_bmi_write(ar,
  394. ath6kl_get_hi_item_addr(ar,
  395. HI_ITEM(hi_app_host_interest)),
  396. (u8 *)&param, 4) != 0) {
  397. ath6kl_err("bmi_write_memory for htc version failed\n");
  398. return -EIO;
  399. }
  400. /* set the firmware mode to STA/IBSS/AP */
  401. param = 0;
  402. if (ath6kl_bmi_read(ar,
  403. ath6kl_get_hi_item_addr(ar,
  404. HI_ITEM(hi_option_flag)),
  405. (u8 *)&param, 4) != 0) {
  406. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  407. return -EIO;
  408. }
  409. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  410. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  411. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  412. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  413. if (ath6kl_bmi_write(ar,
  414. ath6kl_get_hi_item_addr(ar,
  415. HI_ITEM(hi_option_flag)),
  416. (u8 *)&param,
  417. 4) != 0) {
  418. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  419. return -EIO;
  420. }
  421. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  422. /*
  423. * Hardcode the address use for the extended board data
  424. * Ideally this should be pre-allocate by the OS at boot time
  425. * But since it is a new feature and board data is loaded
  426. * at init time, we have to workaround this from host.
  427. * It is difficult to patch the firmware boot code,
  428. * but possible in theory.
  429. */
  430. if (ar->target_type == TARGET_TYPE_AR6003) {
  431. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  432. param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  433. ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE;
  434. } else {
  435. param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  436. ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE;
  437. }
  438. if (ath6kl_bmi_write(ar,
  439. ath6kl_get_hi_item_addr(ar,
  440. HI_ITEM(hi_board_ext_data)),
  441. (u8 *)&param, 4) != 0) {
  442. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  443. return -EIO;
  444. }
  445. if (ath6kl_bmi_write(ar,
  446. ath6kl_get_hi_item_addr(ar,
  447. HI_ITEM(hi_end_ram_reserve_sz)),
  448. (u8 *)&ram_reserved_size, 4) != 0) {
  449. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  450. return -EIO;
  451. }
  452. }
  453. /* set the block size for the target */
  454. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  455. /* use default number of control buffers */
  456. return -EIO;
  457. return 0;
  458. }
  459. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  460. {
  461. struct net_device *dev;
  462. struct ath6kl *ar;
  463. struct wireless_dev *wdev;
  464. wdev = ath6kl_cfg80211_init(sdev);
  465. if (!wdev) {
  466. ath6kl_err("ath6kl_cfg80211_init failed\n");
  467. return NULL;
  468. }
  469. ar = wdev_priv(wdev);
  470. ar->dev = sdev;
  471. ar->wdev = wdev;
  472. wdev->iftype = NL80211_IFTYPE_STATION;
  473. dev = alloc_netdev(0, "wlan%d", ether_setup);
  474. if (!dev) {
  475. ath6kl_err("no memory for network device instance\n");
  476. ath6kl_cfg80211_deinit(ar);
  477. return NULL;
  478. }
  479. dev->ieee80211_ptr = wdev;
  480. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  481. wdev->netdev = dev;
  482. ar->sme_state = SME_DISCONNECTED;
  483. ar->auto_auth_stage = AUTH_IDLE;
  484. init_netdev(dev);
  485. ar->net_dev = dev;
  486. set_bit(WLAN_ENABLED, &ar->flag);
  487. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  488. spin_lock_init(&ar->lock);
  489. ath6kl_init_control_info(ar);
  490. init_waitqueue_head(&ar->event_wq);
  491. sema_init(&ar->sem, 1);
  492. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  493. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  494. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  495. (unsigned long) dev);
  496. return ar;
  497. }
  498. int ath6kl_unavail_ev(struct ath6kl *ar)
  499. {
  500. ath6kl_destroy(ar->net_dev, 1);
  501. return 0;
  502. }
  503. /* firmware upload */
  504. static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type)
  505. {
  506. WARN_ON(target_ver != AR6003_REV2_VERSION &&
  507. target_ver != AR6003_REV3_VERSION);
  508. switch (type) {
  509. case DATASET_PATCH_ADDR:
  510. return (target_ver == AR6003_REV2_VERSION) ?
  511. AR6003_REV2_DATASET_PATCH_ADDRESS :
  512. AR6003_REV3_DATASET_PATCH_ADDRESS;
  513. case APP_LOAD_ADDR:
  514. return (target_ver == AR6003_REV2_VERSION) ?
  515. AR6003_REV2_APP_LOAD_ADDRESS :
  516. 0x1234;
  517. case APP_START_OVERRIDE_ADDR:
  518. return (target_ver == AR6003_REV2_VERSION) ?
  519. AR6003_REV2_APP_START_OVERRIDE :
  520. AR6003_REV3_APP_START_OVERRIDE;
  521. default:
  522. return 0;
  523. }
  524. }
  525. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  526. u8 **fw, size_t *fw_len)
  527. {
  528. const struct firmware *fw_entry;
  529. int ret;
  530. ret = request_firmware(&fw_entry, filename, ar->dev);
  531. if (ret)
  532. return ret;
  533. *fw_len = fw_entry->size;
  534. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  535. if (*fw == NULL)
  536. ret = -ENOMEM;
  537. release_firmware(fw_entry);
  538. return ret;
  539. }
  540. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  541. {
  542. const char *filename;
  543. int ret;
  544. switch (ar->version.target_ver) {
  545. case AR6003_REV2_VERSION:
  546. filename = AR6003_REV2_BOARD_DATA_FILE;
  547. break;
  548. default:
  549. filename = AR6003_REV3_BOARD_DATA_FILE;
  550. break;
  551. }
  552. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  553. &ar->fw_board_len);
  554. if (ret == 0) {
  555. /* managed to get proper board file */
  556. return 0;
  557. }
  558. /* there was no proper board file, try to use default instead */
  559. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  560. filename, ret);
  561. switch (ar->version.target_ver) {
  562. case AR6003_REV2_VERSION:
  563. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  564. break;
  565. default:
  566. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  567. break;
  568. }
  569. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  570. &ar->fw_board_len);
  571. if (ret) {
  572. ath6kl_err("Failed to get default board file %s: %d\n",
  573. filename, ret);
  574. return ret;
  575. }
  576. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  577. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  578. return 0;
  579. }
  580. static int ath6kl_upload_board_file(struct ath6kl *ar)
  581. {
  582. u32 board_address, board_ext_address, param;
  583. int ret;
  584. if (ar->fw_board == NULL) {
  585. ret = ath6kl_fetch_board_file(ar);
  586. if (ret)
  587. return ret;
  588. }
  589. /* Determine where in Target RAM to write Board Data */
  590. ath6kl_bmi_read(ar,
  591. ath6kl_get_hi_item_addr(ar,
  592. HI_ITEM(hi_board_data)),
  593. (u8 *) &board_address, 4);
  594. ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n",
  595. board_address);
  596. /* determine where in target ram to write extended board data */
  597. ath6kl_bmi_read(ar,
  598. ath6kl_get_hi_item_addr(ar,
  599. HI_ITEM(hi_board_ext_data)),
  600. (u8 *) &board_ext_address, 4);
  601. ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n",
  602. board_ext_address);
  603. if (board_ext_address == 0) {
  604. ath6kl_err("Failed to get board file target address.\n");
  605. return -EINVAL;
  606. }
  607. if (ar->fw_board_len == (AR6003_BOARD_DATA_SZ +
  608. AR6003_BOARD_EXT_DATA_SZ)) {
  609. /* write extended board data */
  610. ret = ath6kl_bmi_write(ar, board_ext_address,
  611. ar->fw_board + AR6003_BOARD_DATA_SZ,
  612. AR6003_BOARD_EXT_DATA_SZ);
  613. if (ret) {
  614. ath6kl_err("Failed to write extended board data: %d\n",
  615. ret);
  616. return ret;
  617. }
  618. /* record that extended board data is initialized */
  619. param = (AR6003_BOARD_EXT_DATA_SZ << 16) | 1;
  620. ath6kl_bmi_write(ar,
  621. ath6kl_get_hi_item_addr(ar,
  622. HI_ITEM(hi_board_ext_data_config)),
  623. (unsigned char *) &param, 4);
  624. }
  625. if (ar->fw_board_len < AR6003_BOARD_DATA_SZ) {
  626. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  627. ret = -EINVAL;
  628. return ret;
  629. }
  630. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  631. AR6003_BOARD_DATA_SZ);
  632. if (ret) {
  633. ath6kl_err("Board file bmi write failed: %d\n", ret);
  634. return ret;
  635. }
  636. /* record the fact that Board Data IS initialized */
  637. param = 1;
  638. ath6kl_bmi_write(ar,
  639. ath6kl_get_hi_item_addr(ar,
  640. HI_ITEM(hi_board_data_initialized)),
  641. (u8 *)&param, 4);
  642. return ret;
  643. }
  644. static int ath6kl_upload_otp(struct ath6kl *ar)
  645. {
  646. const char *filename;
  647. u32 address, param;
  648. int ret;
  649. switch (ar->version.target_ver) {
  650. case AR6003_REV2_VERSION:
  651. filename = AR6003_REV2_OTP_FILE;
  652. break;
  653. default:
  654. filename = AR6003_REV3_OTP_FILE;
  655. break;
  656. }
  657. if (ar->fw_otp == NULL) {
  658. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  659. &ar->fw_otp_len);
  660. if (ret) {
  661. ath6kl_err("Failed to get OTP file %s: %d\n",
  662. filename, ret);
  663. return ret;
  664. }
  665. }
  666. address = ath6kl_get_load_address(ar->version.target_ver,
  667. APP_LOAD_ADDR);
  668. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  669. ar->fw_otp_len);
  670. if (ret) {
  671. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  672. return ret;
  673. }
  674. /* execute the OTP code */
  675. param = 0;
  676. address = ath6kl_get_load_address(ar->version.target_ver,
  677. APP_START_OVERRIDE_ADDR);
  678. ath6kl_bmi_execute(ar, address, &param);
  679. return ret;
  680. }
  681. static int ath6kl_upload_firmware(struct ath6kl *ar)
  682. {
  683. const char *filename;
  684. u32 address;
  685. int ret;
  686. switch (ar->version.target_ver) {
  687. case AR6003_REV2_VERSION:
  688. filename = AR6003_REV2_FIRMWARE_FILE;
  689. break;
  690. default:
  691. filename = AR6003_REV3_FIRMWARE_FILE;
  692. break;
  693. }
  694. if (ar->fw == NULL) {
  695. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  696. if (ret) {
  697. ath6kl_err("Failed to get firmware file %s: %d\n",
  698. filename, ret);
  699. return ret;
  700. }
  701. }
  702. address = ath6kl_get_load_address(ar->version.target_ver,
  703. APP_LOAD_ADDR);
  704. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  705. if (ret) {
  706. ath6kl_err("Failed to write firmware: %d\n", ret);
  707. return ret;
  708. }
  709. /* Set starting address for firmware */
  710. address = ath6kl_get_load_address(ar->version.target_ver,
  711. APP_START_OVERRIDE_ADDR);
  712. ath6kl_bmi_set_app_start(ar, address);
  713. return ret;
  714. }
  715. static int ath6kl_upload_patch(struct ath6kl *ar)
  716. {
  717. const char *filename;
  718. u32 address, param;
  719. int ret;
  720. switch (ar->version.target_ver) {
  721. case AR6003_REV2_VERSION:
  722. filename = AR6003_REV2_PATCH_FILE;
  723. break;
  724. default:
  725. filename = AR6003_REV3_PATCH_FILE;
  726. break;
  727. }
  728. if (ar->fw_patch == NULL) {
  729. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  730. &ar->fw_patch_len);
  731. if (ret) {
  732. ath6kl_err("Failed to get patch file %s: %d\n",
  733. filename, ret);
  734. return ret;
  735. }
  736. }
  737. address = ath6kl_get_load_address(ar->version.target_ver,
  738. DATASET_PATCH_ADDR);
  739. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  740. if (ret) {
  741. ath6kl_err("Failed to write patch file: %d\n", ret);
  742. return ret;
  743. }
  744. param = address;
  745. ath6kl_bmi_write(ar,
  746. ath6kl_get_hi_item_addr(ar,
  747. HI_ITEM(hi_dset_list_head)),
  748. (unsigned char *) &param, 4);
  749. return 0;
  750. }
  751. static int ath6kl_init_upload(struct ath6kl *ar)
  752. {
  753. u32 param, options, sleep, address;
  754. int status = 0;
  755. if (ar->target_type != TARGET_TYPE_AR6003)
  756. return -EINVAL;
  757. /* temporarily disable system sleep */
  758. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  759. status = ath6kl_bmi_reg_read(ar, address, &param);
  760. if (status)
  761. return status;
  762. options = param;
  763. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  764. status = ath6kl_bmi_reg_write(ar, address, param);
  765. if (status)
  766. return status;
  767. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  768. status = ath6kl_bmi_reg_read(ar, address, &param);
  769. if (status)
  770. return status;
  771. sleep = param;
  772. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  773. status = ath6kl_bmi_reg_write(ar, address, param);
  774. if (status)
  775. return status;
  776. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  777. options, sleep);
  778. /* program analog PLL register */
  779. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  780. 0xF9104001);
  781. if (status)
  782. return status;
  783. /* Run at 80/88MHz by default */
  784. param = SM(CPU_CLOCK_STANDARD, 1);
  785. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  786. status = ath6kl_bmi_reg_write(ar, address, param);
  787. if (status)
  788. return status;
  789. param = 0;
  790. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  791. param = SM(LPO_CAL_ENABLE, 1);
  792. status = ath6kl_bmi_reg_write(ar, address, param);
  793. if (status)
  794. return status;
  795. /* WAR to avoid SDIO CRC err */
  796. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  797. ath6kl_err("temporary war to avoid sdio crc error\n");
  798. param = 0x20;
  799. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  800. status = ath6kl_bmi_reg_write(ar, address, param);
  801. if (status)
  802. return status;
  803. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  804. status = ath6kl_bmi_reg_write(ar, address, param);
  805. if (status)
  806. return status;
  807. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  808. status = ath6kl_bmi_reg_write(ar, address, param);
  809. if (status)
  810. return status;
  811. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  812. status = ath6kl_bmi_reg_write(ar, address, param);
  813. if (status)
  814. return status;
  815. }
  816. /* write EEPROM data to Target RAM */
  817. status = ath6kl_upload_board_file(ar);
  818. if (status)
  819. return status;
  820. /* transfer One time Programmable data */
  821. status = ath6kl_upload_otp(ar);
  822. if (status)
  823. return status;
  824. /* Download Target firmware */
  825. status = ath6kl_upload_firmware(ar);
  826. if (status)
  827. return status;
  828. status = ath6kl_upload_patch(ar);
  829. if (status)
  830. return status;
  831. /* Restore system sleep */
  832. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  833. status = ath6kl_bmi_reg_write(ar, address, sleep);
  834. if (status)
  835. return status;
  836. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  837. param = options | 0x20;
  838. status = ath6kl_bmi_reg_write(ar, address, param);
  839. if (status)
  840. return status;
  841. /* Configure GPIO AR6003 UART */
  842. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  843. status = ath6kl_bmi_write(ar,
  844. ath6kl_get_hi_item_addr(ar,
  845. HI_ITEM(hi_dbg_uart_txpin)),
  846. (u8 *)&param, 4);
  847. return status;
  848. }
  849. static int ath6kl_init(struct net_device *dev)
  850. {
  851. struct ath6kl *ar = ath6kl_priv(dev);
  852. int status = 0;
  853. s32 timeleft;
  854. if (!ar)
  855. return -EIO;
  856. /* Do we need to finish the BMI phase */
  857. if (ath6kl_bmi_done(ar)) {
  858. status = -EIO;
  859. goto ath6kl_init_done;
  860. }
  861. /* Indicate that WMI is enabled (although not ready yet) */
  862. set_bit(WMI_ENABLED, &ar->flag);
  863. ar->wmi = ath6kl_wmi_init(ar);
  864. if (!ar->wmi) {
  865. ath6kl_err("failed to initialize wmi\n");
  866. status = -EIO;
  867. goto ath6kl_init_done;
  868. }
  869. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  870. /*
  871. * The reason we have to wait for the target here is that the
  872. * driver layer has to init BMI in order to set the host block
  873. * size.
  874. */
  875. if (htc_wait_target(ar->htc_target)) {
  876. status = -EIO;
  877. goto err_wmi_cleanup;
  878. }
  879. if (ath6kl_init_service_ep(ar)) {
  880. status = -EIO;
  881. goto err_cleanup_scatter;
  882. }
  883. /* setup access class priority mappings */
  884. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  885. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  886. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  887. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  888. /* give our connected endpoints some buffers */
  889. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  890. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  891. /* allocate some buffers that handle larger AMSDU frames */
  892. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  893. /* setup credit distribution */
  894. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  895. ath6kl_cookie_init(ar);
  896. /* start HTC */
  897. status = htc_start(ar->htc_target);
  898. if (status) {
  899. ath6kl_cookie_cleanup(ar);
  900. goto err_rxbuf_cleanup;
  901. }
  902. /* Wait for Wmi event to be ready */
  903. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  904. test_bit(WMI_READY,
  905. &ar->flag),
  906. WMI_TIMEOUT);
  907. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  908. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  909. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  910. status = -EIO;
  911. goto err_htc_stop;
  912. }
  913. if (!timeleft || signal_pending(current)) {
  914. ath6kl_err("wmi is not ready or wait was interrupted\n");
  915. status = -EIO;
  916. goto err_htc_stop;
  917. }
  918. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  919. /* communicate the wmi protocol verision to the target */
  920. if ((ath6kl_set_host_app_area(ar)) != 0)
  921. ath6kl_err("unable to set the host app area\n");
  922. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  923. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  924. status = ath6kl_target_config_wlan_params(ar);
  925. if (!status)
  926. goto ath6kl_init_done;
  927. err_htc_stop:
  928. htc_stop(ar->htc_target);
  929. err_rxbuf_cleanup:
  930. htc_flush_rx_buf(ar->htc_target);
  931. ath6kl_cleanup_amsdu_rxbufs(ar);
  932. err_cleanup_scatter:
  933. ath6kl_hif_cleanup_scatter(ar);
  934. err_wmi_cleanup:
  935. ath6kl_wmi_shutdown(ar->wmi);
  936. clear_bit(WMI_ENABLED, &ar->flag);
  937. ar->wmi = NULL;
  938. ath6kl_init_done:
  939. return status;
  940. }
  941. int ath6kl_core_init(struct ath6kl *ar)
  942. {
  943. int ret = 0;
  944. struct ath6kl_bmi_target_info targ_info;
  945. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  946. if (!ar->ath6kl_wq)
  947. return -ENOMEM;
  948. ret = ath6kl_bmi_init(ar);
  949. if (ret)
  950. goto err_wq;
  951. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  952. if (ret)
  953. goto err_bmi_cleanup;
  954. ar->version.target_ver = le32_to_cpu(targ_info.version);
  955. ar->target_type = le32_to_cpu(targ_info.type);
  956. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  957. ret = ath6kl_configure_target(ar);
  958. if (ret)
  959. goto err_bmi_cleanup;
  960. ar->htc_target = htc_create(ar);
  961. if (!ar->htc_target) {
  962. ret = -ENOMEM;
  963. goto err_bmi_cleanup;
  964. }
  965. ar->aggr_cntxt = aggr_init(ar->net_dev);
  966. if (!ar->aggr_cntxt) {
  967. ath6kl_err("failed to initialize aggr\n");
  968. ret = -ENOMEM;
  969. goto err_htc_cleanup;
  970. }
  971. ret = ath6kl_init_upload(ar);
  972. if (ret)
  973. goto err_htc_cleanup;
  974. ret = ath6kl_init(ar->net_dev);
  975. if (ret)
  976. goto err_htc_cleanup;
  977. /* This runs the init function if registered */
  978. ret = register_netdev(ar->net_dev);
  979. if (ret) {
  980. ath6kl_err("register_netdev failed\n");
  981. ath6kl_destroy(ar->net_dev, 0);
  982. return ret;
  983. }
  984. set_bit(NETDEV_REGISTERED, &ar->flag);
  985. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  986. __func__, ar->net_dev->name, ar->net_dev, ar);
  987. return ret;
  988. err_htc_cleanup:
  989. htc_cleanup(ar->htc_target);
  990. err_bmi_cleanup:
  991. ath6kl_bmi_cleanup(ar);
  992. err_wq:
  993. destroy_workqueue(ar->ath6kl_wq);
  994. return ret;
  995. }
  996. void ath6kl_stop_txrx(struct ath6kl *ar)
  997. {
  998. struct net_device *ndev = ar->net_dev;
  999. if (!ndev)
  1000. return;
  1001. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1002. if (down_interruptible(&ar->sem)) {
  1003. ath6kl_err("down_interruptible failed\n");
  1004. return;
  1005. }
  1006. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1007. ath6kl_stop_endpoint(ndev, false, true);
  1008. clear_bit(WLAN_ENABLED, &ar->flag);
  1009. }
  1010. /*
  1011. * We need to differentiate between the surprise and planned removal of the
  1012. * device because of the following consideration:
  1013. *
  1014. * - In case of surprise removal, the hcd already frees up the pending
  1015. * for the device and hence there is no need to unregister the function
  1016. * driver inorder to get these requests. For planned removal, the function
  1017. * driver has to explicitly unregister itself to have the hcd return all the
  1018. * pending requests before the data structures for the devices are freed up.
  1019. * Note that as per the current implementation, the function driver will
  1020. * end up releasing all the devices since there is no API to selectively
  1021. * release a particular device.
  1022. *
  1023. * - Certain commands issued to the target can be skipped for surprise
  1024. * removal since they will anyway not go through.
  1025. */
  1026. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1027. {
  1028. struct ath6kl *ar;
  1029. if (!dev || !ath6kl_priv(dev)) {
  1030. ath6kl_err("failed to get device structure\n");
  1031. return;
  1032. }
  1033. ar = ath6kl_priv(dev);
  1034. destroy_workqueue(ar->ath6kl_wq);
  1035. if (ar->htc_target)
  1036. htc_cleanup(ar->htc_target);
  1037. aggr_module_destroy(ar->aggr_cntxt);
  1038. ath6kl_cookie_cleanup(ar);
  1039. ath6kl_cleanup_amsdu_rxbufs(ar);
  1040. ath6kl_bmi_cleanup(ar);
  1041. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1042. unregister_netdev(dev);
  1043. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1044. }
  1045. free_netdev(dev);
  1046. ath6kl_cfg80211_deinit(ar);
  1047. }