devices.c 6.7 KB

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  1. /*
  2. * mach-davinci/devices.c
  3. *
  4. * DaVinci platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/io.h>
  15. #include <mach/hardware.h>
  16. #include <mach/i2c.h>
  17. #include <mach/irqs.h>
  18. #include <mach/cputype.h>
  19. #include <mach/mux.h>
  20. #include <mach/edma.h>
  21. #include <mach/mmc.h>
  22. #include <mach/time.h>
  23. #include "clock.h"
  24. #define DAVINCI_I2C_BASE 0x01C21000
  25. #define DAVINCI_MMCSD0_BASE 0x01E10000
  26. #define DM355_MMCSD0_BASE 0x01E11000
  27. #define DM355_MMCSD1_BASE 0x01E00000
  28. #define DM365_MMCSD0_BASE 0x01D11000
  29. #define DM365_MMCSD1_BASE 0x01D00000
  30. static struct resource i2c_resources[] = {
  31. {
  32. .start = DAVINCI_I2C_BASE,
  33. .end = DAVINCI_I2C_BASE + 0x40,
  34. .flags = IORESOURCE_MEM,
  35. },
  36. {
  37. .start = IRQ_I2C,
  38. .flags = IORESOURCE_IRQ,
  39. },
  40. };
  41. static struct platform_device davinci_i2c_device = {
  42. .name = "i2c_davinci",
  43. .id = 1,
  44. .num_resources = ARRAY_SIZE(i2c_resources),
  45. .resource = i2c_resources,
  46. };
  47. void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
  48. {
  49. if (cpu_is_davinci_dm644x())
  50. davinci_cfg_reg(DM644X_I2C);
  51. davinci_i2c_device.dev.platform_data = pdata;
  52. (void) platform_device_register(&davinci_i2c_device);
  53. }
  54. #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
  55. static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
  56. static struct resource mmcsd0_resources[] = {
  57. {
  58. /* different on dm355 */
  59. .start = DAVINCI_MMCSD0_BASE,
  60. .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
  61. .flags = IORESOURCE_MEM,
  62. },
  63. /* IRQs: MMC/SD, then SDIO */
  64. {
  65. .start = IRQ_MMCINT,
  66. .flags = IORESOURCE_IRQ,
  67. }, {
  68. /* different on dm355 */
  69. .start = IRQ_SDIOINT,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. /* DMA channels: RX, then TX */
  73. {
  74. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
  75. .flags = IORESOURCE_DMA,
  76. }, {
  77. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
  78. .flags = IORESOURCE_DMA,
  79. },
  80. };
  81. static struct platform_device davinci_mmcsd0_device = {
  82. .name = "davinci_mmc",
  83. .id = 0,
  84. .dev = {
  85. .dma_mask = &mmcsd0_dma_mask,
  86. .coherent_dma_mask = DMA_BIT_MASK(32),
  87. },
  88. .num_resources = ARRAY_SIZE(mmcsd0_resources),
  89. .resource = mmcsd0_resources,
  90. };
  91. static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
  92. static struct resource mmcsd1_resources[] = {
  93. {
  94. .start = DM355_MMCSD1_BASE,
  95. .end = DM355_MMCSD1_BASE + SZ_4K - 1,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. /* IRQs: MMC/SD, then SDIO */
  99. {
  100. .start = IRQ_DM355_MMCINT1,
  101. .flags = IORESOURCE_IRQ,
  102. }, {
  103. .start = IRQ_DM355_SDIOINT1,
  104. .flags = IORESOURCE_IRQ,
  105. },
  106. /* DMA channels: RX, then TX */
  107. {
  108. .start = EDMA_CTLR_CHAN(0, 30), /* rx */
  109. .flags = IORESOURCE_DMA,
  110. }, {
  111. .start = EDMA_CTLR_CHAN(0, 31), /* tx */
  112. .flags = IORESOURCE_DMA,
  113. },
  114. };
  115. static struct platform_device davinci_mmcsd1_device = {
  116. .name = "davinci_mmc",
  117. .id = 1,
  118. .dev = {
  119. .dma_mask = &mmcsd1_dma_mask,
  120. .coherent_dma_mask = DMA_BIT_MASK(32),
  121. },
  122. .num_resources = ARRAY_SIZE(mmcsd1_resources),
  123. .resource = mmcsd1_resources,
  124. };
  125. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  126. {
  127. struct platform_device *pdev = NULL;
  128. if (WARN_ON(cpu_is_davinci_dm646x()))
  129. return;
  130. /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
  131. * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
  132. *
  133. * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
  134. * not handled right here ...
  135. */
  136. switch (module) {
  137. case 1:
  138. if (cpu_is_davinci_dm355()) {
  139. /* REVISIT we may not need all these pins if e.g. this
  140. * is a hard-wired SDIO device...
  141. */
  142. davinci_cfg_reg(DM355_SD1_CMD);
  143. davinci_cfg_reg(DM355_SD1_CLK);
  144. davinci_cfg_reg(DM355_SD1_DATA0);
  145. davinci_cfg_reg(DM355_SD1_DATA1);
  146. davinci_cfg_reg(DM355_SD1_DATA2);
  147. davinci_cfg_reg(DM355_SD1_DATA3);
  148. } else if (cpu_is_davinci_dm365()) {
  149. void __iomem *pupdctl1 =
  150. IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
  151. /* Configure pull down control */
  152. __raw_writel((__raw_readl(pupdctl1) & ~0x400),
  153. pupdctl1);
  154. mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
  155. mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
  156. SZ_4K - 1;
  157. mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
  158. } else
  159. break;
  160. pdev = &davinci_mmcsd1_device;
  161. break;
  162. case 0:
  163. if (cpu_is_davinci_dm355()) {
  164. mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
  165. mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
  166. mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
  167. /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
  168. davinci_cfg_reg(DM355_MMCSD0);
  169. /* enable RX EDMA */
  170. davinci_cfg_reg(DM355_EVT26_MMC0_RX);
  171. } else if (cpu_is_davinci_dm365()) {
  172. mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
  173. mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
  174. SZ_4K - 1;
  175. mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
  176. } else if (cpu_is_davinci_dm644x()) {
  177. /* REVISIT: should this be in board-init code? */
  178. void __iomem *base =
  179. IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
  180. /* Power-on 3.3V IO cells */
  181. __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
  182. /*Set up the pull regiter for MMC */
  183. davinci_cfg_reg(DM644X_MSTK);
  184. }
  185. pdev = &davinci_mmcsd0_device;
  186. break;
  187. }
  188. if (WARN_ON(!pdev))
  189. return;
  190. pdev->dev.platform_data = config;
  191. platform_device_register(pdev);
  192. }
  193. #else
  194. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  195. {
  196. }
  197. #endif
  198. /*-------------------------------------------------------------------------*/
  199. static struct resource wdt_resources[] = {
  200. {
  201. .start = DAVINCI_WDOG_BASE,
  202. .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
  203. .flags = IORESOURCE_MEM,
  204. },
  205. };
  206. struct platform_device davinci_wdt_device = {
  207. .name = "watchdog",
  208. .id = -1,
  209. .num_resources = ARRAY_SIZE(wdt_resources),
  210. .resource = wdt_resources,
  211. };
  212. static void davinci_init_wdt(void)
  213. {
  214. platform_device_register(&davinci_wdt_device);
  215. }
  216. /*-------------------------------------------------------------------------*/
  217. struct davinci_timer_instance davinci_timer_instance[2] = {
  218. {
  219. .base = IO_ADDRESS(DAVINCI_TIMER0_BASE),
  220. .bottom_irq = IRQ_TINT0_TINT12,
  221. .top_irq = IRQ_TINT0_TINT34,
  222. },
  223. {
  224. .base = IO_ADDRESS(DAVINCI_TIMER1_BASE),
  225. .bottom_irq = IRQ_TINT1_TINT12,
  226. .top_irq = IRQ_TINT1_TINT34,
  227. },
  228. };
  229. /*-------------------------------------------------------------------------*/
  230. static int __init davinci_init_devices(void)
  231. {
  232. /* please keep these calls, and their implementations above,
  233. * in alphabetical order so they're easier to sort through.
  234. */
  235. davinci_init_wdt();
  236. return 0;
  237. }
  238. arch_initcall(davinci_init_devices);