twl4030.c 70 KB

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  1. /*
  2. * ALSA SoC TWL4030 codec driver
  3. *
  4. * Author: Steve Sakoman, <steve@sakoman.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/i2c/twl.h>
  29. #include <linux/slab.h>
  30. #include <linux/gpio.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/soc.h>
  35. #include <sound/initval.h>
  36. #include <sound/tlv.h>
  37. /* Register descriptions are here */
  38. #include <linux/mfd/twl4030-audio.h>
  39. /* Shadow register used by the audio driver */
  40. #define TWL4030_REG_SW_SHADOW 0x4A
  41. #define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1)
  42. /* TWL4030_REG_SW_SHADOW (0x4A) Fields */
  43. #define TWL4030_HFL_EN 0x01
  44. #define TWL4030_HFR_EN 0x02
  45. /*
  46. * twl4030 register cache & default register settings
  47. */
  48. static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
  49. 0x00, /* this register not used */
  50. 0x00, /* REG_CODEC_MODE (0x1) */
  51. 0x00, /* REG_OPTION (0x2) */
  52. 0x00, /* REG_UNKNOWN (0x3) */
  53. 0x00, /* REG_MICBIAS_CTL (0x4) */
  54. 0x00, /* REG_ANAMICL (0x5) */
  55. 0x00, /* REG_ANAMICR (0x6) */
  56. 0x00, /* REG_AVADC_CTL (0x7) */
  57. 0x00, /* REG_ADCMICSEL (0x8) */
  58. 0x00, /* REG_DIGMIXING (0x9) */
  59. 0x0f, /* REG_ATXL1PGA (0xA) */
  60. 0x0f, /* REG_ATXR1PGA (0xB) */
  61. 0x0f, /* REG_AVTXL2PGA (0xC) */
  62. 0x0f, /* REG_AVTXR2PGA (0xD) */
  63. 0x00, /* REG_AUDIO_IF (0xE) */
  64. 0x00, /* REG_VOICE_IF (0xF) */
  65. 0x3f, /* REG_ARXR1PGA (0x10) */
  66. 0x3f, /* REG_ARXL1PGA (0x11) */
  67. 0x3f, /* REG_ARXR2PGA (0x12) */
  68. 0x3f, /* REG_ARXL2PGA (0x13) */
  69. 0x25, /* REG_VRXPGA (0x14) */
  70. 0x00, /* REG_VSTPGA (0x15) */
  71. 0x00, /* REG_VRX2ARXPGA (0x16) */
  72. 0x00, /* REG_AVDAC_CTL (0x17) */
  73. 0x00, /* REG_ARX2VTXPGA (0x18) */
  74. 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
  75. 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
  76. 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
  77. 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
  78. 0x00, /* REG_ATX2ARXPGA (0x1D) */
  79. 0x00, /* REG_BT_IF (0x1E) */
  80. 0x55, /* REG_BTPGA (0x1F) */
  81. 0x00, /* REG_BTSTPGA (0x20) */
  82. 0x00, /* REG_EAR_CTL (0x21) */
  83. 0x00, /* REG_HS_SEL (0x22) */
  84. 0x00, /* REG_HS_GAIN_SET (0x23) */
  85. 0x00, /* REG_HS_POPN_SET (0x24) */
  86. 0x00, /* REG_PREDL_CTL (0x25) */
  87. 0x00, /* REG_PREDR_CTL (0x26) */
  88. 0x00, /* REG_PRECKL_CTL (0x27) */
  89. 0x00, /* REG_PRECKR_CTL (0x28) */
  90. 0x00, /* REG_HFL_CTL (0x29) */
  91. 0x00, /* REG_HFR_CTL (0x2A) */
  92. 0x05, /* REG_ALC_CTL (0x2B) */
  93. 0x00, /* REG_ALC_SET1 (0x2C) */
  94. 0x00, /* REG_ALC_SET2 (0x2D) */
  95. 0x00, /* REG_BOOST_CTL (0x2E) */
  96. 0x00, /* REG_SOFTVOL_CTL (0x2F) */
  97. 0x13, /* REG_DTMF_FREQSEL (0x30) */
  98. 0x00, /* REG_DTMF_TONEXT1H (0x31) */
  99. 0x00, /* REG_DTMF_TONEXT1L (0x32) */
  100. 0x00, /* REG_DTMF_TONEXT2H (0x33) */
  101. 0x00, /* REG_DTMF_TONEXT2L (0x34) */
  102. 0x79, /* REG_DTMF_TONOFF (0x35) */
  103. 0x11, /* REG_DTMF_WANONOFF (0x36) */
  104. 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
  105. 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
  106. 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
  107. 0x06, /* REG_APLL_CTL (0x3A) */
  108. 0x00, /* REG_DTMF_CTL (0x3B) */
  109. 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
  110. 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
  111. 0x00, /* REG_MISC_SET_1 (0x3E) */
  112. 0x00, /* REG_PCMBTMUX (0x3F) */
  113. 0x00, /* not used (0x40) */
  114. 0x00, /* not used (0x41) */
  115. 0x00, /* not used (0x42) */
  116. 0x00, /* REG_RX_PATH_SEL (0x43) */
  117. 0x32, /* REG_VDL_APGA_CTL (0x44) */
  118. 0x00, /* REG_VIBRA_CTL (0x45) */
  119. 0x00, /* REG_VIBRA_SET (0x46) */
  120. 0x00, /* REG_VIBRA_PWM_SET (0x47) */
  121. 0x00, /* REG_ANAMIC_GAIN (0x48) */
  122. 0x00, /* REG_MISC_SET_2 (0x49) */
  123. 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
  124. };
  125. /* codec private data */
  126. struct twl4030_priv {
  127. struct snd_soc_codec codec;
  128. unsigned int codec_powered;
  129. /* reference counts of AIF/APLL users */
  130. unsigned int apll_enabled;
  131. struct snd_pcm_substream *master_substream;
  132. struct snd_pcm_substream *slave_substream;
  133. unsigned int configured;
  134. unsigned int rate;
  135. unsigned int sample_bits;
  136. unsigned int channels;
  137. unsigned int sysclk;
  138. /* Output (with associated amp) states */
  139. u8 hsl_enabled, hsr_enabled;
  140. u8 earpiece_enabled;
  141. u8 predrivel_enabled, predriver_enabled;
  142. u8 carkitl_enabled, carkitr_enabled;
  143. /* Delay needed after enabling the digimic interface */
  144. unsigned int digimic_delay;
  145. };
  146. /*
  147. * read twl4030 register cache
  148. */
  149. static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
  150. unsigned int reg)
  151. {
  152. u8 *cache = codec->reg_cache;
  153. if (reg >= TWL4030_CACHEREGNUM)
  154. return -EIO;
  155. return cache[reg];
  156. }
  157. /*
  158. * write twl4030 register cache
  159. */
  160. static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
  161. u8 reg, u8 value)
  162. {
  163. u8 *cache = codec->reg_cache;
  164. if (reg >= TWL4030_CACHEREGNUM)
  165. return;
  166. cache[reg] = value;
  167. }
  168. /*
  169. * write to the twl4030 register space
  170. */
  171. static int twl4030_write(struct snd_soc_codec *codec,
  172. unsigned int reg, unsigned int value)
  173. {
  174. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  175. int write_to_reg = 0;
  176. twl4030_write_reg_cache(codec, reg, value);
  177. if (likely(reg < TWL4030_REG_SW_SHADOW)) {
  178. /* Decide if the given register can be written */
  179. switch (reg) {
  180. case TWL4030_REG_EAR_CTL:
  181. if (twl4030->earpiece_enabled)
  182. write_to_reg = 1;
  183. break;
  184. case TWL4030_REG_PREDL_CTL:
  185. if (twl4030->predrivel_enabled)
  186. write_to_reg = 1;
  187. break;
  188. case TWL4030_REG_PREDR_CTL:
  189. if (twl4030->predriver_enabled)
  190. write_to_reg = 1;
  191. break;
  192. case TWL4030_REG_PRECKL_CTL:
  193. if (twl4030->carkitl_enabled)
  194. write_to_reg = 1;
  195. break;
  196. case TWL4030_REG_PRECKR_CTL:
  197. if (twl4030->carkitr_enabled)
  198. write_to_reg = 1;
  199. break;
  200. case TWL4030_REG_HS_GAIN_SET:
  201. if (twl4030->hsl_enabled || twl4030->hsr_enabled)
  202. write_to_reg = 1;
  203. break;
  204. default:
  205. /* All other register can be written */
  206. write_to_reg = 1;
  207. break;
  208. }
  209. if (write_to_reg)
  210. return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  211. value, reg);
  212. }
  213. return 0;
  214. }
  215. static inline void twl4030_wait_ms(int time)
  216. {
  217. if (time < 60) {
  218. time *= 1000;
  219. usleep_range(time, time + 500);
  220. } else {
  221. msleep(time);
  222. }
  223. }
  224. static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
  225. {
  226. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  227. int mode;
  228. if (enable == twl4030->codec_powered)
  229. return;
  230. if (enable)
  231. mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
  232. else
  233. mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
  234. if (mode >= 0) {
  235. twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
  236. twl4030->codec_powered = enable;
  237. }
  238. /* REVISIT: this delay is present in TI sample drivers */
  239. /* but there seems to be no TRM requirement for it */
  240. udelay(10);
  241. }
  242. static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
  243. {
  244. int i, difference = 0;
  245. u8 val;
  246. dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
  247. for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
  248. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
  249. if (val != twl4030_reg[i]) {
  250. difference++;
  251. dev_dbg(codec->dev,
  252. "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
  253. i, val, twl4030_reg[i]);
  254. }
  255. }
  256. dev_dbg(codec->dev, "Found %d non-matching registers. %s\n",
  257. difference, difference ? "Not OK" : "OK");
  258. }
  259. static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
  260. {
  261. int i;
  262. /* set all audio section registers to reasonable defaults */
  263. for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
  264. if (i != TWL4030_REG_APLL_CTL)
  265. twl4030_write(codec, i, twl4030_reg[i]);
  266. }
  267. static void twl4030_init_chip(struct snd_soc_codec *codec)
  268. {
  269. struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
  270. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  271. u8 reg, byte;
  272. int i = 0;
  273. if (pdata && pdata->hs_extmute &&
  274. gpio_is_valid(pdata->hs_extmute_gpio)) {
  275. int ret;
  276. if (!pdata->hs_extmute_gpio)
  277. dev_warn(codec->dev,
  278. "Extmute GPIO is 0 is this correct?\n");
  279. ret = gpio_request_one(pdata->hs_extmute_gpio,
  280. GPIOF_OUT_INIT_LOW, "hs_extmute");
  281. if (ret) {
  282. dev_err(codec->dev, "Failed to get hs_extmute GPIO\n");
  283. pdata->hs_extmute_gpio = -1;
  284. }
  285. }
  286. /* Check defaults, if instructed before anything else */
  287. if (pdata && pdata->check_defaults)
  288. twl4030_check_defaults(codec);
  289. /* Reset registers, if no setup data or if instructed to do so */
  290. if (!pdata || (pdata && pdata->reset_registers))
  291. twl4030_reset_registers(codec);
  292. /* Refresh APLL_CTL register from HW */
  293. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
  294. TWL4030_REG_APLL_CTL);
  295. twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
  296. /* anti-pop when changing analog gain */
  297. reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
  298. twl4030_write(codec, TWL4030_REG_MISC_SET_1,
  299. reg | TWL4030_SMOOTH_ANAVOL_EN);
  300. twl4030_write(codec, TWL4030_REG_OPTION,
  301. TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
  302. TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
  303. /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
  304. twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
  305. /* Machine dependent setup */
  306. if (!pdata)
  307. return;
  308. twl4030->digimic_delay = pdata->digimic_delay;
  309. reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
  310. reg &= ~TWL4030_RAMP_DELAY;
  311. reg |= (pdata->ramp_delay_value << 2);
  312. twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
  313. /* initiate offset cancellation */
  314. twl4030_codec_enable(codec, 1);
  315. reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
  316. reg &= ~TWL4030_OFFSET_CNCL_SEL;
  317. reg |= pdata->offset_cncl_path;
  318. twl4030_write(codec, TWL4030_REG_ANAMICL,
  319. reg | TWL4030_CNCL_OFFSET_START);
  320. /*
  321. * Wait for offset cancellation to complete.
  322. * Since this takes a while, do not slam the i2c.
  323. * Start polling the status after ~20ms.
  324. */
  325. msleep(20);
  326. do {
  327. usleep_range(1000, 2000);
  328. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
  329. TWL4030_REG_ANAMICL);
  330. } while ((i++ < 100) &&
  331. ((byte & TWL4030_CNCL_OFFSET_START) ==
  332. TWL4030_CNCL_OFFSET_START));
  333. /* Make sure that the reg_cache has the same value as the HW */
  334. twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
  335. twl4030_codec_enable(codec, 0);
  336. }
  337. static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
  338. {
  339. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  340. int status = -1;
  341. if (enable) {
  342. twl4030->apll_enabled++;
  343. if (twl4030->apll_enabled == 1)
  344. status = twl4030_audio_enable_resource(
  345. TWL4030_AUDIO_RES_APLL);
  346. } else {
  347. twl4030->apll_enabled--;
  348. if (!twl4030->apll_enabled)
  349. status = twl4030_audio_disable_resource(
  350. TWL4030_AUDIO_RES_APLL);
  351. }
  352. if (status >= 0)
  353. twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
  354. }
  355. /* Earpiece */
  356. static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
  357. SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
  358. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
  359. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
  360. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
  361. };
  362. /* PreDrive Left */
  363. static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
  364. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
  365. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
  366. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
  367. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
  368. };
  369. /* PreDrive Right */
  370. static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
  371. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
  372. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
  373. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
  374. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
  375. };
  376. /* Headset Left */
  377. static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
  378. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
  379. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
  380. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
  381. };
  382. /* Headset Right */
  383. static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
  384. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
  385. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
  386. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
  387. };
  388. /* Carkit Left */
  389. static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
  390. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
  391. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
  392. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
  393. };
  394. /* Carkit Right */
  395. static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
  396. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
  397. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
  398. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
  399. };
  400. /* Handsfree Left */
  401. static const char *twl4030_handsfreel_texts[] =
  402. {"Voice", "AudioL1", "AudioL2", "AudioR2"};
  403. static const struct soc_enum twl4030_handsfreel_enum =
  404. SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
  405. ARRAY_SIZE(twl4030_handsfreel_texts),
  406. twl4030_handsfreel_texts);
  407. static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
  408. SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
  409. /* Handsfree Left virtual mute */
  410. static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
  411. SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
  412. /* Handsfree Right */
  413. static const char *twl4030_handsfreer_texts[] =
  414. {"Voice", "AudioR1", "AudioR2", "AudioL2"};
  415. static const struct soc_enum twl4030_handsfreer_enum =
  416. SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
  417. ARRAY_SIZE(twl4030_handsfreer_texts),
  418. twl4030_handsfreer_texts);
  419. static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
  420. SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
  421. /* Handsfree Right virtual mute */
  422. static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
  423. SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
  424. /* Vibra */
  425. /* Vibra audio path selection */
  426. static const char *twl4030_vibra_texts[] =
  427. {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
  428. static const struct soc_enum twl4030_vibra_enum =
  429. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
  430. ARRAY_SIZE(twl4030_vibra_texts),
  431. twl4030_vibra_texts);
  432. static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
  433. SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
  434. /* Vibra path selection: local vibrator (PWM) or audio driven */
  435. static const char *twl4030_vibrapath_texts[] =
  436. {"Local vibrator", "Audio"};
  437. static const struct soc_enum twl4030_vibrapath_enum =
  438. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
  439. ARRAY_SIZE(twl4030_vibrapath_texts),
  440. twl4030_vibrapath_texts);
  441. static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
  442. SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
  443. /* Left analog microphone selection */
  444. static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
  445. SOC_DAPM_SINGLE("Main Mic Capture Switch",
  446. TWL4030_REG_ANAMICL, 0, 1, 0),
  447. SOC_DAPM_SINGLE("Headset Mic Capture Switch",
  448. TWL4030_REG_ANAMICL, 1, 1, 0),
  449. SOC_DAPM_SINGLE("AUXL Capture Switch",
  450. TWL4030_REG_ANAMICL, 2, 1, 0),
  451. SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
  452. TWL4030_REG_ANAMICL, 3, 1, 0),
  453. };
  454. /* Right analog microphone selection */
  455. static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
  456. SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
  457. SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
  458. };
  459. /* TX1 L/R Analog/Digital microphone selection */
  460. static const char *twl4030_micpathtx1_texts[] =
  461. {"Analog", "Digimic0"};
  462. static const struct soc_enum twl4030_micpathtx1_enum =
  463. SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
  464. ARRAY_SIZE(twl4030_micpathtx1_texts),
  465. twl4030_micpathtx1_texts);
  466. static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
  467. SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
  468. /* TX2 L/R Analog/Digital microphone selection */
  469. static const char *twl4030_micpathtx2_texts[] =
  470. {"Analog", "Digimic1"};
  471. static const struct soc_enum twl4030_micpathtx2_enum =
  472. SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
  473. ARRAY_SIZE(twl4030_micpathtx2_texts),
  474. twl4030_micpathtx2_texts);
  475. static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
  476. SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
  477. /* Analog bypass for AudioR1 */
  478. static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
  479. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
  480. /* Analog bypass for AudioL1 */
  481. static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
  482. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
  483. /* Analog bypass for AudioR2 */
  484. static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
  485. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
  486. /* Analog bypass for AudioL2 */
  487. static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
  488. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
  489. /* Analog bypass for Voice */
  490. static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
  491. SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
  492. /* Digital bypass gain, mute instead of -30dB */
  493. static const unsigned int twl4030_dapm_dbypass_tlv[] = {
  494. TLV_DB_RANGE_HEAD(3),
  495. 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
  496. 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
  497. 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
  498. };
  499. /* Digital bypass left (TX1L -> RX2L) */
  500. static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
  501. SOC_DAPM_SINGLE_TLV("Volume",
  502. TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
  503. twl4030_dapm_dbypass_tlv);
  504. /* Digital bypass right (TX1R -> RX2R) */
  505. static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
  506. SOC_DAPM_SINGLE_TLV("Volume",
  507. TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
  508. twl4030_dapm_dbypass_tlv);
  509. /*
  510. * Voice Sidetone GAIN volume control:
  511. * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
  512. */
  513. static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
  514. /* Digital bypass voice: sidetone (VUL -> VDL)*/
  515. static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
  516. SOC_DAPM_SINGLE_TLV("Volume",
  517. TWL4030_REG_VSTPGA, 0, 0x29, 0,
  518. twl4030_dapm_dbypassv_tlv);
  519. /*
  520. * Output PGA builder:
  521. * Handle the muting and unmuting of the given output (turning off the
  522. * amplifier associated with the output pin)
  523. * On mute bypass the reg_cache and write 0 to the register
  524. * On unmute: restore the register content from the reg_cache
  525. * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
  526. */
  527. #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
  528. static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
  529. struct snd_kcontrol *kcontrol, int event) \
  530. { \
  531. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
  532. \
  533. switch (event) { \
  534. case SND_SOC_DAPM_POST_PMU: \
  535. twl4030->pin_name##_enabled = 1; \
  536. twl4030_write(w->codec, reg, \
  537. twl4030_read_reg_cache(w->codec, reg)); \
  538. break; \
  539. case SND_SOC_DAPM_POST_PMD: \
  540. twl4030->pin_name##_enabled = 0; \
  541. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
  542. 0, reg); \
  543. break; \
  544. } \
  545. return 0; \
  546. }
  547. TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
  548. TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
  549. TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
  550. TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
  551. TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
  552. static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
  553. {
  554. unsigned char hs_ctl;
  555. hs_ctl = twl4030_read_reg_cache(codec, reg);
  556. if (ramp) {
  557. /* HF ramp-up */
  558. hs_ctl |= TWL4030_HF_CTL_REF_EN;
  559. twl4030_write(codec, reg, hs_ctl);
  560. udelay(10);
  561. hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
  562. twl4030_write(codec, reg, hs_ctl);
  563. udelay(40);
  564. hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
  565. hs_ctl |= TWL4030_HF_CTL_HB_EN;
  566. twl4030_write(codec, reg, hs_ctl);
  567. } else {
  568. /* HF ramp-down */
  569. hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
  570. hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
  571. twl4030_write(codec, reg, hs_ctl);
  572. hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
  573. twl4030_write(codec, reg, hs_ctl);
  574. udelay(40);
  575. hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
  576. twl4030_write(codec, reg, hs_ctl);
  577. }
  578. }
  579. static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
  580. struct snd_kcontrol *kcontrol, int event)
  581. {
  582. switch (event) {
  583. case SND_SOC_DAPM_POST_PMU:
  584. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
  585. break;
  586. case SND_SOC_DAPM_POST_PMD:
  587. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
  588. break;
  589. }
  590. return 0;
  591. }
  592. static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
  593. struct snd_kcontrol *kcontrol, int event)
  594. {
  595. switch (event) {
  596. case SND_SOC_DAPM_POST_PMU:
  597. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
  598. break;
  599. case SND_SOC_DAPM_POST_PMD:
  600. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
  601. break;
  602. }
  603. return 0;
  604. }
  605. static int vibramux_event(struct snd_soc_dapm_widget *w,
  606. struct snd_kcontrol *kcontrol, int event)
  607. {
  608. twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
  609. return 0;
  610. }
  611. static int apll_event(struct snd_soc_dapm_widget *w,
  612. struct snd_kcontrol *kcontrol, int event)
  613. {
  614. switch (event) {
  615. case SND_SOC_DAPM_PRE_PMU:
  616. twl4030_apll_enable(w->codec, 1);
  617. break;
  618. case SND_SOC_DAPM_POST_PMD:
  619. twl4030_apll_enable(w->codec, 0);
  620. break;
  621. }
  622. return 0;
  623. }
  624. static int aif_event(struct snd_soc_dapm_widget *w,
  625. struct snd_kcontrol *kcontrol, int event)
  626. {
  627. u8 audio_if;
  628. audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
  629. switch (event) {
  630. case SND_SOC_DAPM_PRE_PMU:
  631. /* Enable AIF */
  632. /* enable the PLL before we use it to clock the DAI */
  633. twl4030_apll_enable(w->codec, 1);
  634. twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
  635. audio_if | TWL4030_AIF_EN);
  636. break;
  637. case SND_SOC_DAPM_POST_PMD:
  638. /* disable the DAI before we stop it's source PLL */
  639. twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
  640. audio_if & ~TWL4030_AIF_EN);
  641. twl4030_apll_enable(w->codec, 0);
  642. break;
  643. }
  644. return 0;
  645. }
  646. static void headset_ramp(struct snd_soc_codec *codec, int ramp)
  647. {
  648. struct twl4030_codec_data *pdata = codec->dev->platform_data;
  649. unsigned char hs_gain, hs_pop;
  650. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  651. /* Base values for ramp delay calculation: 2^19 - 2^26 */
  652. unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
  653. 8388608, 16777216, 33554432, 67108864};
  654. unsigned int delay;
  655. hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
  656. hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
  657. delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
  658. twl4030->sysclk) + 1;
  659. /* Enable external mute control, this dramatically reduces
  660. * the pop-noise */
  661. if (pdata && pdata->hs_extmute) {
  662. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  663. gpio_set_value(pdata->hs_extmute_gpio, 1);
  664. } else if (pdata->set_hs_extmute) {
  665. dev_warn(codec->dev, "set_hs_extmute is deprecated\n");
  666. pdata->set_hs_extmute(1);
  667. } else {
  668. hs_pop |= TWL4030_EXTMUTE;
  669. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  670. }
  671. }
  672. if (ramp) {
  673. /* Headset ramp-up according to the TRM */
  674. hs_pop |= TWL4030_VMID_EN;
  675. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  676. /* Actually write to the register */
  677. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  678. hs_gain,
  679. TWL4030_REG_HS_GAIN_SET);
  680. hs_pop |= TWL4030_RAMP_EN;
  681. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  682. /* Wait ramp delay time + 1, so the VMID can settle */
  683. twl4030_wait_ms(delay);
  684. } else {
  685. /* Headset ramp-down _not_ according to
  686. * the TRM, but in a way that it is working */
  687. hs_pop &= ~TWL4030_RAMP_EN;
  688. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  689. /* Wait ramp delay time + 1, so the VMID can settle */
  690. twl4030_wait_ms(delay);
  691. /* Bypass the reg_cache to mute the headset */
  692. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  693. hs_gain & (~0x0f),
  694. TWL4030_REG_HS_GAIN_SET);
  695. hs_pop &= ~TWL4030_VMID_EN;
  696. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  697. }
  698. /* Disable external mute */
  699. if (pdata && pdata->hs_extmute) {
  700. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  701. gpio_set_value(pdata->hs_extmute_gpio, 0);
  702. } else if (pdata->set_hs_extmute) {
  703. dev_warn(codec->dev, "set_hs_extmute is deprecated\n");
  704. pdata->set_hs_extmute(0);
  705. } else {
  706. hs_pop &= ~TWL4030_EXTMUTE;
  707. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  708. }
  709. }
  710. }
  711. static int headsetlpga_event(struct snd_soc_dapm_widget *w,
  712. struct snd_kcontrol *kcontrol, int event)
  713. {
  714. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  715. switch (event) {
  716. case SND_SOC_DAPM_POST_PMU:
  717. /* Do the ramp-up only once */
  718. if (!twl4030->hsr_enabled)
  719. headset_ramp(w->codec, 1);
  720. twl4030->hsl_enabled = 1;
  721. break;
  722. case SND_SOC_DAPM_POST_PMD:
  723. /* Do the ramp-down only if both headsetL/R is disabled */
  724. if (!twl4030->hsr_enabled)
  725. headset_ramp(w->codec, 0);
  726. twl4030->hsl_enabled = 0;
  727. break;
  728. }
  729. return 0;
  730. }
  731. static int headsetrpga_event(struct snd_soc_dapm_widget *w,
  732. struct snd_kcontrol *kcontrol, int event)
  733. {
  734. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  735. switch (event) {
  736. case SND_SOC_DAPM_POST_PMU:
  737. /* Do the ramp-up only once */
  738. if (!twl4030->hsl_enabled)
  739. headset_ramp(w->codec, 1);
  740. twl4030->hsr_enabled = 1;
  741. break;
  742. case SND_SOC_DAPM_POST_PMD:
  743. /* Do the ramp-down only if both headsetL/R is disabled */
  744. if (!twl4030->hsl_enabled)
  745. headset_ramp(w->codec, 0);
  746. twl4030->hsr_enabled = 0;
  747. break;
  748. }
  749. return 0;
  750. }
  751. static int digimic_event(struct snd_soc_dapm_widget *w,
  752. struct snd_kcontrol *kcontrol, int event)
  753. {
  754. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  755. if (twl4030->digimic_delay)
  756. twl4030_wait_ms(twl4030->digimic_delay);
  757. return 0;
  758. }
  759. /*
  760. * Some of the gain controls in TWL (mostly those which are associated with
  761. * the outputs) are implemented in an interesting way:
  762. * 0x0 : Power down (mute)
  763. * 0x1 : 6dB
  764. * 0x2 : 0 dB
  765. * 0x3 : -6 dB
  766. * Inverting not going to help with these.
  767. * Custom volsw and volsw_2r get/put functions to handle these gain bits.
  768. */
  769. static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
  770. struct snd_ctl_elem_value *ucontrol)
  771. {
  772. struct soc_mixer_control *mc =
  773. (struct soc_mixer_control *)kcontrol->private_value;
  774. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  775. unsigned int reg = mc->reg;
  776. unsigned int shift = mc->shift;
  777. unsigned int rshift = mc->rshift;
  778. int max = mc->max;
  779. int mask = (1 << fls(max)) - 1;
  780. ucontrol->value.integer.value[0] =
  781. (snd_soc_read(codec, reg) >> shift) & mask;
  782. if (ucontrol->value.integer.value[0])
  783. ucontrol->value.integer.value[0] =
  784. max + 1 - ucontrol->value.integer.value[0];
  785. if (shift != rshift) {
  786. ucontrol->value.integer.value[1] =
  787. (snd_soc_read(codec, reg) >> rshift) & mask;
  788. if (ucontrol->value.integer.value[1])
  789. ucontrol->value.integer.value[1] =
  790. max + 1 - ucontrol->value.integer.value[1];
  791. }
  792. return 0;
  793. }
  794. static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
  795. struct snd_ctl_elem_value *ucontrol)
  796. {
  797. struct soc_mixer_control *mc =
  798. (struct soc_mixer_control *)kcontrol->private_value;
  799. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  800. unsigned int reg = mc->reg;
  801. unsigned int shift = mc->shift;
  802. unsigned int rshift = mc->rshift;
  803. int max = mc->max;
  804. int mask = (1 << fls(max)) - 1;
  805. unsigned short val, val2, val_mask;
  806. val = (ucontrol->value.integer.value[0] & mask);
  807. val_mask = mask << shift;
  808. if (val)
  809. val = max + 1 - val;
  810. val = val << shift;
  811. if (shift != rshift) {
  812. val2 = (ucontrol->value.integer.value[1] & mask);
  813. val_mask |= mask << rshift;
  814. if (val2)
  815. val2 = max + 1 - val2;
  816. val |= val2 << rshift;
  817. }
  818. return snd_soc_update_bits(codec, reg, val_mask, val);
  819. }
  820. static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  821. struct snd_ctl_elem_value *ucontrol)
  822. {
  823. struct soc_mixer_control *mc =
  824. (struct soc_mixer_control *)kcontrol->private_value;
  825. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  826. unsigned int reg = mc->reg;
  827. unsigned int reg2 = mc->rreg;
  828. unsigned int shift = mc->shift;
  829. int max = mc->max;
  830. int mask = (1<<fls(max))-1;
  831. ucontrol->value.integer.value[0] =
  832. (snd_soc_read(codec, reg) >> shift) & mask;
  833. ucontrol->value.integer.value[1] =
  834. (snd_soc_read(codec, reg2) >> shift) & mask;
  835. if (ucontrol->value.integer.value[0])
  836. ucontrol->value.integer.value[0] =
  837. max + 1 - ucontrol->value.integer.value[0];
  838. if (ucontrol->value.integer.value[1])
  839. ucontrol->value.integer.value[1] =
  840. max + 1 - ucontrol->value.integer.value[1];
  841. return 0;
  842. }
  843. static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  844. struct snd_ctl_elem_value *ucontrol)
  845. {
  846. struct soc_mixer_control *mc =
  847. (struct soc_mixer_control *)kcontrol->private_value;
  848. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  849. unsigned int reg = mc->reg;
  850. unsigned int reg2 = mc->rreg;
  851. unsigned int shift = mc->shift;
  852. int max = mc->max;
  853. int mask = (1 << fls(max)) - 1;
  854. int err;
  855. unsigned short val, val2, val_mask;
  856. val_mask = mask << shift;
  857. val = (ucontrol->value.integer.value[0] & mask);
  858. val2 = (ucontrol->value.integer.value[1] & mask);
  859. if (val)
  860. val = max + 1 - val;
  861. if (val2)
  862. val2 = max + 1 - val2;
  863. val = val << shift;
  864. val2 = val2 << shift;
  865. err = snd_soc_update_bits(codec, reg, val_mask, val);
  866. if (err < 0)
  867. return err;
  868. err = snd_soc_update_bits(codec, reg2, val_mask, val2);
  869. return err;
  870. }
  871. /* Codec operation modes */
  872. static const char *twl4030_op_modes_texts[] = {
  873. "Option 2 (voice/audio)", "Option 1 (audio)"
  874. };
  875. static const struct soc_enum twl4030_op_modes_enum =
  876. SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
  877. ARRAY_SIZE(twl4030_op_modes_texts),
  878. twl4030_op_modes_texts);
  879. static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
  880. struct snd_ctl_elem_value *ucontrol)
  881. {
  882. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  883. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  884. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  885. unsigned short val;
  886. unsigned short mask;
  887. if (twl4030->configured) {
  888. dev_err(codec->dev,
  889. "operation mode cannot be changed on-the-fly\n");
  890. return -EBUSY;
  891. }
  892. if (ucontrol->value.enumerated.item[0] > e->max - 1)
  893. return -EINVAL;
  894. val = ucontrol->value.enumerated.item[0] << e->shift_l;
  895. mask = e->mask << e->shift_l;
  896. if (e->shift_l != e->shift_r) {
  897. if (ucontrol->value.enumerated.item[1] > e->max - 1)
  898. return -EINVAL;
  899. val |= ucontrol->value.enumerated.item[1] << e->shift_r;
  900. mask |= e->mask << e->shift_r;
  901. }
  902. return snd_soc_update_bits(codec, e->reg, mask, val);
  903. }
  904. /*
  905. * FGAIN volume control:
  906. * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
  907. */
  908. static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
  909. /*
  910. * CGAIN volume control:
  911. * 0 dB to 12 dB in 6 dB steps
  912. * value 2 and 3 means 12 dB
  913. */
  914. static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
  915. /*
  916. * Voice Downlink GAIN volume control:
  917. * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
  918. */
  919. static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
  920. /*
  921. * Analog playback gain
  922. * -24 dB to 12 dB in 2 dB steps
  923. */
  924. static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
  925. /*
  926. * Gain controls tied to outputs
  927. * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
  928. */
  929. static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
  930. /*
  931. * Gain control for earpiece amplifier
  932. * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
  933. */
  934. static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
  935. /*
  936. * Capture gain after the ADCs
  937. * from 0 dB to 31 dB in 1 dB steps
  938. */
  939. static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
  940. /*
  941. * Gain control for input amplifiers
  942. * 0 dB to 30 dB in 6 dB steps
  943. */
  944. static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
  945. /* AVADC clock priority */
  946. static const char *twl4030_avadc_clk_priority_texts[] = {
  947. "Voice high priority", "HiFi high priority"
  948. };
  949. static const struct soc_enum twl4030_avadc_clk_priority_enum =
  950. SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
  951. ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
  952. twl4030_avadc_clk_priority_texts);
  953. static const char *twl4030_rampdelay_texts[] = {
  954. "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
  955. "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
  956. "3495/2581/1748 ms"
  957. };
  958. static const struct soc_enum twl4030_rampdelay_enum =
  959. SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
  960. ARRAY_SIZE(twl4030_rampdelay_texts),
  961. twl4030_rampdelay_texts);
  962. /* Vibra H-bridge direction mode */
  963. static const char *twl4030_vibradirmode_texts[] = {
  964. "Vibra H-bridge direction", "Audio data MSB",
  965. };
  966. static const struct soc_enum twl4030_vibradirmode_enum =
  967. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
  968. ARRAY_SIZE(twl4030_vibradirmode_texts),
  969. twl4030_vibradirmode_texts);
  970. /* Vibra H-bridge direction */
  971. static const char *twl4030_vibradir_texts[] = {
  972. "Positive polarity", "Negative polarity",
  973. };
  974. static const struct soc_enum twl4030_vibradir_enum =
  975. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
  976. ARRAY_SIZE(twl4030_vibradir_texts),
  977. twl4030_vibradir_texts);
  978. /* Digimic Left and right swapping */
  979. static const char *twl4030_digimicswap_texts[] = {
  980. "Not swapped", "Swapped",
  981. };
  982. static const struct soc_enum twl4030_digimicswap_enum =
  983. SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
  984. ARRAY_SIZE(twl4030_digimicswap_texts),
  985. twl4030_digimicswap_texts);
  986. static const struct snd_kcontrol_new twl4030_snd_controls[] = {
  987. /* Codec operation mode control */
  988. SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
  989. snd_soc_get_enum_double,
  990. snd_soc_put_twl4030_opmode_enum_double),
  991. /* Common playback gain controls */
  992. SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
  993. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  994. 0, 0x3f, 0, digital_fine_tlv),
  995. SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
  996. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  997. 0, 0x3f, 0, digital_fine_tlv),
  998. SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
  999. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  1000. 6, 0x2, 0, digital_coarse_tlv),
  1001. SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
  1002. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  1003. 6, 0x2, 0, digital_coarse_tlv),
  1004. SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
  1005. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  1006. 3, 0x12, 1, analog_tlv),
  1007. SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
  1008. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  1009. 3, 0x12, 1, analog_tlv),
  1010. SOC_DOUBLE_R("DAC1 Analog Playback Switch",
  1011. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  1012. 1, 1, 0),
  1013. SOC_DOUBLE_R("DAC2 Analog Playback Switch",
  1014. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  1015. 1, 1, 0),
  1016. /* Common voice downlink gain controls */
  1017. SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
  1018. TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
  1019. SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
  1020. TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
  1021. SOC_SINGLE("DAC Voice Analog Downlink Switch",
  1022. TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
  1023. /* Separate output gain controls */
  1024. SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
  1025. TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
  1026. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  1027. snd_soc_put_volsw_r2_twl4030, output_tvl),
  1028. SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
  1029. TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
  1030. snd_soc_put_volsw_twl4030, output_tvl),
  1031. SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
  1032. TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
  1033. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  1034. snd_soc_put_volsw_r2_twl4030, output_tvl),
  1035. SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
  1036. TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
  1037. snd_soc_put_volsw_twl4030, output_ear_tvl),
  1038. /* Common capture gain controls */
  1039. SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
  1040. TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
  1041. 0, 0x1f, 0, digital_capture_tlv),
  1042. SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
  1043. TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
  1044. 0, 0x1f, 0, digital_capture_tlv),
  1045. SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
  1046. 0, 3, 5, 0, input_gain_tlv),
  1047. SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
  1048. SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
  1049. SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
  1050. SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
  1051. SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
  1052. };
  1053. static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
  1054. /* Left channel inputs */
  1055. SND_SOC_DAPM_INPUT("MAINMIC"),
  1056. SND_SOC_DAPM_INPUT("HSMIC"),
  1057. SND_SOC_DAPM_INPUT("AUXL"),
  1058. SND_SOC_DAPM_INPUT("CARKITMIC"),
  1059. /* Right channel inputs */
  1060. SND_SOC_DAPM_INPUT("SUBMIC"),
  1061. SND_SOC_DAPM_INPUT("AUXR"),
  1062. /* Digital microphones (Stereo) */
  1063. SND_SOC_DAPM_INPUT("DIGIMIC0"),
  1064. SND_SOC_DAPM_INPUT("DIGIMIC1"),
  1065. /* Outputs */
  1066. SND_SOC_DAPM_OUTPUT("EARPIECE"),
  1067. SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
  1068. SND_SOC_DAPM_OUTPUT("PREDRIVER"),
  1069. SND_SOC_DAPM_OUTPUT("HSOL"),
  1070. SND_SOC_DAPM_OUTPUT("HSOR"),
  1071. SND_SOC_DAPM_OUTPUT("CARKITL"),
  1072. SND_SOC_DAPM_OUTPUT("CARKITR"),
  1073. SND_SOC_DAPM_OUTPUT("HFL"),
  1074. SND_SOC_DAPM_OUTPUT("HFR"),
  1075. SND_SOC_DAPM_OUTPUT("VIBRA"),
  1076. /* AIF and APLL clocks for running DAIs (including loopback) */
  1077. SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
  1078. SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
  1079. SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
  1080. /* DACs */
  1081. SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
  1082. SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
  1083. SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
  1084. SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
  1085. SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
  1086. /* Analog bypasses */
  1087. SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1088. &twl4030_dapm_abypassr1_control),
  1089. SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1090. &twl4030_dapm_abypassl1_control),
  1091. SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1092. &twl4030_dapm_abypassr2_control),
  1093. SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1094. &twl4030_dapm_abypassl2_control),
  1095. SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
  1096. &twl4030_dapm_abypassv_control),
  1097. /* Master analog loopback switch */
  1098. SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
  1099. NULL, 0),
  1100. /* Digital bypasses */
  1101. SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
  1102. &twl4030_dapm_dbypassl_control),
  1103. SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
  1104. &twl4030_dapm_dbypassr_control),
  1105. SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
  1106. &twl4030_dapm_dbypassv_control),
  1107. /* Digital mixers, power control for the physical DACs */
  1108. SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
  1109. TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
  1110. SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
  1111. TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
  1112. SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
  1113. TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
  1114. SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
  1115. TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
  1116. SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
  1117. TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
  1118. /* Analog mixers, power control for the physical PGAs */
  1119. SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
  1120. TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
  1121. SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
  1122. TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
  1123. SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
  1124. TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
  1125. SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
  1126. TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
  1127. SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
  1128. TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
  1129. SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
  1130. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1131. SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
  1132. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1133. /* Output MIXER controls */
  1134. /* Earpiece */
  1135. SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
  1136. &twl4030_dapm_earpiece_controls[0],
  1137. ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
  1138. SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
  1139. 0, 0, NULL, 0, earpiecepga_event,
  1140. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1141. /* PreDrivL/R */
  1142. SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
  1143. &twl4030_dapm_predrivel_controls[0],
  1144. ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
  1145. SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
  1146. 0, 0, NULL, 0, predrivelpga_event,
  1147. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1148. SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
  1149. &twl4030_dapm_predriver_controls[0],
  1150. ARRAY_SIZE(twl4030_dapm_predriver_controls)),
  1151. SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
  1152. 0, 0, NULL, 0, predriverpga_event,
  1153. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1154. /* HeadsetL/R */
  1155. SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
  1156. &twl4030_dapm_hsol_controls[0],
  1157. ARRAY_SIZE(twl4030_dapm_hsol_controls)),
  1158. SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
  1159. 0, 0, NULL, 0, headsetlpga_event,
  1160. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1161. SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
  1162. &twl4030_dapm_hsor_controls[0],
  1163. ARRAY_SIZE(twl4030_dapm_hsor_controls)),
  1164. SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
  1165. 0, 0, NULL, 0, headsetrpga_event,
  1166. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1167. /* CarkitL/R */
  1168. SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
  1169. &twl4030_dapm_carkitl_controls[0],
  1170. ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
  1171. SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
  1172. 0, 0, NULL, 0, carkitlpga_event,
  1173. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1174. SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
  1175. &twl4030_dapm_carkitr_controls[0],
  1176. ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
  1177. SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
  1178. 0, 0, NULL, 0, carkitrpga_event,
  1179. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1180. /* Output MUX controls */
  1181. /* HandsfreeL/R */
  1182. SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
  1183. &twl4030_dapm_handsfreel_control),
  1184. SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
  1185. &twl4030_dapm_handsfreelmute_control),
  1186. SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
  1187. 0, 0, NULL, 0, handsfreelpga_event,
  1188. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1189. SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
  1190. &twl4030_dapm_handsfreer_control),
  1191. SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
  1192. &twl4030_dapm_handsfreermute_control),
  1193. SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
  1194. 0, 0, NULL, 0, handsfreerpga_event,
  1195. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1196. /* Vibra */
  1197. SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
  1198. &twl4030_dapm_vibra_control, vibramux_event,
  1199. SND_SOC_DAPM_PRE_PMU),
  1200. SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
  1201. &twl4030_dapm_vibrapath_control),
  1202. /* Introducing four virtual ADC, since TWL4030 have four channel for
  1203. capture */
  1204. SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
  1205. SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
  1206. SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
  1207. SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
  1208. /* Analog/Digital mic path selection.
  1209. TX1 Left/Right: either analog Left/Right or Digimic0
  1210. TX2 Left/Right: either analog Left/Right or Digimic1 */
  1211. SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
  1212. &twl4030_dapm_micpathtx1_control),
  1213. SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
  1214. &twl4030_dapm_micpathtx2_control),
  1215. /* Analog input mixers for the capture amplifiers */
  1216. SND_SOC_DAPM_MIXER("Analog Left",
  1217. TWL4030_REG_ANAMICL, 4, 0,
  1218. &twl4030_dapm_analoglmic_controls[0],
  1219. ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
  1220. SND_SOC_DAPM_MIXER("Analog Right",
  1221. TWL4030_REG_ANAMICR, 4, 0,
  1222. &twl4030_dapm_analogrmic_controls[0],
  1223. ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
  1224. SND_SOC_DAPM_PGA("ADC Physical Left",
  1225. TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
  1226. SND_SOC_DAPM_PGA("ADC Physical Right",
  1227. TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
  1228. SND_SOC_DAPM_PGA_E("Digimic0 Enable",
  1229. TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
  1230. digimic_event, SND_SOC_DAPM_POST_PMU),
  1231. SND_SOC_DAPM_PGA_E("Digimic1 Enable",
  1232. TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
  1233. digimic_event, SND_SOC_DAPM_POST_PMU),
  1234. SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
  1235. NULL, 0),
  1236. SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
  1237. NULL, 0),
  1238. SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
  1239. SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
  1240. SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
  1241. };
  1242. static const struct snd_soc_dapm_route intercon[] = {
  1243. /* Stream -> DAC mapping */
  1244. {"DAC Right1", NULL, "HiFi Playback"},
  1245. {"DAC Left1", NULL, "HiFi Playback"},
  1246. {"DAC Right2", NULL, "HiFi Playback"},
  1247. {"DAC Left2", NULL, "HiFi Playback"},
  1248. {"DAC Voice", NULL, "Voice Playback"},
  1249. /* ADC -> Stream mapping */
  1250. {"HiFi Capture", NULL, "ADC Virtual Left1"},
  1251. {"HiFi Capture", NULL, "ADC Virtual Right1"},
  1252. {"HiFi Capture", NULL, "ADC Virtual Left2"},
  1253. {"HiFi Capture", NULL, "ADC Virtual Right2"},
  1254. {"Voice Capture", NULL, "ADC Virtual Left1"},
  1255. {"Voice Capture", NULL, "ADC Virtual Right1"},
  1256. {"Voice Capture", NULL, "ADC Virtual Left2"},
  1257. {"Voice Capture", NULL, "ADC Virtual Right2"},
  1258. {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
  1259. {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
  1260. {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
  1261. {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
  1262. {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
  1263. /* Supply for the digital part (APLL) */
  1264. {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
  1265. {"DAC Left1", NULL, "AIF Enable"},
  1266. {"DAC Right1", NULL, "AIF Enable"},
  1267. {"DAC Left2", NULL, "AIF Enable"},
  1268. {"DAC Right1", NULL, "AIF Enable"},
  1269. {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
  1270. {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
  1271. {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
  1272. {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
  1273. {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
  1274. {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
  1275. {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
  1276. /* Internal playback routings */
  1277. /* Earpiece */
  1278. {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
  1279. {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1280. {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1281. {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1282. {"Earpiece PGA", NULL, "Earpiece Mixer"},
  1283. /* PreDrivL */
  1284. {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1285. {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1286. {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1287. {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1288. {"PredriveL PGA", NULL, "PredriveL Mixer"},
  1289. /* PreDrivR */
  1290. {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1291. {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1292. {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1293. {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1294. {"PredriveR PGA", NULL, "PredriveR Mixer"},
  1295. /* HeadsetL */
  1296. {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1297. {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1298. {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1299. {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
  1300. /* HeadsetR */
  1301. {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1302. {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1303. {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1304. {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
  1305. /* CarkitL */
  1306. {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1307. {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1308. {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1309. {"CarkitL PGA", NULL, "CarkitL Mixer"},
  1310. /* CarkitR */
  1311. {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1312. {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1313. {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1314. {"CarkitR PGA", NULL, "CarkitR Mixer"},
  1315. /* HandsfreeL */
  1316. {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
  1317. {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
  1318. {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1319. {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1320. {"HandsfreeL", "Switch", "HandsfreeL Mux"},
  1321. {"HandsfreeL PGA", NULL, "HandsfreeL"},
  1322. /* HandsfreeR */
  1323. {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
  1324. {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
  1325. {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1326. {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1327. {"HandsfreeR", "Switch", "HandsfreeR Mux"},
  1328. {"HandsfreeR PGA", NULL, "HandsfreeR"},
  1329. /* Vibra */
  1330. {"Vibra Mux", "AudioL1", "DAC Left1"},
  1331. {"Vibra Mux", "AudioR1", "DAC Right1"},
  1332. {"Vibra Mux", "AudioL2", "DAC Left2"},
  1333. {"Vibra Mux", "AudioR2", "DAC Right2"},
  1334. /* outputs */
  1335. /* Must be always connected (for AIF and APLL) */
  1336. {"Virtual HiFi OUT", NULL, "DAC Left1"},
  1337. {"Virtual HiFi OUT", NULL, "DAC Right1"},
  1338. {"Virtual HiFi OUT", NULL, "DAC Left2"},
  1339. {"Virtual HiFi OUT", NULL, "DAC Right2"},
  1340. /* Must be always connected (for APLL) */
  1341. {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
  1342. /* Physical outputs */
  1343. {"EARPIECE", NULL, "Earpiece PGA"},
  1344. {"PREDRIVEL", NULL, "PredriveL PGA"},
  1345. {"PREDRIVER", NULL, "PredriveR PGA"},
  1346. {"HSOL", NULL, "HeadsetL PGA"},
  1347. {"HSOR", NULL, "HeadsetR PGA"},
  1348. {"CARKITL", NULL, "CarkitL PGA"},
  1349. {"CARKITR", NULL, "CarkitR PGA"},
  1350. {"HFL", NULL, "HandsfreeL PGA"},
  1351. {"HFR", NULL, "HandsfreeR PGA"},
  1352. {"Vibra Route", "Audio", "Vibra Mux"},
  1353. {"VIBRA", NULL, "Vibra Route"},
  1354. /* Capture path */
  1355. /* Must be always connected (for AIF and APLL) */
  1356. {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
  1357. {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
  1358. {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
  1359. {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
  1360. /* Physical inputs */
  1361. {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
  1362. {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
  1363. {"Analog Left", "AUXL Capture Switch", "AUXL"},
  1364. {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
  1365. {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
  1366. {"Analog Right", "AUXR Capture Switch", "AUXR"},
  1367. {"ADC Physical Left", NULL, "Analog Left"},
  1368. {"ADC Physical Right", NULL, "Analog Right"},
  1369. {"Digimic0 Enable", NULL, "DIGIMIC0"},
  1370. {"Digimic1 Enable", NULL, "DIGIMIC1"},
  1371. {"DIGIMIC0", NULL, "micbias1 select"},
  1372. {"DIGIMIC1", NULL, "micbias2 select"},
  1373. /* TX1 Left capture path */
  1374. {"TX1 Capture Route", "Analog", "ADC Physical Left"},
  1375. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1376. /* TX1 Right capture path */
  1377. {"TX1 Capture Route", "Analog", "ADC Physical Right"},
  1378. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1379. /* TX2 Left capture path */
  1380. {"TX2 Capture Route", "Analog", "ADC Physical Left"},
  1381. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1382. /* TX2 Right capture path */
  1383. {"TX2 Capture Route", "Analog", "ADC Physical Right"},
  1384. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1385. {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
  1386. {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
  1387. {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
  1388. {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
  1389. {"ADC Virtual Left1", NULL, "AIF Enable"},
  1390. {"ADC Virtual Right1", NULL, "AIF Enable"},
  1391. {"ADC Virtual Left2", NULL, "AIF Enable"},
  1392. {"ADC Virtual Right2", NULL, "AIF Enable"},
  1393. /* Analog bypass routes */
  1394. {"Right1 Analog Loopback", "Switch", "Analog Right"},
  1395. {"Left1 Analog Loopback", "Switch", "Analog Left"},
  1396. {"Right2 Analog Loopback", "Switch", "Analog Right"},
  1397. {"Left2 Analog Loopback", "Switch", "Analog Left"},
  1398. {"Voice Analog Loopback", "Switch", "Analog Left"},
  1399. /* Supply for the Analog loopbacks */
  1400. {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
  1401. {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
  1402. {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
  1403. {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
  1404. {"Voice Analog Loopback", NULL, "FM Loop Enable"},
  1405. {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
  1406. {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
  1407. {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
  1408. {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
  1409. {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
  1410. /* Digital bypass routes */
  1411. {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
  1412. {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
  1413. {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
  1414. {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
  1415. {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
  1416. {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
  1417. };
  1418. static int twl4030_set_bias_level(struct snd_soc_codec *codec,
  1419. enum snd_soc_bias_level level)
  1420. {
  1421. switch (level) {
  1422. case SND_SOC_BIAS_ON:
  1423. break;
  1424. case SND_SOC_BIAS_PREPARE:
  1425. break;
  1426. case SND_SOC_BIAS_STANDBY:
  1427. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
  1428. twl4030_codec_enable(codec, 1);
  1429. break;
  1430. case SND_SOC_BIAS_OFF:
  1431. twl4030_codec_enable(codec, 0);
  1432. break;
  1433. }
  1434. codec->dapm.bias_level = level;
  1435. return 0;
  1436. }
  1437. static void twl4030_constraints(struct twl4030_priv *twl4030,
  1438. struct snd_pcm_substream *mst_substream)
  1439. {
  1440. struct snd_pcm_substream *slv_substream;
  1441. /* Pick the stream, which need to be constrained */
  1442. if (mst_substream == twl4030->master_substream)
  1443. slv_substream = twl4030->slave_substream;
  1444. else if (mst_substream == twl4030->slave_substream)
  1445. slv_substream = twl4030->master_substream;
  1446. else /* This should not happen.. */
  1447. return;
  1448. /* Set the constraints according to the already configured stream */
  1449. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1450. SNDRV_PCM_HW_PARAM_RATE,
  1451. twl4030->rate,
  1452. twl4030->rate);
  1453. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1454. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  1455. twl4030->sample_bits,
  1456. twl4030->sample_bits);
  1457. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1458. SNDRV_PCM_HW_PARAM_CHANNELS,
  1459. twl4030->channels,
  1460. twl4030->channels);
  1461. }
  1462. /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
  1463. * capture has to be enabled/disabled. */
  1464. static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
  1465. int enable)
  1466. {
  1467. u8 reg, mask;
  1468. reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
  1469. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1470. mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
  1471. else
  1472. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1473. if (enable)
  1474. reg |= mask;
  1475. else
  1476. reg &= ~mask;
  1477. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1478. }
  1479. static int twl4030_startup(struct snd_pcm_substream *substream,
  1480. struct snd_soc_dai *dai)
  1481. {
  1482. struct snd_soc_codec *codec = dai->codec;
  1483. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1484. if (twl4030->master_substream) {
  1485. twl4030->slave_substream = substream;
  1486. /* The DAI has one configuration for playback and capture, so
  1487. * if the DAI has been already configured then constrain this
  1488. * substream to match it. */
  1489. if (twl4030->configured)
  1490. twl4030_constraints(twl4030, twl4030->master_substream);
  1491. } else {
  1492. if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
  1493. TWL4030_OPTION_1)) {
  1494. /* In option2 4 channel is not supported, set the
  1495. * constraint for the first stream for channels, the
  1496. * second stream will 'inherit' this cosntraint */
  1497. snd_pcm_hw_constraint_minmax(substream->runtime,
  1498. SNDRV_PCM_HW_PARAM_CHANNELS,
  1499. 2, 2);
  1500. }
  1501. twl4030->master_substream = substream;
  1502. }
  1503. return 0;
  1504. }
  1505. static void twl4030_shutdown(struct snd_pcm_substream *substream,
  1506. struct snd_soc_dai *dai)
  1507. {
  1508. struct snd_soc_codec *codec = dai->codec;
  1509. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1510. if (twl4030->master_substream == substream)
  1511. twl4030->master_substream = twl4030->slave_substream;
  1512. twl4030->slave_substream = NULL;
  1513. /* If all streams are closed, or the remaining stream has not yet
  1514. * been configured than set the DAI as not configured. */
  1515. if (!twl4030->master_substream)
  1516. twl4030->configured = 0;
  1517. else if (!twl4030->master_substream->runtime->channels)
  1518. twl4030->configured = 0;
  1519. /* If the closing substream had 4 channel, do the necessary cleanup */
  1520. if (substream->runtime->channels == 4)
  1521. twl4030_tdm_enable(codec, substream->stream, 0);
  1522. }
  1523. static int twl4030_hw_params(struct snd_pcm_substream *substream,
  1524. struct snd_pcm_hw_params *params,
  1525. struct snd_soc_dai *dai)
  1526. {
  1527. struct snd_soc_codec *codec = dai->codec;
  1528. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1529. u8 mode, old_mode, format, old_format;
  1530. /* If the substream has 4 channel, do the necessary setup */
  1531. if (params_channels(params) == 4) {
  1532. format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1533. mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
  1534. /* Safety check: are we in the correct operating mode and
  1535. * the interface is in TDM mode? */
  1536. if ((mode & TWL4030_OPTION_1) &&
  1537. ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
  1538. twl4030_tdm_enable(codec, substream->stream, 1);
  1539. else
  1540. return -EINVAL;
  1541. }
  1542. if (twl4030->configured)
  1543. /* Ignoring hw_params for already configured DAI */
  1544. return 0;
  1545. /* bit rate */
  1546. old_mode = twl4030_read_reg_cache(codec,
  1547. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1548. mode = old_mode & ~TWL4030_APLL_RATE;
  1549. switch (params_rate(params)) {
  1550. case 8000:
  1551. mode |= TWL4030_APLL_RATE_8000;
  1552. break;
  1553. case 11025:
  1554. mode |= TWL4030_APLL_RATE_11025;
  1555. break;
  1556. case 12000:
  1557. mode |= TWL4030_APLL_RATE_12000;
  1558. break;
  1559. case 16000:
  1560. mode |= TWL4030_APLL_RATE_16000;
  1561. break;
  1562. case 22050:
  1563. mode |= TWL4030_APLL_RATE_22050;
  1564. break;
  1565. case 24000:
  1566. mode |= TWL4030_APLL_RATE_24000;
  1567. break;
  1568. case 32000:
  1569. mode |= TWL4030_APLL_RATE_32000;
  1570. break;
  1571. case 44100:
  1572. mode |= TWL4030_APLL_RATE_44100;
  1573. break;
  1574. case 48000:
  1575. mode |= TWL4030_APLL_RATE_48000;
  1576. break;
  1577. case 96000:
  1578. mode |= TWL4030_APLL_RATE_96000;
  1579. break;
  1580. default:
  1581. dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
  1582. params_rate(params));
  1583. return -EINVAL;
  1584. }
  1585. /* sample size */
  1586. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1587. format = old_format;
  1588. format &= ~TWL4030_DATA_WIDTH;
  1589. switch (params_format(params)) {
  1590. case SNDRV_PCM_FORMAT_S16_LE:
  1591. format |= TWL4030_DATA_WIDTH_16S_16W;
  1592. break;
  1593. case SNDRV_PCM_FORMAT_S32_LE:
  1594. format |= TWL4030_DATA_WIDTH_32S_24W;
  1595. break;
  1596. default:
  1597. dev_err(codec->dev, "%s: unknown format %d\n", __func__,
  1598. params_format(params));
  1599. return -EINVAL;
  1600. }
  1601. if (format != old_format || mode != old_mode) {
  1602. if (twl4030->codec_powered) {
  1603. /*
  1604. * If the codec is powered, than we need to toggle the
  1605. * codec power.
  1606. */
  1607. twl4030_codec_enable(codec, 0);
  1608. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1609. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1610. twl4030_codec_enable(codec, 1);
  1611. } else {
  1612. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1613. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1614. }
  1615. }
  1616. /* Store the important parameters for the DAI configuration and set
  1617. * the DAI as configured */
  1618. twl4030->configured = 1;
  1619. twl4030->rate = params_rate(params);
  1620. twl4030->sample_bits = hw_param_interval(params,
  1621. SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
  1622. twl4030->channels = params_channels(params);
  1623. /* If both playback and capture streams are open, and one of them
  1624. * is setting the hw parameters right now (since we are here), set
  1625. * constraints to the other stream to match the current one. */
  1626. if (twl4030->slave_substream)
  1627. twl4030_constraints(twl4030, substream);
  1628. return 0;
  1629. }
  1630. static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1631. int clk_id, unsigned int freq, int dir)
  1632. {
  1633. struct snd_soc_codec *codec = codec_dai->codec;
  1634. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1635. switch (freq) {
  1636. case 19200000:
  1637. case 26000000:
  1638. case 38400000:
  1639. break;
  1640. default:
  1641. dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
  1642. return -EINVAL;
  1643. }
  1644. if ((freq / 1000) != twl4030->sysclk) {
  1645. dev_err(codec->dev,
  1646. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1647. freq, twl4030->sysclk * 1000);
  1648. return -EINVAL;
  1649. }
  1650. return 0;
  1651. }
  1652. static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1653. unsigned int fmt)
  1654. {
  1655. struct snd_soc_codec *codec = codec_dai->codec;
  1656. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1657. u8 old_format, format;
  1658. /* get format */
  1659. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1660. format = old_format;
  1661. /* set master/slave audio interface */
  1662. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1663. case SND_SOC_DAIFMT_CBM_CFM:
  1664. format &= ~(TWL4030_AIF_SLAVE_EN);
  1665. format &= ~(TWL4030_CLK256FS_EN);
  1666. break;
  1667. case SND_SOC_DAIFMT_CBS_CFS:
  1668. format |= TWL4030_AIF_SLAVE_EN;
  1669. format |= TWL4030_CLK256FS_EN;
  1670. break;
  1671. default:
  1672. return -EINVAL;
  1673. }
  1674. /* interface format */
  1675. format &= ~TWL4030_AIF_FORMAT;
  1676. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1677. case SND_SOC_DAIFMT_I2S:
  1678. format |= TWL4030_AIF_FORMAT_CODEC;
  1679. break;
  1680. case SND_SOC_DAIFMT_DSP_A:
  1681. format |= TWL4030_AIF_FORMAT_TDM;
  1682. break;
  1683. default:
  1684. return -EINVAL;
  1685. }
  1686. if (format != old_format) {
  1687. if (twl4030->codec_powered) {
  1688. /*
  1689. * If the codec is powered, than we need to toggle the
  1690. * codec power.
  1691. */
  1692. twl4030_codec_enable(codec, 0);
  1693. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1694. twl4030_codec_enable(codec, 1);
  1695. } else {
  1696. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1697. }
  1698. }
  1699. return 0;
  1700. }
  1701. static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
  1702. {
  1703. struct snd_soc_codec *codec = dai->codec;
  1704. u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1705. if (tristate)
  1706. reg |= TWL4030_AIF_TRI_EN;
  1707. else
  1708. reg &= ~TWL4030_AIF_TRI_EN;
  1709. return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
  1710. }
  1711. /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
  1712. * (VTXL, VTXR) for uplink has to be enabled/disabled. */
  1713. static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
  1714. int enable)
  1715. {
  1716. u8 reg, mask;
  1717. reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
  1718. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1719. mask = TWL4030_ARXL1_VRX_EN;
  1720. else
  1721. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1722. if (enable)
  1723. reg |= mask;
  1724. else
  1725. reg &= ~mask;
  1726. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1727. }
  1728. static int twl4030_voice_startup(struct snd_pcm_substream *substream,
  1729. struct snd_soc_dai *dai)
  1730. {
  1731. struct snd_soc_codec *codec = dai->codec;
  1732. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1733. u8 mode;
  1734. /* If the system master clock is not 26MHz, the voice PCM interface is
  1735. * not available.
  1736. */
  1737. if (twl4030->sysclk != 26000) {
  1738. dev_err(codec->dev,
  1739. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1740. __func__, twl4030->sysclk);
  1741. return -EINVAL;
  1742. }
  1743. /* If the codec mode is not option2, the voice PCM interface is not
  1744. * available.
  1745. */
  1746. mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
  1747. & TWL4030_OPT_MODE;
  1748. if (mode != TWL4030_OPTION_2) {
  1749. dev_err(codec->dev, "%s: the codec mode is not option2\n",
  1750. __func__);
  1751. return -EINVAL;
  1752. }
  1753. return 0;
  1754. }
  1755. static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
  1756. struct snd_soc_dai *dai)
  1757. {
  1758. struct snd_soc_codec *codec = dai->codec;
  1759. /* Enable voice digital filters */
  1760. twl4030_voice_enable(codec, substream->stream, 0);
  1761. }
  1762. static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
  1763. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  1764. {
  1765. struct snd_soc_codec *codec = dai->codec;
  1766. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1767. u8 old_mode, mode;
  1768. /* Enable voice digital filters */
  1769. twl4030_voice_enable(codec, substream->stream, 1);
  1770. /* bit rate */
  1771. old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
  1772. & ~(TWL4030_CODECPDZ);
  1773. mode = old_mode;
  1774. switch (params_rate(params)) {
  1775. case 8000:
  1776. mode &= ~(TWL4030_SEL_16K);
  1777. break;
  1778. case 16000:
  1779. mode |= TWL4030_SEL_16K;
  1780. break;
  1781. default:
  1782. dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
  1783. params_rate(params));
  1784. return -EINVAL;
  1785. }
  1786. if (mode != old_mode) {
  1787. if (twl4030->codec_powered) {
  1788. /*
  1789. * If the codec is powered, than we need to toggle the
  1790. * codec power.
  1791. */
  1792. twl4030_codec_enable(codec, 0);
  1793. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1794. twl4030_codec_enable(codec, 1);
  1795. } else {
  1796. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1797. }
  1798. }
  1799. return 0;
  1800. }
  1801. static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1802. int clk_id, unsigned int freq, int dir)
  1803. {
  1804. struct snd_soc_codec *codec = codec_dai->codec;
  1805. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1806. if (freq != 26000000) {
  1807. dev_err(codec->dev,
  1808. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1809. __func__, freq / 1000);
  1810. return -EINVAL;
  1811. }
  1812. if ((freq / 1000) != twl4030->sysclk) {
  1813. dev_err(codec->dev,
  1814. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1815. freq, twl4030->sysclk * 1000);
  1816. return -EINVAL;
  1817. }
  1818. return 0;
  1819. }
  1820. static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1821. unsigned int fmt)
  1822. {
  1823. struct snd_soc_codec *codec = codec_dai->codec;
  1824. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1825. u8 old_format, format;
  1826. /* get format */
  1827. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
  1828. format = old_format;
  1829. /* set master/slave audio interface */
  1830. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1831. case SND_SOC_DAIFMT_CBM_CFM:
  1832. format &= ~(TWL4030_VIF_SLAVE_EN);
  1833. break;
  1834. case SND_SOC_DAIFMT_CBS_CFS:
  1835. format |= TWL4030_VIF_SLAVE_EN;
  1836. break;
  1837. default:
  1838. return -EINVAL;
  1839. }
  1840. /* clock inversion */
  1841. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1842. case SND_SOC_DAIFMT_IB_NF:
  1843. format &= ~(TWL4030_VIF_FORMAT);
  1844. break;
  1845. case SND_SOC_DAIFMT_NB_IF:
  1846. format |= TWL4030_VIF_FORMAT;
  1847. break;
  1848. default:
  1849. return -EINVAL;
  1850. }
  1851. if (format != old_format) {
  1852. if (twl4030->codec_powered) {
  1853. /*
  1854. * If the codec is powered, than we need to toggle the
  1855. * codec power.
  1856. */
  1857. twl4030_codec_enable(codec, 0);
  1858. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1859. twl4030_codec_enable(codec, 1);
  1860. } else {
  1861. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1862. }
  1863. }
  1864. return 0;
  1865. }
  1866. static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
  1867. {
  1868. struct snd_soc_codec *codec = dai->codec;
  1869. u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
  1870. if (tristate)
  1871. reg |= TWL4030_VIF_TRI_EN;
  1872. else
  1873. reg &= ~TWL4030_VIF_TRI_EN;
  1874. return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
  1875. }
  1876. #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
  1877. #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1878. static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
  1879. .startup = twl4030_startup,
  1880. .shutdown = twl4030_shutdown,
  1881. .hw_params = twl4030_hw_params,
  1882. .set_sysclk = twl4030_set_dai_sysclk,
  1883. .set_fmt = twl4030_set_dai_fmt,
  1884. .set_tristate = twl4030_set_tristate,
  1885. };
  1886. static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
  1887. .startup = twl4030_voice_startup,
  1888. .shutdown = twl4030_voice_shutdown,
  1889. .hw_params = twl4030_voice_hw_params,
  1890. .set_sysclk = twl4030_voice_set_dai_sysclk,
  1891. .set_fmt = twl4030_voice_set_dai_fmt,
  1892. .set_tristate = twl4030_voice_set_tristate,
  1893. };
  1894. static struct snd_soc_dai_driver twl4030_dai[] = {
  1895. {
  1896. .name = "twl4030-hifi",
  1897. .playback = {
  1898. .stream_name = "HiFi Playback",
  1899. .channels_min = 2,
  1900. .channels_max = 4,
  1901. .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
  1902. .formats = TWL4030_FORMATS,
  1903. .sig_bits = 24,},
  1904. .capture = {
  1905. .stream_name = "HiFi Capture",
  1906. .channels_min = 2,
  1907. .channels_max = 4,
  1908. .rates = TWL4030_RATES,
  1909. .formats = TWL4030_FORMATS,
  1910. .sig_bits = 24,},
  1911. .ops = &twl4030_dai_hifi_ops,
  1912. },
  1913. {
  1914. .name = "twl4030-voice",
  1915. .playback = {
  1916. .stream_name = "Voice Playback",
  1917. .channels_min = 1,
  1918. .channels_max = 1,
  1919. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1920. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1921. .capture = {
  1922. .stream_name = "Voice Capture",
  1923. .channels_min = 1,
  1924. .channels_max = 2,
  1925. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1926. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1927. .ops = &twl4030_dai_voice_ops,
  1928. },
  1929. };
  1930. static int twl4030_soc_suspend(struct snd_soc_codec *codec)
  1931. {
  1932. twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1933. return 0;
  1934. }
  1935. static int twl4030_soc_resume(struct snd_soc_codec *codec)
  1936. {
  1937. twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1938. return 0;
  1939. }
  1940. static int twl4030_soc_probe(struct snd_soc_codec *codec)
  1941. {
  1942. struct twl4030_priv *twl4030;
  1943. twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
  1944. if (twl4030 == NULL) {
  1945. dev_err(codec->dev, "Can not allocate memory\n");
  1946. return -ENOMEM;
  1947. }
  1948. snd_soc_codec_set_drvdata(codec, twl4030);
  1949. /* Set the defaults, and power up the codec */
  1950. twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
  1951. twl4030_init_chip(codec);
  1952. return 0;
  1953. }
  1954. static int twl4030_soc_remove(struct snd_soc_codec *codec)
  1955. {
  1956. struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
  1957. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1958. /* Reset registers to their chip default before leaving */
  1959. twl4030_reset_registers(codec);
  1960. twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1961. kfree(twl4030);
  1962. if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
  1963. gpio_free(pdata->hs_extmute_gpio);
  1964. return 0;
  1965. }
  1966. static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
  1967. .probe = twl4030_soc_probe,
  1968. .remove = twl4030_soc_remove,
  1969. .suspend = twl4030_soc_suspend,
  1970. .resume = twl4030_soc_resume,
  1971. .read = twl4030_read_reg_cache,
  1972. .write = twl4030_write,
  1973. .set_bias_level = twl4030_set_bias_level,
  1974. .idle_bias_off = true,
  1975. .reg_cache_size = sizeof(twl4030_reg),
  1976. .reg_word_size = sizeof(u8),
  1977. .reg_cache_default = twl4030_reg,
  1978. .controls = twl4030_snd_controls,
  1979. .num_controls = ARRAY_SIZE(twl4030_snd_controls),
  1980. .dapm_widgets = twl4030_dapm_widgets,
  1981. .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
  1982. .dapm_routes = intercon,
  1983. .num_dapm_routes = ARRAY_SIZE(intercon),
  1984. };
  1985. static int __devinit twl4030_codec_probe(struct platform_device *pdev)
  1986. {
  1987. struct twl4030_codec_data *pdata = pdev->dev.platform_data;
  1988. if (!pdata) {
  1989. dev_err(&pdev->dev, "platform_data is missing\n");
  1990. return -EINVAL;
  1991. }
  1992. return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
  1993. twl4030_dai, ARRAY_SIZE(twl4030_dai));
  1994. }
  1995. static int __devexit twl4030_codec_remove(struct platform_device *pdev)
  1996. {
  1997. snd_soc_unregister_codec(&pdev->dev);
  1998. return 0;
  1999. }
  2000. MODULE_ALIAS("platform:twl4030-codec");
  2001. static struct platform_driver twl4030_codec_driver = {
  2002. .probe = twl4030_codec_probe,
  2003. .remove = __devexit_p(twl4030_codec_remove),
  2004. .driver = {
  2005. .name = "twl4030-codec",
  2006. .owner = THIS_MODULE,
  2007. },
  2008. };
  2009. module_platform_driver(twl4030_codec_driver);
  2010. MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
  2011. MODULE_AUTHOR("Steve Sakoman");
  2012. MODULE_LICENSE("GPL");