hpsa.c 113 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. /* define the PCI info for the cards we can control */
  72. static const struct pci_device_id hpsa_pci_device_id[] = {
  73. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  86. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  87. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  88. {0,}
  89. };
  90. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  91. /* board_id = Subsystem Device ID & Vendor ID
  92. * product = Marketing Name for the board
  93. * access = Address of the struct of function pointers
  94. */
  95. static struct board_type products[] = {
  96. {0x3241103C, "Smart Array P212", &SA5_access},
  97. {0x3243103C, "Smart Array P410", &SA5_access},
  98. {0x3245103C, "Smart Array P410i", &SA5_access},
  99. {0x3247103C, "Smart Array P411", &SA5_access},
  100. {0x3249103C, "Smart Array P812", &SA5_access},
  101. {0x324a103C, "Smart Array P712m", &SA5_access},
  102. {0x324b103C, "Smart Array P711m", &SA5_access},
  103. {0x3250103C, "Smart Array", &SA5_access},
  104. {0x3250113C, "Smart Array", &SA5_access},
  105. {0x3250123C, "Smart Array", &SA5_access},
  106. {0x3250133C, "Smart Array", &SA5_access},
  107. {0x3250143C, "Smart Array", &SA5_access},
  108. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  109. };
  110. static int number_of_controllers;
  111. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  112. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  113. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  114. static void start_io(struct ctlr_info *h);
  115. #ifdef CONFIG_COMPAT
  116. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  117. #endif
  118. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  119. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  120. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  121. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  122. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  123. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  124. int cmd_type);
  125. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  126. static void hpsa_scan_start(struct Scsi_Host *);
  127. static int hpsa_scan_finished(struct Scsi_Host *sh,
  128. unsigned long elapsed_time);
  129. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  130. int qdepth, int reason);
  131. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  132. static int hpsa_slave_alloc(struct scsi_device *sdev);
  133. static void hpsa_slave_destroy(struct scsi_device *sdev);
  134. static ssize_t raid_level_show(struct device *dev,
  135. struct device_attribute *attr, char *buf);
  136. static ssize_t lunid_show(struct device *dev,
  137. struct device_attribute *attr, char *buf);
  138. static ssize_t unique_id_show(struct device *dev,
  139. struct device_attribute *attr, char *buf);
  140. static ssize_t host_show_firmware_revision(struct device *dev,
  141. struct device_attribute *attr, char *buf);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static ssize_t host_store_rescan(struct device *dev,
  144. struct device_attribute *attr, const char *buf, size_t count);
  145. static int check_for_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. static void check_ioctl_unit_attention(struct ctlr_info *h,
  148. struct CommandList *c);
  149. /* performant mode helper functions */
  150. static void calc_bucket_map(int *bucket, int num_buckets,
  151. int nsgs, int *bucket_map);
  152. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  153. static inline u32 next_command(struct ctlr_info *h);
  154. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  155. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  156. u64 *cfg_offset);
  157. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  158. unsigned long *memory_bar);
  159. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  160. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  161. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  162. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  163. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  164. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  165. host_show_firmware_revision, NULL);
  166. static struct device_attribute *hpsa_sdev_attrs[] = {
  167. &dev_attr_raid_level,
  168. &dev_attr_lunid,
  169. &dev_attr_unique_id,
  170. NULL,
  171. };
  172. static struct device_attribute *hpsa_shost_attrs[] = {
  173. &dev_attr_rescan,
  174. &dev_attr_firmware_revision,
  175. NULL,
  176. };
  177. static struct scsi_host_template hpsa_driver_template = {
  178. .module = THIS_MODULE,
  179. .name = "hpsa",
  180. .proc_name = "hpsa",
  181. .queuecommand = hpsa_scsi_queue_command,
  182. .scan_start = hpsa_scan_start,
  183. .scan_finished = hpsa_scan_finished,
  184. .change_queue_depth = hpsa_change_queue_depth,
  185. .this_id = -1,
  186. .use_clustering = ENABLE_CLUSTERING,
  187. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  188. .ioctl = hpsa_ioctl,
  189. .slave_alloc = hpsa_slave_alloc,
  190. .slave_destroy = hpsa_slave_destroy,
  191. #ifdef CONFIG_COMPAT
  192. .compat_ioctl = hpsa_compat_ioctl,
  193. #endif
  194. .sdev_attrs = hpsa_sdev_attrs,
  195. .shost_attrs = hpsa_shost_attrs,
  196. };
  197. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  198. {
  199. unsigned long *priv = shost_priv(sdev->host);
  200. return (struct ctlr_info *) *priv;
  201. }
  202. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  203. {
  204. unsigned long *priv = shost_priv(sh);
  205. return (struct ctlr_info *) *priv;
  206. }
  207. static int check_for_unit_attention(struct ctlr_info *h,
  208. struct CommandList *c)
  209. {
  210. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  211. return 0;
  212. switch (c->err_info->SenseInfo[12]) {
  213. case STATE_CHANGED:
  214. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  215. "detected, command retried\n", h->ctlr);
  216. break;
  217. case LUN_FAILED:
  218. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  219. "detected, action required\n", h->ctlr);
  220. break;
  221. case REPORT_LUNS_CHANGED:
  222. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  223. "changed, action required\n", h->ctlr);
  224. /*
  225. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  226. */
  227. break;
  228. case POWER_OR_RESET:
  229. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  230. "or device reset detected\n", h->ctlr);
  231. break;
  232. case UNIT_ATTENTION_CLEARED:
  233. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  234. "cleared by another initiator\n", h->ctlr);
  235. break;
  236. default:
  237. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  238. "unit attention detected\n", h->ctlr);
  239. break;
  240. }
  241. return 1;
  242. }
  243. static ssize_t host_store_rescan(struct device *dev,
  244. struct device_attribute *attr,
  245. const char *buf, size_t count)
  246. {
  247. struct ctlr_info *h;
  248. struct Scsi_Host *shost = class_to_shost(dev);
  249. h = shost_to_hba(shost);
  250. hpsa_scan_start(h->scsi_host);
  251. return count;
  252. }
  253. static ssize_t host_show_firmware_revision(struct device *dev,
  254. struct device_attribute *attr, char *buf)
  255. {
  256. struct ctlr_info *h;
  257. struct Scsi_Host *shost = class_to_shost(dev);
  258. unsigned char *fwrev;
  259. h = shost_to_hba(shost);
  260. if (!h->hba_inquiry_data)
  261. return 0;
  262. fwrev = &h->hba_inquiry_data[32];
  263. return snprintf(buf, 20, "%c%c%c%c\n",
  264. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  265. }
  266. /* Enqueuing and dequeuing functions for cmdlists. */
  267. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  268. {
  269. hlist_add_head(&c->list, list);
  270. }
  271. static inline u32 next_command(struct ctlr_info *h)
  272. {
  273. u32 a;
  274. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  275. return h->access.command_completed(h);
  276. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  277. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  278. (h->reply_pool_head)++;
  279. h->commands_outstanding--;
  280. } else {
  281. a = FIFO_EMPTY;
  282. }
  283. /* Check for wraparound */
  284. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  285. h->reply_pool_head = h->reply_pool;
  286. h->reply_pool_wraparound ^= 1;
  287. }
  288. return a;
  289. }
  290. /* set_performant_mode: Modify the tag for cciss performant
  291. * set bit 0 for pull model, bits 3-1 for block fetch
  292. * register number
  293. */
  294. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  295. {
  296. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  297. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  298. }
  299. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  300. struct CommandList *c)
  301. {
  302. unsigned long flags;
  303. set_performant_mode(h, c);
  304. spin_lock_irqsave(&h->lock, flags);
  305. addQ(&h->reqQ, c);
  306. h->Qdepth++;
  307. start_io(h);
  308. spin_unlock_irqrestore(&h->lock, flags);
  309. }
  310. static inline void removeQ(struct CommandList *c)
  311. {
  312. if (WARN_ON(hlist_unhashed(&c->list)))
  313. return;
  314. hlist_del_init(&c->list);
  315. }
  316. static inline int is_hba_lunid(unsigned char scsi3addr[])
  317. {
  318. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  319. }
  320. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  321. {
  322. return (scsi3addr[3] & 0xC0) == 0x40;
  323. }
  324. static inline int is_scsi_rev_5(struct ctlr_info *h)
  325. {
  326. if (!h->hba_inquiry_data)
  327. return 0;
  328. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  329. return 1;
  330. return 0;
  331. }
  332. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  333. "UNKNOWN"
  334. };
  335. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  336. static ssize_t raid_level_show(struct device *dev,
  337. struct device_attribute *attr, char *buf)
  338. {
  339. ssize_t l = 0;
  340. unsigned char rlevel;
  341. struct ctlr_info *h;
  342. struct scsi_device *sdev;
  343. struct hpsa_scsi_dev_t *hdev;
  344. unsigned long flags;
  345. sdev = to_scsi_device(dev);
  346. h = sdev_to_hba(sdev);
  347. spin_lock_irqsave(&h->lock, flags);
  348. hdev = sdev->hostdata;
  349. if (!hdev) {
  350. spin_unlock_irqrestore(&h->lock, flags);
  351. return -ENODEV;
  352. }
  353. /* Is this even a logical drive? */
  354. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  355. spin_unlock_irqrestore(&h->lock, flags);
  356. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  357. return l;
  358. }
  359. rlevel = hdev->raid_level;
  360. spin_unlock_irqrestore(&h->lock, flags);
  361. if (rlevel > RAID_UNKNOWN)
  362. rlevel = RAID_UNKNOWN;
  363. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  364. return l;
  365. }
  366. static ssize_t lunid_show(struct device *dev,
  367. struct device_attribute *attr, char *buf)
  368. {
  369. struct ctlr_info *h;
  370. struct scsi_device *sdev;
  371. struct hpsa_scsi_dev_t *hdev;
  372. unsigned long flags;
  373. unsigned char lunid[8];
  374. sdev = to_scsi_device(dev);
  375. h = sdev_to_hba(sdev);
  376. spin_lock_irqsave(&h->lock, flags);
  377. hdev = sdev->hostdata;
  378. if (!hdev) {
  379. spin_unlock_irqrestore(&h->lock, flags);
  380. return -ENODEV;
  381. }
  382. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  385. lunid[0], lunid[1], lunid[2], lunid[3],
  386. lunid[4], lunid[5], lunid[6], lunid[7]);
  387. }
  388. static ssize_t unique_id_show(struct device *dev,
  389. struct device_attribute *attr, char *buf)
  390. {
  391. struct ctlr_info *h;
  392. struct scsi_device *sdev;
  393. struct hpsa_scsi_dev_t *hdev;
  394. unsigned long flags;
  395. unsigned char sn[16];
  396. sdev = to_scsi_device(dev);
  397. h = sdev_to_hba(sdev);
  398. spin_lock_irqsave(&h->lock, flags);
  399. hdev = sdev->hostdata;
  400. if (!hdev) {
  401. spin_unlock_irqrestore(&h->lock, flags);
  402. return -ENODEV;
  403. }
  404. memcpy(sn, hdev->device_id, sizeof(sn));
  405. spin_unlock_irqrestore(&h->lock, flags);
  406. return snprintf(buf, 16 * 2 + 2,
  407. "%02X%02X%02X%02X%02X%02X%02X%02X"
  408. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  409. sn[0], sn[1], sn[2], sn[3],
  410. sn[4], sn[5], sn[6], sn[7],
  411. sn[8], sn[9], sn[10], sn[11],
  412. sn[12], sn[13], sn[14], sn[15]);
  413. }
  414. static int hpsa_find_target_lun(struct ctlr_info *h,
  415. unsigned char scsi3addr[], int bus, int *target, int *lun)
  416. {
  417. /* finds an unused bus, target, lun for a new physical device
  418. * assumes h->devlock is held
  419. */
  420. int i, found = 0;
  421. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  422. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  423. for (i = 0; i < h->ndevices; i++) {
  424. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  425. set_bit(h->dev[i]->target, lun_taken);
  426. }
  427. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  428. if (!test_bit(i, lun_taken)) {
  429. /* *bus = 1; */
  430. *target = i;
  431. *lun = 0;
  432. found = 1;
  433. break;
  434. }
  435. }
  436. return !found;
  437. }
  438. /* Add an entry into h->dev[] array. */
  439. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  440. struct hpsa_scsi_dev_t *device,
  441. struct hpsa_scsi_dev_t *added[], int *nadded)
  442. {
  443. /* assumes h->devlock is held */
  444. int n = h->ndevices;
  445. int i;
  446. unsigned char addr1[8], addr2[8];
  447. struct hpsa_scsi_dev_t *sd;
  448. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  449. dev_err(&h->pdev->dev, "too many devices, some will be "
  450. "inaccessible.\n");
  451. return -1;
  452. }
  453. /* physical devices do not have lun or target assigned until now. */
  454. if (device->lun != -1)
  455. /* Logical device, lun is already assigned. */
  456. goto lun_assigned;
  457. /* If this device a non-zero lun of a multi-lun device
  458. * byte 4 of the 8-byte LUN addr will contain the logical
  459. * unit no, zero otherise.
  460. */
  461. if (device->scsi3addr[4] == 0) {
  462. /* This is not a non-zero lun of a multi-lun device */
  463. if (hpsa_find_target_lun(h, device->scsi3addr,
  464. device->bus, &device->target, &device->lun) != 0)
  465. return -1;
  466. goto lun_assigned;
  467. }
  468. /* This is a non-zero lun of a multi-lun device.
  469. * Search through our list and find the device which
  470. * has the same 8 byte LUN address, excepting byte 4.
  471. * Assign the same bus and target for this new LUN.
  472. * Use the logical unit number from the firmware.
  473. */
  474. memcpy(addr1, device->scsi3addr, 8);
  475. addr1[4] = 0;
  476. for (i = 0; i < n; i++) {
  477. sd = h->dev[i];
  478. memcpy(addr2, sd->scsi3addr, 8);
  479. addr2[4] = 0;
  480. /* differ only in byte 4? */
  481. if (memcmp(addr1, addr2, 8) == 0) {
  482. device->bus = sd->bus;
  483. device->target = sd->target;
  484. device->lun = device->scsi3addr[4];
  485. break;
  486. }
  487. }
  488. if (device->lun == -1) {
  489. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  490. " suspect firmware bug or unsupported hardware "
  491. "configuration.\n");
  492. return -1;
  493. }
  494. lun_assigned:
  495. h->dev[n] = device;
  496. h->ndevices++;
  497. added[*nadded] = device;
  498. (*nadded)++;
  499. /* initially, (before registering with scsi layer) we don't
  500. * know our hostno and we don't want to print anything first
  501. * time anyway (the scsi layer's inquiries will show that info)
  502. */
  503. /* if (hostno != -1) */
  504. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  505. scsi_device_type(device->devtype), hostno,
  506. device->bus, device->target, device->lun);
  507. return 0;
  508. }
  509. /* Replace an entry from h->dev[] array. */
  510. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  511. int entry, struct hpsa_scsi_dev_t *new_entry,
  512. struct hpsa_scsi_dev_t *added[], int *nadded,
  513. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  514. {
  515. /* assumes h->devlock is held */
  516. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  517. removed[*nremoved] = h->dev[entry];
  518. (*nremoved)++;
  519. h->dev[entry] = new_entry;
  520. added[*nadded] = new_entry;
  521. (*nadded)++;
  522. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  523. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  524. new_entry->target, new_entry->lun);
  525. }
  526. /* Remove an entry from h->dev[] array. */
  527. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  528. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  529. {
  530. /* assumes h->devlock is held */
  531. int i;
  532. struct hpsa_scsi_dev_t *sd;
  533. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  534. sd = h->dev[entry];
  535. removed[*nremoved] = h->dev[entry];
  536. (*nremoved)++;
  537. for (i = entry; i < h->ndevices-1; i++)
  538. h->dev[i] = h->dev[i+1];
  539. h->ndevices--;
  540. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  541. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  542. sd->lun);
  543. }
  544. #define SCSI3ADDR_EQ(a, b) ( \
  545. (a)[7] == (b)[7] && \
  546. (a)[6] == (b)[6] && \
  547. (a)[5] == (b)[5] && \
  548. (a)[4] == (b)[4] && \
  549. (a)[3] == (b)[3] && \
  550. (a)[2] == (b)[2] && \
  551. (a)[1] == (b)[1] && \
  552. (a)[0] == (b)[0])
  553. static void fixup_botched_add(struct ctlr_info *h,
  554. struct hpsa_scsi_dev_t *added)
  555. {
  556. /* called when scsi_add_device fails in order to re-adjust
  557. * h->dev[] to match the mid layer's view.
  558. */
  559. unsigned long flags;
  560. int i, j;
  561. spin_lock_irqsave(&h->lock, flags);
  562. for (i = 0; i < h->ndevices; i++) {
  563. if (h->dev[i] == added) {
  564. for (j = i; j < h->ndevices-1; j++)
  565. h->dev[j] = h->dev[j+1];
  566. h->ndevices--;
  567. break;
  568. }
  569. }
  570. spin_unlock_irqrestore(&h->lock, flags);
  571. kfree(added);
  572. }
  573. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  574. struct hpsa_scsi_dev_t *dev2)
  575. {
  576. /* we compare everything except lun and target as these
  577. * are not yet assigned. Compare parts likely
  578. * to differ first
  579. */
  580. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  581. sizeof(dev1->scsi3addr)) != 0)
  582. return 0;
  583. if (memcmp(dev1->device_id, dev2->device_id,
  584. sizeof(dev1->device_id)) != 0)
  585. return 0;
  586. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  587. return 0;
  588. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  589. return 0;
  590. if (dev1->devtype != dev2->devtype)
  591. return 0;
  592. if (dev1->bus != dev2->bus)
  593. return 0;
  594. return 1;
  595. }
  596. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  597. * and return needle location in *index. If scsi3addr matches, but not
  598. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  599. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  600. */
  601. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  602. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  603. int *index)
  604. {
  605. int i;
  606. #define DEVICE_NOT_FOUND 0
  607. #define DEVICE_CHANGED 1
  608. #define DEVICE_SAME 2
  609. for (i = 0; i < haystack_size; i++) {
  610. if (haystack[i] == NULL) /* previously removed. */
  611. continue;
  612. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  613. *index = i;
  614. if (device_is_the_same(needle, haystack[i]))
  615. return DEVICE_SAME;
  616. else
  617. return DEVICE_CHANGED;
  618. }
  619. }
  620. *index = -1;
  621. return DEVICE_NOT_FOUND;
  622. }
  623. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  624. struct hpsa_scsi_dev_t *sd[], int nsds)
  625. {
  626. /* sd contains scsi3 addresses and devtypes, and inquiry
  627. * data. This function takes what's in sd to be the current
  628. * reality and updates h->dev[] to reflect that reality.
  629. */
  630. int i, entry, device_change, changes = 0;
  631. struct hpsa_scsi_dev_t *csd;
  632. unsigned long flags;
  633. struct hpsa_scsi_dev_t **added, **removed;
  634. int nadded, nremoved;
  635. struct Scsi_Host *sh = NULL;
  636. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  637. GFP_KERNEL);
  638. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  639. GFP_KERNEL);
  640. if (!added || !removed) {
  641. dev_warn(&h->pdev->dev, "out of memory in "
  642. "adjust_hpsa_scsi_table\n");
  643. goto free_and_out;
  644. }
  645. spin_lock_irqsave(&h->devlock, flags);
  646. /* find any devices in h->dev[] that are not in
  647. * sd[] and remove them from h->dev[], and for any
  648. * devices which have changed, remove the old device
  649. * info and add the new device info.
  650. */
  651. i = 0;
  652. nremoved = 0;
  653. nadded = 0;
  654. while (i < h->ndevices) {
  655. csd = h->dev[i];
  656. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  657. if (device_change == DEVICE_NOT_FOUND) {
  658. changes++;
  659. hpsa_scsi_remove_entry(h, hostno, i,
  660. removed, &nremoved);
  661. continue; /* remove ^^^, hence i not incremented */
  662. } else if (device_change == DEVICE_CHANGED) {
  663. changes++;
  664. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  665. added, &nadded, removed, &nremoved);
  666. /* Set it to NULL to prevent it from being freed
  667. * at the bottom of hpsa_update_scsi_devices()
  668. */
  669. sd[entry] = NULL;
  670. }
  671. i++;
  672. }
  673. /* Now, make sure every device listed in sd[] is also
  674. * listed in h->dev[], adding them if they aren't found
  675. */
  676. for (i = 0; i < nsds; i++) {
  677. if (!sd[i]) /* if already added above. */
  678. continue;
  679. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  680. h->ndevices, &entry);
  681. if (device_change == DEVICE_NOT_FOUND) {
  682. changes++;
  683. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  684. added, &nadded) != 0)
  685. break;
  686. sd[i] = NULL; /* prevent from being freed later. */
  687. } else if (device_change == DEVICE_CHANGED) {
  688. /* should never happen... */
  689. changes++;
  690. dev_warn(&h->pdev->dev,
  691. "device unexpectedly changed.\n");
  692. /* but if it does happen, we just ignore that device */
  693. }
  694. }
  695. spin_unlock_irqrestore(&h->devlock, flags);
  696. /* Don't notify scsi mid layer of any changes the first time through
  697. * (or if there are no changes) scsi_scan_host will do it later the
  698. * first time through.
  699. */
  700. if (hostno == -1 || !changes)
  701. goto free_and_out;
  702. sh = h->scsi_host;
  703. /* Notify scsi mid layer of any removed devices */
  704. for (i = 0; i < nremoved; i++) {
  705. struct scsi_device *sdev =
  706. scsi_device_lookup(sh, removed[i]->bus,
  707. removed[i]->target, removed[i]->lun);
  708. if (sdev != NULL) {
  709. scsi_remove_device(sdev);
  710. scsi_device_put(sdev);
  711. } else {
  712. /* We don't expect to get here.
  713. * future cmds to this device will get selection
  714. * timeout as if the device was gone.
  715. */
  716. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  717. " for removal.", hostno, removed[i]->bus,
  718. removed[i]->target, removed[i]->lun);
  719. }
  720. kfree(removed[i]);
  721. removed[i] = NULL;
  722. }
  723. /* Notify scsi mid layer of any added devices */
  724. for (i = 0; i < nadded; i++) {
  725. if (scsi_add_device(sh, added[i]->bus,
  726. added[i]->target, added[i]->lun) == 0)
  727. continue;
  728. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  729. "device not added.\n", hostno, added[i]->bus,
  730. added[i]->target, added[i]->lun);
  731. /* now we have to remove it from h->dev,
  732. * since it didn't get added to scsi mid layer
  733. */
  734. fixup_botched_add(h, added[i]);
  735. }
  736. free_and_out:
  737. kfree(added);
  738. kfree(removed);
  739. }
  740. /*
  741. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  742. * Assume's h->devlock is held.
  743. */
  744. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  745. int bus, int target, int lun)
  746. {
  747. int i;
  748. struct hpsa_scsi_dev_t *sd;
  749. for (i = 0; i < h->ndevices; i++) {
  750. sd = h->dev[i];
  751. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  752. return sd;
  753. }
  754. return NULL;
  755. }
  756. /* link sdev->hostdata to our per-device structure. */
  757. static int hpsa_slave_alloc(struct scsi_device *sdev)
  758. {
  759. struct hpsa_scsi_dev_t *sd;
  760. unsigned long flags;
  761. struct ctlr_info *h;
  762. h = sdev_to_hba(sdev);
  763. spin_lock_irqsave(&h->devlock, flags);
  764. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  765. sdev_id(sdev), sdev->lun);
  766. if (sd != NULL)
  767. sdev->hostdata = sd;
  768. spin_unlock_irqrestore(&h->devlock, flags);
  769. return 0;
  770. }
  771. static void hpsa_slave_destroy(struct scsi_device *sdev)
  772. {
  773. /* nothing to do. */
  774. }
  775. static void hpsa_scsi_setup(struct ctlr_info *h)
  776. {
  777. h->ndevices = 0;
  778. h->scsi_host = NULL;
  779. spin_lock_init(&h->devlock);
  780. }
  781. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  782. {
  783. int i;
  784. if (!h->cmd_sg_list)
  785. return;
  786. for (i = 0; i < h->nr_cmds; i++) {
  787. kfree(h->cmd_sg_list[i]);
  788. h->cmd_sg_list[i] = NULL;
  789. }
  790. kfree(h->cmd_sg_list);
  791. h->cmd_sg_list = NULL;
  792. }
  793. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  794. {
  795. int i;
  796. if (h->chainsize <= 0)
  797. return 0;
  798. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  799. GFP_KERNEL);
  800. if (!h->cmd_sg_list)
  801. return -ENOMEM;
  802. for (i = 0; i < h->nr_cmds; i++) {
  803. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  804. h->chainsize, GFP_KERNEL);
  805. if (!h->cmd_sg_list[i])
  806. goto clean;
  807. }
  808. return 0;
  809. clean:
  810. hpsa_free_sg_chain_blocks(h);
  811. return -ENOMEM;
  812. }
  813. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  814. struct CommandList *c)
  815. {
  816. struct SGDescriptor *chain_sg, *chain_block;
  817. u64 temp64;
  818. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  819. chain_block = h->cmd_sg_list[c->cmdindex];
  820. chain_sg->Ext = HPSA_SG_CHAIN;
  821. chain_sg->Len = sizeof(*chain_sg) *
  822. (c->Header.SGTotal - h->max_cmd_sg_entries);
  823. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  824. PCI_DMA_TODEVICE);
  825. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  826. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  827. }
  828. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  829. struct CommandList *c)
  830. {
  831. struct SGDescriptor *chain_sg;
  832. union u64bit temp64;
  833. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  834. return;
  835. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  836. temp64.val32.lower = chain_sg->Addr.lower;
  837. temp64.val32.upper = chain_sg->Addr.upper;
  838. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  839. }
  840. static void complete_scsi_command(struct CommandList *cp,
  841. int timeout, u32 tag)
  842. {
  843. struct scsi_cmnd *cmd;
  844. struct ctlr_info *h;
  845. struct ErrorInfo *ei;
  846. unsigned char sense_key;
  847. unsigned char asc; /* additional sense code */
  848. unsigned char ascq; /* additional sense code qualifier */
  849. ei = cp->err_info;
  850. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  851. h = cp->h;
  852. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  853. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  854. hpsa_unmap_sg_chain_block(h, cp);
  855. cmd->result = (DID_OK << 16); /* host byte */
  856. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  857. cmd->result |= ei->ScsiStatus;
  858. /* copy the sense data whether we need to or not. */
  859. memcpy(cmd->sense_buffer, ei->SenseInfo,
  860. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  861. SCSI_SENSE_BUFFERSIZE :
  862. ei->SenseLen);
  863. scsi_set_resid(cmd, ei->ResidualCnt);
  864. if (ei->CommandStatus == 0) {
  865. cmd->scsi_done(cmd);
  866. cmd_free(h, cp);
  867. return;
  868. }
  869. /* an error has occurred */
  870. switch (ei->CommandStatus) {
  871. case CMD_TARGET_STATUS:
  872. if (ei->ScsiStatus) {
  873. /* Get sense key */
  874. sense_key = 0xf & ei->SenseInfo[2];
  875. /* Get additional sense code */
  876. asc = ei->SenseInfo[12];
  877. /* Get addition sense code qualifier */
  878. ascq = ei->SenseInfo[13];
  879. }
  880. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  881. if (check_for_unit_attention(h, cp)) {
  882. cmd->result = DID_SOFT_ERROR << 16;
  883. break;
  884. }
  885. if (sense_key == ILLEGAL_REQUEST) {
  886. /*
  887. * SCSI REPORT_LUNS is commonly unsupported on
  888. * Smart Array. Suppress noisy complaint.
  889. */
  890. if (cp->Request.CDB[0] == REPORT_LUNS)
  891. break;
  892. /* If ASC/ASCQ indicate Logical Unit
  893. * Not Supported condition,
  894. */
  895. if ((asc == 0x25) && (ascq == 0x0)) {
  896. dev_warn(&h->pdev->dev, "cp %p "
  897. "has check condition\n", cp);
  898. break;
  899. }
  900. }
  901. if (sense_key == NOT_READY) {
  902. /* If Sense is Not Ready, Logical Unit
  903. * Not ready, Manual Intervention
  904. * required
  905. */
  906. if ((asc == 0x04) && (ascq == 0x03)) {
  907. dev_warn(&h->pdev->dev, "cp %p "
  908. "has check condition: unit "
  909. "not ready, manual "
  910. "intervention required\n", cp);
  911. break;
  912. }
  913. }
  914. if (sense_key == ABORTED_COMMAND) {
  915. /* Aborted command is retryable */
  916. dev_warn(&h->pdev->dev, "cp %p "
  917. "has check condition: aborted command: "
  918. "ASC: 0x%x, ASCQ: 0x%x\n",
  919. cp, asc, ascq);
  920. cmd->result = DID_SOFT_ERROR << 16;
  921. break;
  922. }
  923. /* Must be some other type of check condition */
  924. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  925. "unknown type: "
  926. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  927. "Returning result: 0x%x, "
  928. "cmd=[%02x %02x %02x %02x %02x "
  929. "%02x %02x %02x %02x %02x %02x "
  930. "%02x %02x %02x %02x %02x]\n",
  931. cp, sense_key, asc, ascq,
  932. cmd->result,
  933. cmd->cmnd[0], cmd->cmnd[1],
  934. cmd->cmnd[2], cmd->cmnd[3],
  935. cmd->cmnd[4], cmd->cmnd[5],
  936. cmd->cmnd[6], cmd->cmnd[7],
  937. cmd->cmnd[8], cmd->cmnd[9],
  938. cmd->cmnd[10], cmd->cmnd[11],
  939. cmd->cmnd[12], cmd->cmnd[13],
  940. cmd->cmnd[14], cmd->cmnd[15]);
  941. break;
  942. }
  943. /* Problem was not a check condition
  944. * Pass it up to the upper layers...
  945. */
  946. if (ei->ScsiStatus) {
  947. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  948. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  949. "Returning result: 0x%x\n",
  950. cp, ei->ScsiStatus,
  951. sense_key, asc, ascq,
  952. cmd->result);
  953. } else { /* scsi status is zero??? How??? */
  954. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  955. "Returning no connection.\n", cp),
  956. /* Ordinarily, this case should never happen,
  957. * but there is a bug in some released firmware
  958. * revisions that allows it to happen if, for
  959. * example, a 4100 backplane loses power and
  960. * the tape drive is in it. We assume that
  961. * it's a fatal error of some kind because we
  962. * can't show that it wasn't. We will make it
  963. * look like selection timeout since that is
  964. * the most common reason for this to occur,
  965. * and it's severe enough.
  966. */
  967. cmd->result = DID_NO_CONNECT << 16;
  968. }
  969. break;
  970. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  971. break;
  972. case CMD_DATA_OVERRUN:
  973. dev_warn(&h->pdev->dev, "cp %p has"
  974. " completed with data overrun "
  975. "reported\n", cp);
  976. break;
  977. case CMD_INVALID: {
  978. /* print_bytes(cp, sizeof(*cp), 1, 0);
  979. print_cmd(cp); */
  980. /* We get CMD_INVALID if you address a non-existent device
  981. * instead of a selection timeout (no response). You will
  982. * see this if you yank out a drive, then try to access it.
  983. * This is kind of a shame because it means that any other
  984. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  985. * missing target. */
  986. cmd->result = DID_NO_CONNECT << 16;
  987. }
  988. break;
  989. case CMD_PROTOCOL_ERR:
  990. dev_warn(&h->pdev->dev, "cp %p has "
  991. "protocol error \n", cp);
  992. break;
  993. case CMD_HARDWARE_ERR:
  994. cmd->result = DID_ERROR << 16;
  995. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  996. break;
  997. case CMD_CONNECTION_LOST:
  998. cmd->result = DID_ERROR << 16;
  999. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1000. break;
  1001. case CMD_ABORTED:
  1002. cmd->result = DID_ABORT << 16;
  1003. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1004. cp, ei->ScsiStatus);
  1005. break;
  1006. case CMD_ABORT_FAILED:
  1007. cmd->result = DID_ERROR << 16;
  1008. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1009. break;
  1010. case CMD_UNSOLICITED_ABORT:
  1011. cmd->result = DID_RESET << 16;
  1012. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1013. "abort\n", cp);
  1014. break;
  1015. case CMD_TIMEOUT:
  1016. cmd->result = DID_TIME_OUT << 16;
  1017. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1018. break;
  1019. default:
  1020. cmd->result = DID_ERROR << 16;
  1021. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1022. cp, ei->CommandStatus);
  1023. }
  1024. cmd->scsi_done(cmd);
  1025. cmd_free(h, cp);
  1026. }
  1027. static int hpsa_scsi_detect(struct ctlr_info *h)
  1028. {
  1029. struct Scsi_Host *sh;
  1030. int error;
  1031. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1032. if (sh == NULL)
  1033. goto fail;
  1034. sh->io_port = 0;
  1035. sh->n_io_port = 0;
  1036. sh->this_id = -1;
  1037. sh->max_channel = 3;
  1038. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1039. sh->max_lun = HPSA_MAX_LUN;
  1040. sh->max_id = HPSA_MAX_LUN;
  1041. sh->can_queue = h->nr_cmds;
  1042. sh->cmd_per_lun = h->nr_cmds;
  1043. sh->sg_tablesize = h->maxsgentries;
  1044. h->scsi_host = sh;
  1045. sh->hostdata[0] = (unsigned long) h;
  1046. sh->irq = h->intr[PERF_MODE_INT];
  1047. sh->unique_id = sh->irq;
  1048. error = scsi_add_host(sh, &h->pdev->dev);
  1049. if (error)
  1050. goto fail_host_put;
  1051. scsi_scan_host(sh);
  1052. return 0;
  1053. fail_host_put:
  1054. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1055. " failed for controller %d\n", h->ctlr);
  1056. scsi_host_put(sh);
  1057. return error;
  1058. fail:
  1059. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1060. " failed for controller %d\n", h->ctlr);
  1061. return -ENOMEM;
  1062. }
  1063. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1064. struct CommandList *c, int sg_used, int data_direction)
  1065. {
  1066. int i;
  1067. union u64bit addr64;
  1068. for (i = 0; i < sg_used; i++) {
  1069. addr64.val32.lower = c->SG[i].Addr.lower;
  1070. addr64.val32.upper = c->SG[i].Addr.upper;
  1071. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1072. data_direction);
  1073. }
  1074. }
  1075. static void hpsa_map_one(struct pci_dev *pdev,
  1076. struct CommandList *cp,
  1077. unsigned char *buf,
  1078. size_t buflen,
  1079. int data_direction)
  1080. {
  1081. u64 addr64;
  1082. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1083. cp->Header.SGList = 0;
  1084. cp->Header.SGTotal = 0;
  1085. return;
  1086. }
  1087. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1088. cp->SG[0].Addr.lower =
  1089. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1090. cp->SG[0].Addr.upper =
  1091. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1092. cp->SG[0].Len = buflen;
  1093. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1094. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1095. }
  1096. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1097. struct CommandList *c)
  1098. {
  1099. DECLARE_COMPLETION_ONSTACK(wait);
  1100. c->waiting = &wait;
  1101. enqueue_cmd_and_start_io(h, c);
  1102. wait_for_completion(&wait);
  1103. }
  1104. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1105. struct CommandList *c, int data_direction)
  1106. {
  1107. int retry_count = 0;
  1108. do {
  1109. memset(c->err_info, 0, sizeof(c->err_info));
  1110. hpsa_scsi_do_simple_cmd_core(h, c);
  1111. retry_count++;
  1112. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1113. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1114. }
  1115. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1116. {
  1117. struct ErrorInfo *ei;
  1118. struct device *d = &cp->h->pdev->dev;
  1119. ei = cp->err_info;
  1120. switch (ei->CommandStatus) {
  1121. case CMD_TARGET_STATUS:
  1122. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1123. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1124. ei->ScsiStatus);
  1125. if (ei->ScsiStatus == 0)
  1126. dev_warn(d, "SCSI status is abnormally zero. "
  1127. "(probably indicates selection timeout "
  1128. "reported incorrectly due to a known "
  1129. "firmware bug, circa July, 2001.)\n");
  1130. break;
  1131. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1132. dev_info(d, "UNDERRUN\n");
  1133. break;
  1134. case CMD_DATA_OVERRUN:
  1135. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1136. break;
  1137. case CMD_INVALID: {
  1138. /* controller unfortunately reports SCSI passthru's
  1139. * to non-existent targets as invalid commands.
  1140. */
  1141. dev_warn(d, "cp %p is reported invalid (probably means "
  1142. "target device no longer present)\n", cp);
  1143. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1144. print_cmd(cp); */
  1145. }
  1146. break;
  1147. case CMD_PROTOCOL_ERR:
  1148. dev_warn(d, "cp %p has protocol error \n", cp);
  1149. break;
  1150. case CMD_HARDWARE_ERR:
  1151. /* cmd->result = DID_ERROR << 16; */
  1152. dev_warn(d, "cp %p had hardware error\n", cp);
  1153. break;
  1154. case CMD_CONNECTION_LOST:
  1155. dev_warn(d, "cp %p had connection lost\n", cp);
  1156. break;
  1157. case CMD_ABORTED:
  1158. dev_warn(d, "cp %p was aborted\n", cp);
  1159. break;
  1160. case CMD_ABORT_FAILED:
  1161. dev_warn(d, "cp %p reports abort failed\n", cp);
  1162. break;
  1163. case CMD_UNSOLICITED_ABORT:
  1164. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1165. break;
  1166. case CMD_TIMEOUT:
  1167. dev_warn(d, "cp %p timed out\n", cp);
  1168. break;
  1169. default:
  1170. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1171. ei->CommandStatus);
  1172. }
  1173. }
  1174. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1175. unsigned char page, unsigned char *buf,
  1176. unsigned char bufsize)
  1177. {
  1178. int rc = IO_OK;
  1179. struct CommandList *c;
  1180. struct ErrorInfo *ei;
  1181. c = cmd_special_alloc(h);
  1182. if (c == NULL) { /* trouble... */
  1183. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1184. return -ENOMEM;
  1185. }
  1186. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1187. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1188. ei = c->err_info;
  1189. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1190. hpsa_scsi_interpret_error(c);
  1191. rc = -1;
  1192. }
  1193. cmd_special_free(h, c);
  1194. return rc;
  1195. }
  1196. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1197. {
  1198. int rc = IO_OK;
  1199. struct CommandList *c;
  1200. struct ErrorInfo *ei;
  1201. c = cmd_special_alloc(h);
  1202. if (c == NULL) { /* trouble... */
  1203. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1204. return -ENOMEM;
  1205. }
  1206. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1207. hpsa_scsi_do_simple_cmd_core(h, c);
  1208. /* no unmap needed here because no data xfer. */
  1209. ei = c->err_info;
  1210. if (ei->CommandStatus != 0) {
  1211. hpsa_scsi_interpret_error(c);
  1212. rc = -1;
  1213. }
  1214. cmd_special_free(h, c);
  1215. return rc;
  1216. }
  1217. static void hpsa_get_raid_level(struct ctlr_info *h,
  1218. unsigned char *scsi3addr, unsigned char *raid_level)
  1219. {
  1220. int rc;
  1221. unsigned char *buf;
  1222. *raid_level = RAID_UNKNOWN;
  1223. buf = kzalloc(64, GFP_KERNEL);
  1224. if (!buf)
  1225. return;
  1226. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1227. if (rc == 0)
  1228. *raid_level = buf[8];
  1229. if (*raid_level > RAID_UNKNOWN)
  1230. *raid_level = RAID_UNKNOWN;
  1231. kfree(buf);
  1232. return;
  1233. }
  1234. /* Get the device id from inquiry page 0x83 */
  1235. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1236. unsigned char *device_id, int buflen)
  1237. {
  1238. int rc;
  1239. unsigned char *buf;
  1240. if (buflen > 16)
  1241. buflen = 16;
  1242. buf = kzalloc(64, GFP_KERNEL);
  1243. if (!buf)
  1244. return -1;
  1245. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1246. if (rc == 0)
  1247. memcpy(device_id, &buf[8], buflen);
  1248. kfree(buf);
  1249. return rc != 0;
  1250. }
  1251. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1252. struct ReportLUNdata *buf, int bufsize,
  1253. int extended_response)
  1254. {
  1255. int rc = IO_OK;
  1256. struct CommandList *c;
  1257. unsigned char scsi3addr[8];
  1258. struct ErrorInfo *ei;
  1259. c = cmd_special_alloc(h);
  1260. if (c == NULL) { /* trouble... */
  1261. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1262. return -1;
  1263. }
  1264. /* address the controller */
  1265. memset(scsi3addr, 0, sizeof(scsi3addr));
  1266. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1267. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1268. if (extended_response)
  1269. c->Request.CDB[1] = extended_response;
  1270. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1271. ei = c->err_info;
  1272. if (ei->CommandStatus != 0 &&
  1273. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1274. hpsa_scsi_interpret_error(c);
  1275. rc = -1;
  1276. }
  1277. cmd_special_free(h, c);
  1278. return rc;
  1279. }
  1280. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1281. struct ReportLUNdata *buf,
  1282. int bufsize, int extended_response)
  1283. {
  1284. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1285. }
  1286. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1287. struct ReportLUNdata *buf, int bufsize)
  1288. {
  1289. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1290. }
  1291. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1292. int bus, int target, int lun)
  1293. {
  1294. device->bus = bus;
  1295. device->target = target;
  1296. device->lun = lun;
  1297. }
  1298. static int hpsa_update_device_info(struct ctlr_info *h,
  1299. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1300. {
  1301. #define OBDR_TAPE_INQ_SIZE 49
  1302. unsigned char *inq_buff;
  1303. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1304. if (!inq_buff)
  1305. goto bail_out;
  1306. /* Do an inquiry to the device to see what it is. */
  1307. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1308. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1309. /* Inquiry failed (msg printed already) */
  1310. dev_err(&h->pdev->dev,
  1311. "hpsa_update_device_info: inquiry failed\n");
  1312. goto bail_out;
  1313. }
  1314. this_device->devtype = (inq_buff[0] & 0x1f);
  1315. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1316. memcpy(this_device->vendor, &inq_buff[8],
  1317. sizeof(this_device->vendor));
  1318. memcpy(this_device->model, &inq_buff[16],
  1319. sizeof(this_device->model));
  1320. memset(this_device->device_id, 0,
  1321. sizeof(this_device->device_id));
  1322. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1323. sizeof(this_device->device_id));
  1324. if (this_device->devtype == TYPE_DISK &&
  1325. is_logical_dev_addr_mode(scsi3addr))
  1326. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1327. else
  1328. this_device->raid_level = RAID_UNKNOWN;
  1329. kfree(inq_buff);
  1330. return 0;
  1331. bail_out:
  1332. kfree(inq_buff);
  1333. return 1;
  1334. }
  1335. static unsigned char *msa2xxx_model[] = {
  1336. "MSA2012",
  1337. "MSA2024",
  1338. "MSA2312",
  1339. "MSA2324",
  1340. NULL,
  1341. };
  1342. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1343. {
  1344. int i;
  1345. for (i = 0; msa2xxx_model[i]; i++)
  1346. if (strncmp(device->model, msa2xxx_model[i],
  1347. strlen(msa2xxx_model[i])) == 0)
  1348. return 1;
  1349. return 0;
  1350. }
  1351. /* Helper function to assign bus, target, lun mapping of devices.
  1352. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1353. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1354. * Logical drive target and lun are assigned at this time, but
  1355. * physical device lun and target assignment are deferred (assigned
  1356. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1357. */
  1358. static void figure_bus_target_lun(struct ctlr_info *h,
  1359. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1360. struct hpsa_scsi_dev_t *device)
  1361. {
  1362. u32 lunid;
  1363. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1364. /* logical device */
  1365. if (unlikely(is_scsi_rev_5(h))) {
  1366. /* p1210m, logical drives lun assignments
  1367. * match SCSI REPORT LUNS data.
  1368. */
  1369. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1370. *bus = 0;
  1371. *target = 0;
  1372. *lun = (lunid & 0x3fff) + 1;
  1373. } else {
  1374. /* not p1210m... */
  1375. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1376. if (is_msa2xxx(h, device)) {
  1377. /* msa2xxx way, put logicals on bus 1
  1378. * and match target/lun numbers box
  1379. * reports.
  1380. */
  1381. *bus = 1;
  1382. *target = (lunid >> 16) & 0x3fff;
  1383. *lun = lunid & 0x00ff;
  1384. } else {
  1385. /* Traditional smart array way. */
  1386. *bus = 0;
  1387. *lun = 0;
  1388. *target = lunid & 0x3fff;
  1389. }
  1390. }
  1391. } else {
  1392. /* physical device */
  1393. if (is_hba_lunid(lunaddrbytes))
  1394. if (unlikely(is_scsi_rev_5(h))) {
  1395. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1396. *target = 0;
  1397. *lun = 0;
  1398. return;
  1399. } else
  1400. *bus = 3; /* traditional smartarray */
  1401. else
  1402. *bus = 2; /* physical disk */
  1403. *target = -1;
  1404. *lun = -1; /* we will fill these in later. */
  1405. }
  1406. }
  1407. /*
  1408. * If there is no lun 0 on a target, linux won't find any devices.
  1409. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1410. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1411. * it for some reason. *tmpdevice is the target we're adding,
  1412. * this_device is a pointer into the current element of currentsd[]
  1413. * that we're building up in update_scsi_devices(), below.
  1414. * lunzerobits is a bitmap that tracks which targets already have a
  1415. * lun 0 assigned.
  1416. * Returns 1 if an enclosure was added, 0 if not.
  1417. */
  1418. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1419. struct hpsa_scsi_dev_t *tmpdevice,
  1420. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1421. int bus, int target, int lun, unsigned long lunzerobits[],
  1422. int *nmsa2xxx_enclosures)
  1423. {
  1424. unsigned char scsi3addr[8];
  1425. if (test_bit(target, lunzerobits))
  1426. return 0; /* There is already a lun 0 on this target. */
  1427. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1428. return 0; /* It's the logical targets that may lack lun 0. */
  1429. if (!is_msa2xxx(h, tmpdevice))
  1430. return 0; /* It's only the MSA2xxx that have this problem. */
  1431. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1432. return 0;
  1433. if (is_hba_lunid(scsi3addr))
  1434. return 0; /* Don't add the RAID controller here. */
  1435. if (is_scsi_rev_5(h))
  1436. return 0; /* p1210m doesn't need to do this. */
  1437. #define MAX_MSA2XXX_ENCLOSURES 32
  1438. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1439. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1440. "enclosures exceeded. Check your hardware "
  1441. "configuration.");
  1442. return 0;
  1443. }
  1444. memset(scsi3addr, 0, 8);
  1445. scsi3addr[3] = target;
  1446. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1447. return 0;
  1448. (*nmsa2xxx_enclosures)++;
  1449. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1450. set_bit(target, lunzerobits);
  1451. return 1;
  1452. }
  1453. /*
  1454. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1455. * logdev. The number of luns in physdev and logdev are returned in
  1456. * *nphysicals and *nlogicals, respectively.
  1457. * Returns 0 on success, -1 otherwise.
  1458. */
  1459. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1460. int reportlunsize,
  1461. struct ReportLUNdata *physdev, u32 *nphysicals,
  1462. struct ReportLUNdata *logdev, u32 *nlogicals)
  1463. {
  1464. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1465. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1466. return -1;
  1467. }
  1468. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1469. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1470. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1471. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1472. *nphysicals - HPSA_MAX_PHYS_LUN);
  1473. *nphysicals = HPSA_MAX_PHYS_LUN;
  1474. }
  1475. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1476. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1477. return -1;
  1478. }
  1479. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1480. /* Reject Logicals in excess of our max capability. */
  1481. if (*nlogicals > HPSA_MAX_LUN) {
  1482. dev_warn(&h->pdev->dev,
  1483. "maximum logical LUNs (%d) exceeded. "
  1484. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1485. *nlogicals - HPSA_MAX_LUN);
  1486. *nlogicals = HPSA_MAX_LUN;
  1487. }
  1488. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1489. dev_warn(&h->pdev->dev,
  1490. "maximum logical + physical LUNs (%d) exceeded. "
  1491. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1492. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1493. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1494. }
  1495. return 0;
  1496. }
  1497. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1498. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1499. struct ReportLUNdata *logdev_list)
  1500. {
  1501. /* Helper function, figure out where the LUN ID info is coming from
  1502. * given index i, lists of physical and logical devices, where in
  1503. * the list the raid controller is supposed to appear (first or last)
  1504. */
  1505. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1506. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1507. if (i == raid_ctlr_position)
  1508. return RAID_CTLR_LUNID;
  1509. if (i < logicals_start)
  1510. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1511. if (i < last_device)
  1512. return &logdev_list->LUN[i - nphysicals -
  1513. (raid_ctlr_position == 0)][0];
  1514. BUG();
  1515. return NULL;
  1516. }
  1517. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1518. {
  1519. /* the idea here is we could get notified
  1520. * that some devices have changed, so we do a report
  1521. * physical luns and report logical luns cmd, and adjust
  1522. * our list of devices accordingly.
  1523. *
  1524. * The scsi3addr's of devices won't change so long as the
  1525. * adapter is not reset. That means we can rescan and
  1526. * tell which devices we already know about, vs. new
  1527. * devices, vs. disappearing devices.
  1528. */
  1529. struct ReportLUNdata *physdev_list = NULL;
  1530. struct ReportLUNdata *logdev_list = NULL;
  1531. unsigned char *inq_buff = NULL;
  1532. u32 nphysicals = 0;
  1533. u32 nlogicals = 0;
  1534. u32 ndev_allocated = 0;
  1535. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1536. int ncurrent = 0;
  1537. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1538. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1539. int bus, target, lun;
  1540. int raid_ctlr_position;
  1541. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1542. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1543. GFP_KERNEL);
  1544. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1545. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1546. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1547. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1548. if (!currentsd || !physdev_list || !logdev_list ||
  1549. !inq_buff || !tmpdevice) {
  1550. dev_err(&h->pdev->dev, "out of memory\n");
  1551. goto out;
  1552. }
  1553. memset(lunzerobits, 0, sizeof(lunzerobits));
  1554. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1555. logdev_list, &nlogicals))
  1556. goto out;
  1557. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1558. * but each of them 4 times through different paths. The plus 1
  1559. * is for the RAID controller.
  1560. */
  1561. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1562. /* Allocate the per device structures */
  1563. for (i = 0; i < ndevs_to_allocate; i++) {
  1564. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1565. if (!currentsd[i]) {
  1566. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1567. __FILE__, __LINE__);
  1568. goto out;
  1569. }
  1570. ndev_allocated++;
  1571. }
  1572. if (unlikely(is_scsi_rev_5(h)))
  1573. raid_ctlr_position = 0;
  1574. else
  1575. raid_ctlr_position = nphysicals + nlogicals;
  1576. /* adjust our table of devices */
  1577. nmsa2xxx_enclosures = 0;
  1578. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1579. u8 *lunaddrbytes;
  1580. /* Figure out where the LUN ID info is coming from */
  1581. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1582. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1583. /* skip masked physical devices. */
  1584. if (lunaddrbytes[3] & 0xC0 &&
  1585. i < nphysicals + (raid_ctlr_position == 0))
  1586. continue;
  1587. /* Get device type, vendor, model, device id */
  1588. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1589. continue; /* skip it if we can't talk to it. */
  1590. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1591. tmpdevice);
  1592. this_device = currentsd[ncurrent];
  1593. /*
  1594. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1595. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1596. * is nonetheless an enclosure device there. We have to
  1597. * present that otherwise linux won't find anything if
  1598. * there is no lun 0.
  1599. */
  1600. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1601. lunaddrbytes, bus, target, lun, lunzerobits,
  1602. &nmsa2xxx_enclosures)) {
  1603. ncurrent++;
  1604. this_device = currentsd[ncurrent];
  1605. }
  1606. *this_device = *tmpdevice;
  1607. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1608. switch (this_device->devtype) {
  1609. case TYPE_ROM: {
  1610. /* We don't *really* support actual CD-ROM devices,
  1611. * just "One Button Disaster Recovery" tape drive
  1612. * which temporarily pretends to be a CD-ROM drive.
  1613. * So we check that the device is really an OBDR tape
  1614. * device by checking for "$DR-10" in bytes 43-48 of
  1615. * the inquiry data.
  1616. */
  1617. char obdr_sig[7];
  1618. #define OBDR_TAPE_SIG "$DR-10"
  1619. strncpy(obdr_sig, &inq_buff[43], 6);
  1620. obdr_sig[6] = '\0';
  1621. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1622. /* Not OBDR device, ignore it. */
  1623. break;
  1624. }
  1625. ncurrent++;
  1626. break;
  1627. case TYPE_DISK:
  1628. if (i < nphysicals)
  1629. break;
  1630. ncurrent++;
  1631. break;
  1632. case TYPE_TAPE:
  1633. case TYPE_MEDIUM_CHANGER:
  1634. ncurrent++;
  1635. break;
  1636. case TYPE_RAID:
  1637. /* Only present the Smartarray HBA as a RAID controller.
  1638. * If it's a RAID controller other than the HBA itself
  1639. * (an external RAID controller, MSA500 or similar)
  1640. * don't present it.
  1641. */
  1642. if (!is_hba_lunid(lunaddrbytes))
  1643. break;
  1644. ncurrent++;
  1645. break;
  1646. default:
  1647. break;
  1648. }
  1649. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1650. break;
  1651. }
  1652. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1653. out:
  1654. kfree(tmpdevice);
  1655. for (i = 0; i < ndev_allocated; i++)
  1656. kfree(currentsd[i]);
  1657. kfree(currentsd);
  1658. kfree(inq_buff);
  1659. kfree(physdev_list);
  1660. kfree(logdev_list);
  1661. }
  1662. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1663. * dma mapping and fills in the scatter gather entries of the
  1664. * hpsa command, cp.
  1665. */
  1666. static int hpsa_scatter_gather(struct ctlr_info *h,
  1667. struct CommandList *cp,
  1668. struct scsi_cmnd *cmd)
  1669. {
  1670. unsigned int len;
  1671. struct scatterlist *sg;
  1672. u64 addr64;
  1673. int use_sg, i, sg_index, chained;
  1674. struct SGDescriptor *curr_sg;
  1675. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1676. use_sg = scsi_dma_map(cmd);
  1677. if (use_sg < 0)
  1678. return use_sg;
  1679. if (!use_sg)
  1680. goto sglist_finished;
  1681. curr_sg = cp->SG;
  1682. chained = 0;
  1683. sg_index = 0;
  1684. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1685. if (i == h->max_cmd_sg_entries - 1 &&
  1686. use_sg > h->max_cmd_sg_entries) {
  1687. chained = 1;
  1688. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1689. sg_index = 0;
  1690. }
  1691. addr64 = (u64) sg_dma_address(sg);
  1692. len = sg_dma_len(sg);
  1693. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1694. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1695. curr_sg->Len = len;
  1696. curr_sg->Ext = 0; /* we are not chaining */
  1697. curr_sg++;
  1698. }
  1699. if (use_sg + chained > h->maxSG)
  1700. h->maxSG = use_sg + chained;
  1701. if (chained) {
  1702. cp->Header.SGList = h->max_cmd_sg_entries;
  1703. cp->Header.SGTotal = (u16) (use_sg + 1);
  1704. hpsa_map_sg_chain_block(h, cp);
  1705. return 0;
  1706. }
  1707. sglist_finished:
  1708. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1709. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1710. return 0;
  1711. }
  1712. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1713. void (*done)(struct scsi_cmnd *))
  1714. {
  1715. struct ctlr_info *h;
  1716. struct hpsa_scsi_dev_t *dev;
  1717. unsigned char scsi3addr[8];
  1718. struct CommandList *c;
  1719. unsigned long flags;
  1720. /* Get the ptr to our adapter structure out of cmd->host. */
  1721. h = sdev_to_hba(cmd->device);
  1722. dev = cmd->device->hostdata;
  1723. if (!dev) {
  1724. cmd->result = DID_NO_CONNECT << 16;
  1725. done(cmd);
  1726. return 0;
  1727. }
  1728. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1729. /* Need a lock as this is being allocated from the pool */
  1730. spin_lock_irqsave(&h->lock, flags);
  1731. c = cmd_alloc(h);
  1732. spin_unlock_irqrestore(&h->lock, flags);
  1733. if (c == NULL) { /* trouble... */
  1734. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1735. return SCSI_MLQUEUE_HOST_BUSY;
  1736. }
  1737. /* Fill in the command list header */
  1738. cmd->scsi_done = done; /* save this for use by completion code */
  1739. /* save c in case we have to abort it */
  1740. cmd->host_scribble = (unsigned char *) c;
  1741. c->cmd_type = CMD_SCSI;
  1742. c->scsi_cmd = cmd;
  1743. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1744. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1745. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1746. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1747. /* Fill in the request block... */
  1748. c->Request.Timeout = 0;
  1749. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1750. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1751. c->Request.CDBLen = cmd->cmd_len;
  1752. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1753. c->Request.Type.Type = TYPE_CMD;
  1754. c->Request.Type.Attribute = ATTR_SIMPLE;
  1755. switch (cmd->sc_data_direction) {
  1756. case DMA_TO_DEVICE:
  1757. c->Request.Type.Direction = XFER_WRITE;
  1758. break;
  1759. case DMA_FROM_DEVICE:
  1760. c->Request.Type.Direction = XFER_READ;
  1761. break;
  1762. case DMA_NONE:
  1763. c->Request.Type.Direction = XFER_NONE;
  1764. break;
  1765. case DMA_BIDIRECTIONAL:
  1766. /* This can happen if a buggy application does a scsi passthru
  1767. * and sets both inlen and outlen to non-zero. ( see
  1768. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1769. */
  1770. c->Request.Type.Direction = XFER_RSVD;
  1771. /* This is technically wrong, and hpsa controllers should
  1772. * reject it with CMD_INVALID, which is the most correct
  1773. * response, but non-fibre backends appear to let it
  1774. * slide by, and give the same results as if this field
  1775. * were set correctly. Either way is acceptable for
  1776. * our purposes here.
  1777. */
  1778. break;
  1779. default:
  1780. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1781. cmd->sc_data_direction);
  1782. BUG();
  1783. break;
  1784. }
  1785. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1786. cmd_free(h, c);
  1787. return SCSI_MLQUEUE_HOST_BUSY;
  1788. }
  1789. enqueue_cmd_and_start_io(h, c);
  1790. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1791. return 0;
  1792. }
  1793. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1794. static void hpsa_scan_start(struct Scsi_Host *sh)
  1795. {
  1796. struct ctlr_info *h = shost_to_hba(sh);
  1797. unsigned long flags;
  1798. /* wait until any scan already in progress is finished. */
  1799. while (1) {
  1800. spin_lock_irqsave(&h->scan_lock, flags);
  1801. if (h->scan_finished)
  1802. break;
  1803. spin_unlock_irqrestore(&h->scan_lock, flags);
  1804. wait_event(h->scan_wait_queue, h->scan_finished);
  1805. /* Note: We don't need to worry about a race between this
  1806. * thread and driver unload because the midlayer will
  1807. * have incremented the reference count, so unload won't
  1808. * happen if we're in here.
  1809. */
  1810. }
  1811. h->scan_finished = 0; /* mark scan as in progress */
  1812. spin_unlock_irqrestore(&h->scan_lock, flags);
  1813. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1814. spin_lock_irqsave(&h->scan_lock, flags);
  1815. h->scan_finished = 1; /* mark scan as finished. */
  1816. wake_up_all(&h->scan_wait_queue);
  1817. spin_unlock_irqrestore(&h->scan_lock, flags);
  1818. }
  1819. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1820. unsigned long elapsed_time)
  1821. {
  1822. struct ctlr_info *h = shost_to_hba(sh);
  1823. unsigned long flags;
  1824. int finished;
  1825. spin_lock_irqsave(&h->scan_lock, flags);
  1826. finished = h->scan_finished;
  1827. spin_unlock_irqrestore(&h->scan_lock, flags);
  1828. return finished;
  1829. }
  1830. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1831. int qdepth, int reason)
  1832. {
  1833. struct ctlr_info *h = sdev_to_hba(sdev);
  1834. if (reason != SCSI_QDEPTH_DEFAULT)
  1835. return -ENOTSUPP;
  1836. if (qdepth < 1)
  1837. qdepth = 1;
  1838. else
  1839. if (qdepth > h->nr_cmds)
  1840. qdepth = h->nr_cmds;
  1841. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1842. return sdev->queue_depth;
  1843. }
  1844. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1845. {
  1846. /* we are being forcibly unloaded, and may not refuse. */
  1847. scsi_remove_host(h->scsi_host);
  1848. scsi_host_put(h->scsi_host);
  1849. h->scsi_host = NULL;
  1850. }
  1851. static int hpsa_register_scsi(struct ctlr_info *h)
  1852. {
  1853. int rc;
  1854. rc = hpsa_scsi_detect(h);
  1855. if (rc != 0)
  1856. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1857. " hpsa_scsi_detect(), rc is %d\n", rc);
  1858. return rc;
  1859. }
  1860. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1861. unsigned char lunaddr[])
  1862. {
  1863. int rc = 0;
  1864. int count = 0;
  1865. int waittime = 1; /* seconds */
  1866. struct CommandList *c;
  1867. c = cmd_special_alloc(h);
  1868. if (!c) {
  1869. dev_warn(&h->pdev->dev, "out of memory in "
  1870. "wait_for_device_to_become_ready.\n");
  1871. return IO_ERROR;
  1872. }
  1873. /* Send test unit ready until device ready, or give up. */
  1874. while (count < HPSA_TUR_RETRY_LIMIT) {
  1875. /* Wait for a bit. do this first, because if we send
  1876. * the TUR right away, the reset will just abort it.
  1877. */
  1878. msleep(1000 * waittime);
  1879. count++;
  1880. /* Increase wait time with each try, up to a point. */
  1881. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1882. waittime = waittime * 2;
  1883. /* Send the Test Unit Ready */
  1884. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1885. hpsa_scsi_do_simple_cmd_core(h, c);
  1886. /* no unmap needed here because no data xfer. */
  1887. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1888. break;
  1889. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1890. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1891. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1892. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1893. break;
  1894. dev_warn(&h->pdev->dev, "waiting %d secs "
  1895. "for device to become ready.\n", waittime);
  1896. rc = 1; /* device not ready. */
  1897. }
  1898. if (rc)
  1899. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1900. else
  1901. dev_warn(&h->pdev->dev, "device is ready.\n");
  1902. cmd_special_free(h, c);
  1903. return rc;
  1904. }
  1905. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1906. * complaining. Doing a host- or bus-reset can't do anything good here.
  1907. */
  1908. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1909. {
  1910. int rc;
  1911. struct ctlr_info *h;
  1912. struct hpsa_scsi_dev_t *dev;
  1913. /* find the controller to which the command to be aborted was sent */
  1914. h = sdev_to_hba(scsicmd->device);
  1915. if (h == NULL) /* paranoia */
  1916. return FAILED;
  1917. dev = scsicmd->device->hostdata;
  1918. if (!dev) {
  1919. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1920. "device lookup failed.\n");
  1921. return FAILED;
  1922. }
  1923. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1924. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1925. /* send a reset to the SCSI LUN which the command was sent to */
  1926. rc = hpsa_send_reset(h, dev->scsi3addr);
  1927. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1928. return SUCCESS;
  1929. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1930. return FAILED;
  1931. }
  1932. /*
  1933. * For operations that cannot sleep, a command block is allocated at init,
  1934. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1935. * which ones are free or in use. Lock must be held when calling this.
  1936. * cmd_free() is the complement.
  1937. */
  1938. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1939. {
  1940. struct CommandList *c;
  1941. int i;
  1942. union u64bit temp64;
  1943. dma_addr_t cmd_dma_handle, err_dma_handle;
  1944. do {
  1945. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1946. if (i == h->nr_cmds)
  1947. return NULL;
  1948. } while (test_and_set_bit
  1949. (i & (BITS_PER_LONG - 1),
  1950. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1951. c = h->cmd_pool + i;
  1952. memset(c, 0, sizeof(*c));
  1953. cmd_dma_handle = h->cmd_pool_dhandle
  1954. + i * sizeof(*c);
  1955. c->err_info = h->errinfo_pool + i;
  1956. memset(c->err_info, 0, sizeof(*c->err_info));
  1957. err_dma_handle = h->errinfo_pool_dhandle
  1958. + i * sizeof(*c->err_info);
  1959. h->nr_allocs++;
  1960. c->cmdindex = i;
  1961. INIT_HLIST_NODE(&c->list);
  1962. c->busaddr = (u32) cmd_dma_handle;
  1963. temp64.val = (u64) err_dma_handle;
  1964. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1965. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1966. c->ErrDesc.Len = sizeof(*c->err_info);
  1967. c->h = h;
  1968. return c;
  1969. }
  1970. /* For operations that can wait for kmalloc to possibly sleep,
  1971. * this routine can be called. Lock need not be held to call
  1972. * cmd_special_alloc. cmd_special_free() is the complement.
  1973. */
  1974. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1975. {
  1976. struct CommandList *c;
  1977. union u64bit temp64;
  1978. dma_addr_t cmd_dma_handle, err_dma_handle;
  1979. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1980. if (c == NULL)
  1981. return NULL;
  1982. memset(c, 0, sizeof(*c));
  1983. c->cmdindex = -1;
  1984. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  1985. &err_dma_handle);
  1986. if (c->err_info == NULL) {
  1987. pci_free_consistent(h->pdev,
  1988. sizeof(*c), c, cmd_dma_handle);
  1989. return NULL;
  1990. }
  1991. memset(c->err_info, 0, sizeof(*c->err_info));
  1992. INIT_HLIST_NODE(&c->list);
  1993. c->busaddr = (u32) cmd_dma_handle;
  1994. temp64.val = (u64) err_dma_handle;
  1995. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1996. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1997. c->ErrDesc.Len = sizeof(*c->err_info);
  1998. c->h = h;
  1999. return c;
  2000. }
  2001. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2002. {
  2003. int i;
  2004. i = c - h->cmd_pool;
  2005. clear_bit(i & (BITS_PER_LONG - 1),
  2006. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2007. h->nr_frees++;
  2008. }
  2009. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2010. {
  2011. union u64bit temp64;
  2012. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2013. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2014. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2015. c->err_info, (dma_addr_t) temp64.val);
  2016. pci_free_consistent(h->pdev, sizeof(*c),
  2017. c, (dma_addr_t) c->busaddr);
  2018. }
  2019. #ifdef CONFIG_COMPAT
  2020. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2021. {
  2022. IOCTL32_Command_struct __user *arg32 =
  2023. (IOCTL32_Command_struct __user *) arg;
  2024. IOCTL_Command_struct arg64;
  2025. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2026. int err;
  2027. u32 cp;
  2028. err = 0;
  2029. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2030. sizeof(arg64.LUN_info));
  2031. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2032. sizeof(arg64.Request));
  2033. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2034. sizeof(arg64.error_info));
  2035. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2036. err |= get_user(cp, &arg32->buf);
  2037. arg64.buf = compat_ptr(cp);
  2038. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2039. if (err)
  2040. return -EFAULT;
  2041. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2042. if (err)
  2043. return err;
  2044. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2045. sizeof(arg32->error_info));
  2046. if (err)
  2047. return -EFAULT;
  2048. return err;
  2049. }
  2050. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2051. int cmd, void *arg)
  2052. {
  2053. BIG_IOCTL32_Command_struct __user *arg32 =
  2054. (BIG_IOCTL32_Command_struct __user *) arg;
  2055. BIG_IOCTL_Command_struct arg64;
  2056. BIG_IOCTL_Command_struct __user *p =
  2057. compat_alloc_user_space(sizeof(arg64));
  2058. int err;
  2059. u32 cp;
  2060. err = 0;
  2061. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2062. sizeof(arg64.LUN_info));
  2063. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2064. sizeof(arg64.Request));
  2065. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2066. sizeof(arg64.error_info));
  2067. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2068. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2069. err |= get_user(cp, &arg32->buf);
  2070. arg64.buf = compat_ptr(cp);
  2071. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2072. if (err)
  2073. return -EFAULT;
  2074. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2075. if (err)
  2076. return err;
  2077. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2078. sizeof(arg32->error_info));
  2079. if (err)
  2080. return -EFAULT;
  2081. return err;
  2082. }
  2083. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2084. {
  2085. switch (cmd) {
  2086. case CCISS_GETPCIINFO:
  2087. case CCISS_GETINTINFO:
  2088. case CCISS_SETINTINFO:
  2089. case CCISS_GETNODENAME:
  2090. case CCISS_SETNODENAME:
  2091. case CCISS_GETHEARTBEAT:
  2092. case CCISS_GETBUSTYPES:
  2093. case CCISS_GETFIRMVER:
  2094. case CCISS_GETDRIVVER:
  2095. case CCISS_REVALIDVOLS:
  2096. case CCISS_DEREGDISK:
  2097. case CCISS_REGNEWDISK:
  2098. case CCISS_REGNEWD:
  2099. case CCISS_RESCANDISK:
  2100. case CCISS_GETLUNINFO:
  2101. return hpsa_ioctl(dev, cmd, arg);
  2102. case CCISS_PASSTHRU32:
  2103. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2104. case CCISS_BIG_PASSTHRU32:
  2105. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2106. default:
  2107. return -ENOIOCTLCMD;
  2108. }
  2109. }
  2110. #endif
  2111. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2112. {
  2113. struct hpsa_pci_info pciinfo;
  2114. if (!argp)
  2115. return -EINVAL;
  2116. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2117. pciinfo.bus = h->pdev->bus->number;
  2118. pciinfo.dev_fn = h->pdev->devfn;
  2119. pciinfo.board_id = h->board_id;
  2120. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2121. return -EFAULT;
  2122. return 0;
  2123. }
  2124. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2125. {
  2126. DriverVer_type DriverVer;
  2127. unsigned char vmaj, vmin, vsubmin;
  2128. int rc;
  2129. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2130. &vmaj, &vmin, &vsubmin);
  2131. if (rc != 3) {
  2132. dev_info(&h->pdev->dev, "driver version string '%s' "
  2133. "unrecognized.", HPSA_DRIVER_VERSION);
  2134. vmaj = 0;
  2135. vmin = 0;
  2136. vsubmin = 0;
  2137. }
  2138. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2139. if (!argp)
  2140. return -EINVAL;
  2141. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2142. return -EFAULT;
  2143. return 0;
  2144. }
  2145. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2146. {
  2147. IOCTL_Command_struct iocommand;
  2148. struct CommandList *c;
  2149. char *buff = NULL;
  2150. union u64bit temp64;
  2151. if (!argp)
  2152. return -EINVAL;
  2153. if (!capable(CAP_SYS_RAWIO))
  2154. return -EPERM;
  2155. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2156. return -EFAULT;
  2157. if ((iocommand.buf_size < 1) &&
  2158. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2159. return -EINVAL;
  2160. }
  2161. if (iocommand.buf_size > 0) {
  2162. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2163. if (buff == NULL)
  2164. return -EFAULT;
  2165. }
  2166. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2167. /* Copy the data into the buffer we created */
  2168. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2169. kfree(buff);
  2170. return -EFAULT;
  2171. }
  2172. } else
  2173. memset(buff, 0, iocommand.buf_size);
  2174. c = cmd_special_alloc(h);
  2175. if (c == NULL) {
  2176. kfree(buff);
  2177. return -ENOMEM;
  2178. }
  2179. /* Fill in the command type */
  2180. c->cmd_type = CMD_IOCTL_PEND;
  2181. /* Fill in Command Header */
  2182. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2183. if (iocommand.buf_size > 0) { /* buffer to fill */
  2184. c->Header.SGList = 1;
  2185. c->Header.SGTotal = 1;
  2186. } else { /* no buffers to fill */
  2187. c->Header.SGList = 0;
  2188. c->Header.SGTotal = 0;
  2189. }
  2190. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2191. /* use the kernel address the cmd block for tag */
  2192. c->Header.Tag.lower = c->busaddr;
  2193. /* Fill in Request block */
  2194. memcpy(&c->Request, &iocommand.Request,
  2195. sizeof(c->Request));
  2196. /* Fill in the scatter gather information */
  2197. if (iocommand.buf_size > 0) {
  2198. temp64.val = pci_map_single(h->pdev, buff,
  2199. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2200. c->SG[0].Addr.lower = temp64.val32.lower;
  2201. c->SG[0].Addr.upper = temp64.val32.upper;
  2202. c->SG[0].Len = iocommand.buf_size;
  2203. c->SG[0].Ext = 0; /* we are not chaining*/
  2204. }
  2205. hpsa_scsi_do_simple_cmd_core(h, c);
  2206. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2207. check_ioctl_unit_attention(h, c);
  2208. /* Copy the error information out */
  2209. memcpy(&iocommand.error_info, c->err_info,
  2210. sizeof(iocommand.error_info));
  2211. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2212. kfree(buff);
  2213. cmd_special_free(h, c);
  2214. return -EFAULT;
  2215. }
  2216. if (iocommand.Request.Type.Direction == XFER_READ) {
  2217. /* Copy the data out of the buffer we created */
  2218. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2219. kfree(buff);
  2220. cmd_special_free(h, c);
  2221. return -EFAULT;
  2222. }
  2223. }
  2224. kfree(buff);
  2225. cmd_special_free(h, c);
  2226. return 0;
  2227. }
  2228. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2229. {
  2230. BIG_IOCTL_Command_struct *ioc;
  2231. struct CommandList *c;
  2232. unsigned char **buff = NULL;
  2233. int *buff_size = NULL;
  2234. union u64bit temp64;
  2235. BYTE sg_used = 0;
  2236. int status = 0;
  2237. int i;
  2238. u32 left;
  2239. u32 sz;
  2240. BYTE __user *data_ptr;
  2241. if (!argp)
  2242. return -EINVAL;
  2243. if (!capable(CAP_SYS_RAWIO))
  2244. return -EPERM;
  2245. ioc = (BIG_IOCTL_Command_struct *)
  2246. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2247. if (!ioc) {
  2248. status = -ENOMEM;
  2249. goto cleanup1;
  2250. }
  2251. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2252. status = -EFAULT;
  2253. goto cleanup1;
  2254. }
  2255. if ((ioc->buf_size < 1) &&
  2256. (ioc->Request.Type.Direction != XFER_NONE)) {
  2257. status = -EINVAL;
  2258. goto cleanup1;
  2259. }
  2260. /* Check kmalloc limits using all SGs */
  2261. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2262. status = -EINVAL;
  2263. goto cleanup1;
  2264. }
  2265. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2266. status = -EINVAL;
  2267. goto cleanup1;
  2268. }
  2269. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2270. if (!buff) {
  2271. status = -ENOMEM;
  2272. goto cleanup1;
  2273. }
  2274. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2275. if (!buff_size) {
  2276. status = -ENOMEM;
  2277. goto cleanup1;
  2278. }
  2279. left = ioc->buf_size;
  2280. data_ptr = ioc->buf;
  2281. while (left) {
  2282. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2283. buff_size[sg_used] = sz;
  2284. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2285. if (buff[sg_used] == NULL) {
  2286. status = -ENOMEM;
  2287. goto cleanup1;
  2288. }
  2289. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2290. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2291. status = -ENOMEM;
  2292. goto cleanup1;
  2293. }
  2294. } else
  2295. memset(buff[sg_used], 0, sz);
  2296. left -= sz;
  2297. data_ptr += sz;
  2298. sg_used++;
  2299. }
  2300. c = cmd_special_alloc(h);
  2301. if (c == NULL) {
  2302. status = -ENOMEM;
  2303. goto cleanup1;
  2304. }
  2305. c->cmd_type = CMD_IOCTL_PEND;
  2306. c->Header.ReplyQueue = 0;
  2307. if (ioc->buf_size > 0) {
  2308. c->Header.SGList = sg_used;
  2309. c->Header.SGTotal = sg_used;
  2310. } else {
  2311. c->Header.SGList = 0;
  2312. c->Header.SGTotal = 0;
  2313. }
  2314. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2315. c->Header.Tag.lower = c->busaddr;
  2316. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2317. if (ioc->buf_size > 0) {
  2318. int i;
  2319. for (i = 0; i < sg_used; i++) {
  2320. temp64.val = pci_map_single(h->pdev, buff[i],
  2321. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2322. c->SG[i].Addr.lower = temp64.val32.lower;
  2323. c->SG[i].Addr.upper = temp64.val32.upper;
  2324. c->SG[i].Len = buff_size[i];
  2325. /* we are not chaining */
  2326. c->SG[i].Ext = 0;
  2327. }
  2328. }
  2329. hpsa_scsi_do_simple_cmd_core(h, c);
  2330. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2331. check_ioctl_unit_attention(h, c);
  2332. /* Copy the error information out */
  2333. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2334. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2335. cmd_special_free(h, c);
  2336. status = -EFAULT;
  2337. goto cleanup1;
  2338. }
  2339. if (ioc->Request.Type.Direction == XFER_READ) {
  2340. /* Copy the data out of the buffer we created */
  2341. BYTE __user *ptr = ioc->buf;
  2342. for (i = 0; i < sg_used; i++) {
  2343. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2344. cmd_special_free(h, c);
  2345. status = -EFAULT;
  2346. goto cleanup1;
  2347. }
  2348. ptr += buff_size[i];
  2349. }
  2350. }
  2351. cmd_special_free(h, c);
  2352. status = 0;
  2353. cleanup1:
  2354. if (buff) {
  2355. for (i = 0; i < sg_used; i++)
  2356. kfree(buff[i]);
  2357. kfree(buff);
  2358. }
  2359. kfree(buff_size);
  2360. kfree(ioc);
  2361. return status;
  2362. }
  2363. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2364. struct CommandList *c)
  2365. {
  2366. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2367. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2368. (void) check_for_unit_attention(h, c);
  2369. }
  2370. /*
  2371. * ioctl
  2372. */
  2373. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2374. {
  2375. struct ctlr_info *h;
  2376. void __user *argp = (void __user *)arg;
  2377. h = sdev_to_hba(dev);
  2378. switch (cmd) {
  2379. case CCISS_DEREGDISK:
  2380. case CCISS_REGNEWDISK:
  2381. case CCISS_REGNEWD:
  2382. hpsa_scan_start(h->scsi_host);
  2383. return 0;
  2384. case CCISS_GETPCIINFO:
  2385. return hpsa_getpciinfo_ioctl(h, argp);
  2386. case CCISS_GETDRIVVER:
  2387. return hpsa_getdrivver_ioctl(h, argp);
  2388. case CCISS_PASSTHRU:
  2389. return hpsa_passthru_ioctl(h, argp);
  2390. case CCISS_BIG_PASSTHRU:
  2391. return hpsa_big_passthru_ioctl(h, argp);
  2392. default:
  2393. return -ENOTTY;
  2394. }
  2395. }
  2396. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2397. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2398. int cmd_type)
  2399. {
  2400. int pci_dir = XFER_NONE;
  2401. c->cmd_type = CMD_IOCTL_PEND;
  2402. c->Header.ReplyQueue = 0;
  2403. if (buff != NULL && size > 0) {
  2404. c->Header.SGList = 1;
  2405. c->Header.SGTotal = 1;
  2406. } else {
  2407. c->Header.SGList = 0;
  2408. c->Header.SGTotal = 0;
  2409. }
  2410. c->Header.Tag.lower = c->busaddr;
  2411. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2412. c->Request.Type.Type = cmd_type;
  2413. if (cmd_type == TYPE_CMD) {
  2414. switch (cmd) {
  2415. case HPSA_INQUIRY:
  2416. /* are we trying to read a vital product page */
  2417. if (page_code != 0) {
  2418. c->Request.CDB[1] = 0x01;
  2419. c->Request.CDB[2] = page_code;
  2420. }
  2421. c->Request.CDBLen = 6;
  2422. c->Request.Type.Attribute = ATTR_SIMPLE;
  2423. c->Request.Type.Direction = XFER_READ;
  2424. c->Request.Timeout = 0;
  2425. c->Request.CDB[0] = HPSA_INQUIRY;
  2426. c->Request.CDB[4] = size & 0xFF;
  2427. break;
  2428. case HPSA_REPORT_LOG:
  2429. case HPSA_REPORT_PHYS:
  2430. /* Talking to controller so It's a physical command
  2431. mode = 00 target = 0. Nothing to write.
  2432. */
  2433. c->Request.CDBLen = 12;
  2434. c->Request.Type.Attribute = ATTR_SIMPLE;
  2435. c->Request.Type.Direction = XFER_READ;
  2436. c->Request.Timeout = 0;
  2437. c->Request.CDB[0] = cmd;
  2438. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2439. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2440. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2441. c->Request.CDB[9] = size & 0xFF;
  2442. break;
  2443. case HPSA_CACHE_FLUSH:
  2444. c->Request.CDBLen = 12;
  2445. c->Request.Type.Attribute = ATTR_SIMPLE;
  2446. c->Request.Type.Direction = XFER_WRITE;
  2447. c->Request.Timeout = 0;
  2448. c->Request.CDB[0] = BMIC_WRITE;
  2449. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2450. break;
  2451. case TEST_UNIT_READY:
  2452. c->Request.CDBLen = 6;
  2453. c->Request.Type.Attribute = ATTR_SIMPLE;
  2454. c->Request.Type.Direction = XFER_NONE;
  2455. c->Request.Timeout = 0;
  2456. break;
  2457. default:
  2458. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2459. BUG();
  2460. return;
  2461. }
  2462. } else if (cmd_type == TYPE_MSG) {
  2463. switch (cmd) {
  2464. case HPSA_DEVICE_RESET_MSG:
  2465. c->Request.CDBLen = 16;
  2466. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2467. c->Request.Type.Attribute = ATTR_SIMPLE;
  2468. c->Request.Type.Direction = XFER_NONE;
  2469. c->Request.Timeout = 0; /* Don't time out */
  2470. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2471. c->Request.CDB[1] = 0x03; /* Reset target above */
  2472. /* If bytes 4-7 are zero, it means reset the */
  2473. /* LunID device */
  2474. c->Request.CDB[4] = 0x00;
  2475. c->Request.CDB[5] = 0x00;
  2476. c->Request.CDB[6] = 0x00;
  2477. c->Request.CDB[7] = 0x00;
  2478. break;
  2479. default:
  2480. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2481. cmd);
  2482. BUG();
  2483. }
  2484. } else {
  2485. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2486. BUG();
  2487. }
  2488. switch (c->Request.Type.Direction) {
  2489. case XFER_READ:
  2490. pci_dir = PCI_DMA_FROMDEVICE;
  2491. break;
  2492. case XFER_WRITE:
  2493. pci_dir = PCI_DMA_TODEVICE;
  2494. break;
  2495. case XFER_NONE:
  2496. pci_dir = PCI_DMA_NONE;
  2497. break;
  2498. default:
  2499. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2500. }
  2501. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2502. return;
  2503. }
  2504. /*
  2505. * Map (physical) PCI mem into (virtual) kernel space
  2506. */
  2507. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2508. {
  2509. ulong page_base = ((ulong) base) & PAGE_MASK;
  2510. ulong page_offs = ((ulong) base) - page_base;
  2511. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2512. return page_remapped ? (page_remapped + page_offs) : NULL;
  2513. }
  2514. /* Takes cmds off the submission queue and sends them to the hardware,
  2515. * then puts them on the queue of cmds waiting for completion.
  2516. */
  2517. static void start_io(struct ctlr_info *h)
  2518. {
  2519. struct CommandList *c;
  2520. while (!hlist_empty(&h->reqQ)) {
  2521. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2522. /* can't do anything if fifo is full */
  2523. if ((h->access.fifo_full(h))) {
  2524. dev_warn(&h->pdev->dev, "fifo full\n");
  2525. break;
  2526. }
  2527. /* Get the first entry from the Request Q */
  2528. removeQ(c);
  2529. h->Qdepth--;
  2530. /* Tell the controller execute command */
  2531. h->access.submit_command(h, c);
  2532. /* Put job onto the completed Q */
  2533. addQ(&h->cmpQ, c);
  2534. }
  2535. }
  2536. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2537. {
  2538. return h->access.command_completed(h);
  2539. }
  2540. static inline bool interrupt_pending(struct ctlr_info *h)
  2541. {
  2542. return h->access.intr_pending(h);
  2543. }
  2544. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2545. {
  2546. return (h->access.intr_pending(h) == 0) ||
  2547. (h->interrupts_enabled == 0);
  2548. }
  2549. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2550. u32 raw_tag)
  2551. {
  2552. if (unlikely(tag_index >= h->nr_cmds)) {
  2553. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2554. return 1;
  2555. }
  2556. return 0;
  2557. }
  2558. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2559. {
  2560. removeQ(c);
  2561. if (likely(c->cmd_type == CMD_SCSI))
  2562. complete_scsi_command(c, 0, raw_tag);
  2563. else if (c->cmd_type == CMD_IOCTL_PEND)
  2564. complete(c->waiting);
  2565. }
  2566. static inline u32 hpsa_tag_contains_index(u32 tag)
  2567. {
  2568. #define DIRECT_LOOKUP_BIT 0x10
  2569. return tag & DIRECT_LOOKUP_BIT;
  2570. }
  2571. static inline u32 hpsa_tag_to_index(u32 tag)
  2572. {
  2573. #define DIRECT_LOOKUP_SHIFT 5
  2574. return tag >> DIRECT_LOOKUP_SHIFT;
  2575. }
  2576. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2577. {
  2578. #define HPSA_ERROR_BITS 0x03
  2579. return tag & ~HPSA_ERROR_BITS;
  2580. }
  2581. /* process completion of an indexed ("direct lookup") command */
  2582. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2583. u32 raw_tag)
  2584. {
  2585. u32 tag_index;
  2586. struct CommandList *c;
  2587. tag_index = hpsa_tag_to_index(raw_tag);
  2588. if (bad_tag(h, tag_index, raw_tag))
  2589. return next_command(h);
  2590. c = h->cmd_pool + tag_index;
  2591. finish_cmd(c, raw_tag);
  2592. return next_command(h);
  2593. }
  2594. /* process completion of a non-indexed command */
  2595. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2596. u32 raw_tag)
  2597. {
  2598. u32 tag;
  2599. struct CommandList *c = NULL;
  2600. struct hlist_node *tmp;
  2601. tag = hpsa_tag_discard_error_bits(raw_tag);
  2602. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2603. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2604. finish_cmd(c, raw_tag);
  2605. return next_command(h);
  2606. }
  2607. }
  2608. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2609. return next_command(h);
  2610. }
  2611. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2612. {
  2613. struct ctlr_info *h = dev_id;
  2614. unsigned long flags;
  2615. u32 raw_tag;
  2616. if (interrupt_not_for_us(h))
  2617. return IRQ_NONE;
  2618. spin_lock_irqsave(&h->lock, flags);
  2619. while (interrupt_pending(h)) {
  2620. raw_tag = get_next_completion(h);
  2621. while (raw_tag != FIFO_EMPTY) {
  2622. if (hpsa_tag_contains_index(raw_tag))
  2623. raw_tag = process_indexed_cmd(h, raw_tag);
  2624. else
  2625. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2626. }
  2627. }
  2628. spin_unlock_irqrestore(&h->lock, flags);
  2629. return IRQ_HANDLED;
  2630. }
  2631. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2632. {
  2633. struct ctlr_info *h = dev_id;
  2634. unsigned long flags;
  2635. u32 raw_tag;
  2636. spin_lock_irqsave(&h->lock, flags);
  2637. raw_tag = get_next_completion(h);
  2638. while (raw_tag != FIFO_EMPTY) {
  2639. if (hpsa_tag_contains_index(raw_tag))
  2640. raw_tag = process_indexed_cmd(h, raw_tag);
  2641. else
  2642. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2643. }
  2644. spin_unlock_irqrestore(&h->lock, flags);
  2645. return IRQ_HANDLED;
  2646. }
  2647. /* Send a message CDB to the firmware. */
  2648. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2649. unsigned char type)
  2650. {
  2651. struct Command {
  2652. struct CommandListHeader CommandHeader;
  2653. struct RequestBlock Request;
  2654. struct ErrDescriptor ErrorDescriptor;
  2655. };
  2656. struct Command *cmd;
  2657. static const size_t cmd_sz = sizeof(*cmd) +
  2658. sizeof(cmd->ErrorDescriptor);
  2659. dma_addr_t paddr64;
  2660. uint32_t paddr32, tag;
  2661. void __iomem *vaddr;
  2662. int i, err;
  2663. vaddr = pci_ioremap_bar(pdev, 0);
  2664. if (vaddr == NULL)
  2665. return -ENOMEM;
  2666. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2667. * CCISS commands, so they must be allocated from the lower 4GiB of
  2668. * memory.
  2669. */
  2670. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2671. if (err) {
  2672. iounmap(vaddr);
  2673. return -ENOMEM;
  2674. }
  2675. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2676. if (cmd == NULL) {
  2677. iounmap(vaddr);
  2678. return -ENOMEM;
  2679. }
  2680. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2681. * although there's no guarantee, we assume that the address is at
  2682. * least 4-byte aligned (most likely, it's page-aligned).
  2683. */
  2684. paddr32 = paddr64;
  2685. cmd->CommandHeader.ReplyQueue = 0;
  2686. cmd->CommandHeader.SGList = 0;
  2687. cmd->CommandHeader.SGTotal = 0;
  2688. cmd->CommandHeader.Tag.lower = paddr32;
  2689. cmd->CommandHeader.Tag.upper = 0;
  2690. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2691. cmd->Request.CDBLen = 16;
  2692. cmd->Request.Type.Type = TYPE_MSG;
  2693. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2694. cmd->Request.Type.Direction = XFER_NONE;
  2695. cmd->Request.Timeout = 0; /* Don't time out */
  2696. cmd->Request.CDB[0] = opcode;
  2697. cmd->Request.CDB[1] = type;
  2698. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2699. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2700. cmd->ErrorDescriptor.Addr.upper = 0;
  2701. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2702. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2703. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2704. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2705. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2706. break;
  2707. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2708. }
  2709. iounmap(vaddr);
  2710. /* we leak the DMA buffer here ... no choice since the controller could
  2711. * still complete the command.
  2712. */
  2713. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2714. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2715. opcode, type);
  2716. return -ETIMEDOUT;
  2717. }
  2718. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2719. if (tag & HPSA_ERROR_BIT) {
  2720. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2721. opcode, type);
  2722. return -EIO;
  2723. }
  2724. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2725. opcode, type);
  2726. return 0;
  2727. }
  2728. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2729. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2730. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2731. {
  2732. /* the #defines are stolen from drivers/pci/msi.h. */
  2733. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2734. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2735. int pos;
  2736. u16 control = 0;
  2737. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2738. if (pos) {
  2739. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2740. if (control & PCI_MSI_FLAGS_ENABLE) {
  2741. dev_info(&pdev->dev, "resetting MSI\n");
  2742. pci_write_config_word(pdev, msi_control_reg(pos),
  2743. control & ~PCI_MSI_FLAGS_ENABLE);
  2744. }
  2745. }
  2746. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2747. if (pos) {
  2748. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2749. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2750. dev_info(&pdev->dev, "resetting MSI-X\n");
  2751. pci_write_config_word(pdev, msi_control_reg(pos),
  2752. control & ~PCI_MSIX_FLAGS_ENABLE);
  2753. }
  2754. }
  2755. return 0;
  2756. }
  2757. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2758. void * __iomem vaddr, bool use_doorbell)
  2759. {
  2760. u16 pmcsr;
  2761. int pos;
  2762. if (use_doorbell) {
  2763. /* For everything after the P600, the PCI power state method
  2764. * of resetting the controller doesn't work, so we have this
  2765. * other way using the doorbell register.
  2766. */
  2767. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2768. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2769. msleep(1000);
  2770. } else { /* Try to do it the PCI power state way */
  2771. /* Quoting from the Open CISS Specification: "The Power
  2772. * Management Control/Status Register (CSR) controls the power
  2773. * state of the device. The normal operating state is D0,
  2774. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2775. * the controller, place the interface device in D3 then to D0,
  2776. * this causes a secondary PCI reset which will reset the
  2777. * controller." */
  2778. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2779. if (pos == 0) {
  2780. dev_err(&pdev->dev,
  2781. "hpsa_reset_controller: "
  2782. "PCI PM not supported\n");
  2783. return -ENODEV;
  2784. }
  2785. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2786. /* enter the D3hot power management state */
  2787. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2788. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2789. pmcsr |= PCI_D3hot;
  2790. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2791. msleep(500);
  2792. /* enter the D0 power management state */
  2793. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2794. pmcsr |= PCI_D0;
  2795. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2796. msleep(500);
  2797. }
  2798. return 0;
  2799. }
  2800. /* This does a hard reset of the controller using PCI power management
  2801. * states or the using the doorbell register.
  2802. */
  2803. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2804. {
  2805. u16 saved_config_space[32];
  2806. u64 cfg_offset;
  2807. u32 cfg_base_addr;
  2808. u64 cfg_base_addr_index;
  2809. void __iomem *vaddr;
  2810. unsigned long paddr;
  2811. u32 misc_fw_support, active_transport;
  2812. int rc, i;
  2813. struct CfgTable __iomem *cfgtable;
  2814. bool use_doorbell;
  2815. u32 board_id;
  2816. /* For controllers as old as the P600, this is very nearly
  2817. * the same thing as
  2818. *
  2819. * pci_save_state(pci_dev);
  2820. * pci_set_power_state(pci_dev, PCI_D3hot);
  2821. * pci_set_power_state(pci_dev, PCI_D0);
  2822. * pci_restore_state(pci_dev);
  2823. *
  2824. * but we can't use these nice canned kernel routines on
  2825. * kexec, because they also check the MSI/MSI-X state in PCI
  2826. * configuration space and do the wrong thing when it is
  2827. * set/cleared. Also, the pci_save/restore_state functions
  2828. * violate the ordering requirements for restoring the
  2829. * configuration space from the CCISS document (see the
  2830. * comment below). So we roll our own ....
  2831. *
  2832. * For controllers newer than the P600, the pci power state
  2833. * method of resetting doesn't work so we have another way
  2834. * using the doorbell register.
  2835. */
  2836. /* Exclude 640x boards. These are two pci devices in one slot
  2837. * which share a battery backed cache module. One controls the
  2838. * cache, the other accesses the cache through the one that controls
  2839. * it. If we reset the one controlling the cache, the other will
  2840. * likely not be happy. Just forbid resetting this conjoined mess.
  2841. * The 640x isn't really supported by hpsa anyway.
  2842. */
  2843. hpsa_lookup_board_id(pdev, &board_id);
  2844. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2845. return -ENOTSUPP;
  2846. for (i = 0; i < 32; i++)
  2847. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2848. /* find the first memory BAR, so we can find the cfg table */
  2849. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2850. if (rc)
  2851. return rc;
  2852. vaddr = remap_pci_mem(paddr, 0x250);
  2853. if (!vaddr)
  2854. return -ENOMEM;
  2855. /* find cfgtable in order to check if reset via doorbell is supported */
  2856. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2857. &cfg_base_addr_index, &cfg_offset);
  2858. if (rc)
  2859. goto unmap_vaddr;
  2860. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2861. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2862. if (!cfgtable) {
  2863. rc = -ENOMEM;
  2864. goto unmap_vaddr;
  2865. }
  2866. /* If reset via doorbell register is supported, use that. */
  2867. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2868. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2869. /* The doorbell reset seems to cause lockups on some Smart
  2870. * Arrays (e.g. P410, P410i, maybe others). Until this is
  2871. * fixed or at least isolated, avoid the doorbell reset.
  2872. */
  2873. use_doorbell = 0;
  2874. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2875. if (rc)
  2876. goto unmap_cfgtable;
  2877. /* Restore the PCI configuration space. The Open CISS
  2878. * Specification says, "Restore the PCI Configuration
  2879. * Registers, offsets 00h through 60h. It is important to
  2880. * restore the command register, 16-bits at offset 04h,
  2881. * last. Do not restore the configuration status register,
  2882. * 16-bits at offset 06h." Note that the offset is 2*i.
  2883. */
  2884. for (i = 0; i < 32; i++) {
  2885. if (i == 2 || i == 3)
  2886. continue;
  2887. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2888. }
  2889. wmb();
  2890. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2891. /* Some devices (notably the HP Smart Array 5i Controller)
  2892. need a little pause here */
  2893. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2894. /* Controller should be in simple mode at this point. If it's not,
  2895. * It means we're on one of those controllers which doesn't support
  2896. * the doorbell reset method and on which the PCI power management reset
  2897. * method doesn't work (P800, for example.)
  2898. * In those cases, pretend the reset worked and hope for the best.
  2899. */
  2900. active_transport = readl(&cfgtable->TransportActive);
  2901. if (active_transport & PERFORMANT_MODE) {
  2902. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2903. " proceeding anyway.\n");
  2904. rc = -ENOTSUPP;
  2905. }
  2906. unmap_cfgtable:
  2907. iounmap(cfgtable);
  2908. unmap_vaddr:
  2909. iounmap(vaddr);
  2910. return rc;
  2911. }
  2912. /*
  2913. * We cannot read the structure directly, for portability we must use
  2914. * the io functions.
  2915. * This is for debug only.
  2916. */
  2917. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2918. {
  2919. #ifdef HPSA_DEBUG
  2920. int i;
  2921. char temp_name[17];
  2922. dev_info(dev, "Controller Configuration information\n");
  2923. dev_info(dev, "------------------------------------\n");
  2924. for (i = 0; i < 4; i++)
  2925. temp_name[i] = readb(&(tb->Signature[i]));
  2926. temp_name[4] = '\0';
  2927. dev_info(dev, " Signature = %s\n", temp_name);
  2928. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2929. dev_info(dev, " Transport methods supported = 0x%x\n",
  2930. readl(&(tb->TransportSupport)));
  2931. dev_info(dev, " Transport methods active = 0x%x\n",
  2932. readl(&(tb->TransportActive)));
  2933. dev_info(dev, " Requested transport Method = 0x%x\n",
  2934. readl(&(tb->HostWrite.TransportRequest)));
  2935. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2936. readl(&(tb->HostWrite.CoalIntDelay)));
  2937. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2938. readl(&(tb->HostWrite.CoalIntCount)));
  2939. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2940. readl(&(tb->CmdsOutMax)));
  2941. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2942. for (i = 0; i < 16; i++)
  2943. temp_name[i] = readb(&(tb->ServerName[i]));
  2944. temp_name[16] = '\0';
  2945. dev_info(dev, " Server Name = %s\n", temp_name);
  2946. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2947. readl(&(tb->HeartBeat)));
  2948. #endif /* HPSA_DEBUG */
  2949. }
  2950. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2951. {
  2952. int i, offset, mem_type, bar_type;
  2953. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2954. return 0;
  2955. offset = 0;
  2956. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2957. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2958. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2959. offset += 4;
  2960. else {
  2961. mem_type = pci_resource_flags(pdev, i) &
  2962. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2963. switch (mem_type) {
  2964. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2965. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2966. offset += 4; /* 32 bit */
  2967. break;
  2968. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2969. offset += 8;
  2970. break;
  2971. default: /* reserved in PCI 2.2 */
  2972. dev_warn(&pdev->dev,
  2973. "base address is invalid\n");
  2974. return -1;
  2975. break;
  2976. }
  2977. }
  2978. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2979. return i + 1;
  2980. }
  2981. return -1;
  2982. }
  2983. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2984. * controllers that are capable. If not, we use IO-APIC mode.
  2985. */
  2986. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2987. {
  2988. #ifdef CONFIG_PCI_MSI
  2989. int err;
  2990. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2991. {0, 2}, {0, 3}
  2992. };
  2993. /* Some boards advertise MSI but don't really support it */
  2994. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  2995. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  2996. goto default_int_mode;
  2997. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  2998. dev_info(&h->pdev->dev, "MSIX\n");
  2999. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3000. if (!err) {
  3001. h->intr[0] = hpsa_msix_entries[0].vector;
  3002. h->intr[1] = hpsa_msix_entries[1].vector;
  3003. h->intr[2] = hpsa_msix_entries[2].vector;
  3004. h->intr[3] = hpsa_msix_entries[3].vector;
  3005. h->msix_vector = 1;
  3006. return;
  3007. }
  3008. if (err > 0) {
  3009. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3010. "available\n", err);
  3011. goto default_int_mode;
  3012. } else {
  3013. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3014. err);
  3015. goto default_int_mode;
  3016. }
  3017. }
  3018. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3019. dev_info(&h->pdev->dev, "MSI\n");
  3020. if (!pci_enable_msi(h->pdev))
  3021. h->msi_vector = 1;
  3022. else
  3023. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3024. }
  3025. default_int_mode:
  3026. #endif /* CONFIG_PCI_MSI */
  3027. /* if we get here we're going to use the default interrupt mode */
  3028. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3029. }
  3030. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3031. {
  3032. int i;
  3033. u32 subsystem_vendor_id, subsystem_device_id;
  3034. subsystem_vendor_id = pdev->subsystem_vendor;
  3035. subsystem_device_id = pdev->subsystem_device;
  3036. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3037. subsystem_vendor_id;
  3038. for (i = 0; i < ARRAY_SIZE(products); i++)
  3039. if (*board_id == products[i].board_id)
  3040. return i;
  3041. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3042. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3043. !hpsa_allow_any) {
  3044. dev_warn(&pdev->dev, "unrecognized board ID: "
  3045. "0x%08x, ignoring.\n", *board_id);
  3046. return -ENODEV;
  3047. }
  3048. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3049. }
  3050. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3051. {
  3052. u16 command;
  3053. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3054. return ((command & PCI_COMMAND_MEMORY) == 0);
  3055. }
  3056. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3057. unsigned long *memory_bar)
  3058. {
  3059. int i;
  3060. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3061. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3062. /* addressing mode bits already removed */
  3063. *memory_bar = pci_resource_start(pdev, i);
  3064. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3065. *memory_bar);
  3066. return 0;
  3067. }
  3068. dev_warn(&pdev->dev, "no memory BAR found\n");
  3069. return -ENODEV;
  3070. }
  3071. static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
  3072. {
  3073. int i;
  3074. u32 scratchpad;
  3075. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  3076. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3077. if (scratchpad == HPSA_FIRMWARE_READY)
  3078. return 0;
  3079. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3080. }
  3081. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  3082. return -ENODEV;
  3083. }
  3084. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3085. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3086. u64 *cfg_offset)
  3087. {
  3088. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3089. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3090. *cfg_base_addr &= (u32) 0x0000ffff;
  3091. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3092. if (*cfg_base_addr_index == -1) {
  3093. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3094. return -ENODEV;
  3095. }
  3096. return 0;
  3097. }
  3098. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3099. {
  3100. u64 cfg_offset;
  3101. u32 cfg_base_addr;
  3102. u64 cfg_base_addr_index;
  3103. u32 trans_offset;
  3104. int rc;
  3105. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3106. &cfg_base_addr_index, &cfg_offset);
  3107. if (rc)
  3108. return rc;
  3109. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3110. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3111. if (!h->cfgtable)
  3112. return -ENOMEM;
  3113. /* Find performant mode table. */
  3114. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3115. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3116. cfg_base_addr_index)+cfg_offset+trans_offset,
  3117. sizeof(*h->transtable));
  3118. if (!h->transtable)
  3119. return -ENOMEM;
  3120. return 0;
  3121. }
  3122. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3123. {
  3124. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3125. if (h->max_commands < 16) {
  3126. dev_warn(&h->pdev->dev, "Controller reports "
  3127. "max supported commands of %d, an obvious lie. "
  3128. "Using 16. Ensure that firmware is up to date.\n",
  3129. h->max_commands);
  3130. h->max_commands = 16;
  3131. }
  3132. }
  3133. /* Interrogate the hardware for some limits:
  3134. * max commands, max SG elements without chaining, and with chaining,
  3135. * SG chain block size, etc.
  3136. */
  3137. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3138. {
  3139. hpsa_get_max_perf_mode_cmds(h);
  3140. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3141. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3142. /*
  3143. * Limit in-command s/g elements to 32 save dma'able memory.
  3144. * Howvever spec says if 0, use 31
  3145. */
  3146. h->max_cmd_sg_entries = 31;
  3147. if (h->maxsgentries > 512) {
  3148. h->max_cmd_sg_entries = 32;
  3149. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3150. h->maxsgentries--; /* save one for chain pointer */
  3151. } else {
  3152. h->maxsgentries = 31; /* default to traditional values */
  3153. h->chainsize = 0;
  3154. }
  3155. }
  3156. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3157. {
  3158. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3159. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3160. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3161. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3162. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3163. return false;
  3164. }
  3165. return true;
  3166. }
  3167. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3168. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3169. {
  3170. #ifdef CONFIG_X86
  3171. u32 prefetch;
  3172. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3173. prefetch |= 0x100;
  3174. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3175. #endif
  3176. }
  3177. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3178. * in a prefetch beyond physical memory.
  3179. */
  3180. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3181. {
  3182. u32 dma_prefetch;
  3183. if (h->board_id != 0x3225103C)
  3184. return;
  3185. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3186. dma_prefetch |= 0x8000;
  3187. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3188. }
  3189. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3190. {
  3191. int i;
  3192. /* under certain very rare conditions, this can take awhile.
  3193. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3194. * as we enter this code.)
  3195. */
  3196. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3197. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3198. break;
  3199. /* delay and try again */
  3200. msleep(10);
  3201. }
  3202. }
  3203. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3204. {
  3205. u32 trans_support;
  3206. trans_support = readl(&(h->cfgtable->TransportSupport));
  3207. if (!(trans_support & SIMPLE_MODE))
  3208. return -ENOTSUPP;
  3209. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3210. /* Update the field, and then ring the doorbell */
  3211. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3212. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3213. hpsa_wait_for_mode_change_ack(h);
  3214. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3215. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3216. dev_warn(&h->pdev->dev,
  3217. "unable to get board into simple mode\n");
  3218. return -ENODEV;
  3219. }
  3220. return 0;
  3221. }
  3222. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3223. {
  3224. int prod_index, err;
  3225. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3226. if (prod_index < 0)
  3227. return -ENODEV;
  3228. h->product_name = products[prod_index].product_name;
  3229. h->access = *(products[prod_index].access);
  3230. if (hpsa_board_disabled(h->pdev)) {
  3231. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3232. return -ENODEV;
  3233. }
  3234. err = pci_enable_device(h->pdev);
  3235. if (err) {
  3236. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3237. return err;
  3238. }
  3239. err = pci_request_regions(h->pdev, "hpsa");
  3240. if (err) {
  3241. dev_err(&h->pdev->dev,
  3242. "cannot obtain PCI resources, aborting\n");
  3243. return err;
  3244. }
  3245. hpsa_interrupt_mode(h);
  3246. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3247. if (err)
  3248. goto err_out_free_res;
  3249. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3250. if (!h->vaddr) {
  3251. err = -ENOMEM;
  3252. goto err_out_free_res;
  3253. }
  3254. err = hpsa_wait_for_board_ready(h);
  3255. if (err)
  3256. goto err_out_free_res;
  3257. err = hpsa_find_cfgtables(h);
  3258. if (err)
  3259. goto err_out_free_res;
  3260. hpsa_find_board_params(h);
  3261. if (!hpsa_CISS_signature_present(h)) {
  3262. err = -ENODEV;
  3263. goto err_out_free_res;
  3264. }
  3265. hpsa_enable_scsi_prefetch(h);
  3266. hpsa_p600_dma_prefetch_quirk(h);
  3267. err = hpsa_enter_simple_mode(h);
  3268. if (err)
  3269. goto err_out_free_res;
  3270. return 0;
  3271. err_out_free_res:
  3272. if (h->transtable)
  3273. iounmap(h->transtable);
  3274. if (h->cfgtable)
  3275. iounmap(h->cfgtable);
  3276. if (h->vaddr)
  3277. iounmap(h->vaddr);
  3278. /*
  3279. * Deliberately omit pci_disable_device(): it does something nasty to
  3280. * Smart Array controllers that pci_enable_device does not undo
  3281. */
  3282. pci_release_regions(h->pdev);
  3283. return err;
  3284. }
  3285. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3286. {
  3287. int rc;
  3288. #define HBA_INQUIRY_BYTE_COUNT 64
  3289. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3290. if (!h->hba_inquiry_data)
  3291. return;
  3292. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3293. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3294. if (rc != 0) {
  3295. kfree(h->hba_inquiry_data);
  3296. h->hba_inquiry_data = NULL;
  3297. }
  3298. }
  3299. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3300. {
  3301. int rc, i;
  3302. if (!reset_devices)
  3303. return 0;
  3304. /* Reset the controller with a PCI power-cycle or via doorbell */
  3305. rc = hpsa_kdump_hard_reset_controller(pdev);
  3306. /* -ENOTSUPP here means we cannot reset the controller
  3307. * but it's already (and still) up and running in
  3308. * "performant mode". Or, it might be 640x, which can't reset
  3309. * due to concerns about shared bbwc between 6402/6404 pair.
  3310. */
  3311. if (rc == -ENOTSUPP)
  3312. return 0; /* just try to do the kdump anyhow. */
  3313. if (rc)
  3314. return -ENODEV;
  3315. if (hpsa_reset_msi(pdev))
  3316. return -ENODEV;
  3317. /* Now try to get the controller to respond to a no-op */
  3318. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3319. if (hpsa_noop(pdev) == 0)
  3320. break;
  3321. else
  3322. dev_warn(&pdev->dev, "no-op failed%s\n",
  3323. (i < 11 ? "; re-trying" : ""));
  3324. }
  3325. return 0;
  3326. }
  3327. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3328. const struct pci_device_id *ent)
  3329. {
  3330. int dac, rc;
  3331. struct ctlr_info *h;
  3332. if (number_of_controllers == 0)
  3333. printk(KERN_INFO DRIVER_NAME "\n");
  3334. rc = hpsa_init_reset_devices(pdev);
  3335. if (rc)
  3336. return rc;
  3337. /* Command structures must be aligned on a 32-byte boundary because
  3338. * the 5 lower bits of the address are used by the hardware. and by
  3339. * the driver. See comments in hpsa.h for more info.
  3340. */
  3341. #define COMMANDLIST_ALIGNMENT 32
  3342. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3343. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3344. if (!h)
  3345. return -ENOMEM;
  3346. h->pdev = pdev;
  3347. h->busy_initializing = 1;
  3348. INIT_HLIST_HEAD(&h->cmpQ);
  3349. INIT_HLIST_HEAD(&h->reqQ);
  3350. rc = hpsa_pci_init(h);
  3351. if (rc != 0)
  3352. goto clean1;
  3353. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3354. h->ctlr = number_of_controllers;
  3355. number_of_controllers++;
  3356. /* configure PCI DMA stuff */
  3357. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3358. if (rc == 0) {
  3359. dac = 1;
  3360. } else {
  3361. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3362. if (rc == 0) {
  3363. dac = 0;
  3364. } else {
  3365. dev_err(&pdev->dev, "no suitable DMA available\n");
  3366. goto clean1;
  3367. }
  3368. }
  3369. /* make sure the board interrupts are off */
  3370. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3371. if (h->msix_vector || h->msi_vector)
  3372. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
  3373. IRQF_DISABLED, h->devname, h);
  3374. else
  3375. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
  3376. IRQF_DISABLED, h->devname, h);
  3377. if (rc) {
  3378. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3379. h->intr[PERF_MODE_INT], h->devname);
  3380. goto clean2;
  3381. }
  3382. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3383. h->devname, pdev->device,
  3384. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3385. h->cmd_pool_bits =
  3386. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3387. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3388. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3389. h->nr_cmds * sizeof(*h->cmd_pool),
  3390. &(h->cmd_pool_dhandle));
  3391. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3392. h->nr_cmds * sizeof(*h->errinfo_pool),
  3393. &(h->errinfo_pool_dhandle));
  3394. if ((h->cmd_pool_bits == NULL)
  3395. || (h->cmd_pool == NULL)
  3396. || (h->errinfo_pool == NULL)) {
  3397. dev_err(&pdev->dev, "out of memory");
  3398. rc = -ENOMEM;
  3399. goto clean4;
  3400. }
  3401. if (hpsa_allocate_sg_chain_blocks(h))
  3402. goto clean4;
  3403. spin_lock_init(&h->lock);
  3404. spin_lock_init(&h->scan_lock);
  3405. init_waitqueue_head(&h->scan_wait_queue);
  3406. h->scan_finished = 1; /* no scan currently in progress */
  3407. pci_set_drvdata(pdev, h);
  3408. memset(h->cmd_pool_bits, 0,
  3409. ((h->nr_cmds + BITS_PER_LONG -
  3410. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3411. hpsa_scsi_setup(h);
  3412. /* Turn the interrupts on so we can service requests */
  3413. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3414. hpsa_put_ctlr_into_performant_mode(h);
  3415. hpsa_hba_inquiry(h);
  3416. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3417. h->busy_initializing = 0;
  3418. return 1;
  3419. clean4:
  3420. hpsa_free_sg_chain_blocks(h);
  3421. kfree(h->cmd_pool_bits);
  3422. if (h->cmd_pool)
  3423. pci_free_consistent(h->pdev,
  3424. h->nr_cmds * sizeof(struct CommandList),
  3425. h->cmd_pool, h->cmd_pool_dhandle);
  3426. if (h->errinfo_pool)
  3427. pci_free_consistent(h->pdev,
  3428. h->nr_cmds * sizeof(struct ErrorInfo),
  3429. h->errinfo_pool,
  3430. h->errinfo_pool_dhandle);
  3431. free_irq(h->intr[PERF_MODE_INT], h);
  3432. clean2:
  3433. clean1:
  3434. h->busy_initializing = 0;
  3435. kfree(h);
  3436. return rc;
  3437. }
  3438. static void hpsa_flush_cache(struct ctlr_info *h)
  3439. {
  3440. char *flush_buf;
  3441. struct CommandList *c;
  3442. flush_buf = kzalloc(4, GFP_KERNEL);
  3443. if (!flush_buf)
  3444. return;
  3445. c = cmd_special_alloc(h);
  3446. if (!c) {
  3447. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3448. goto out_of_memory;
  3449. }
  3450. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3451. RAID_CTLR_LUNID, TYPE_CMD);
  3452. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3453. if (c->err_info->CommandStatus != 0)
  3454. dev_warn(&h->pdev->dev,
  3455. "error flushing cache on controller\n");
  3456. cmd_special_free(h, c);
  3457. out_of_memory:
  3458. kfree(flush_buf);
  3459. }
  3460. static void hpsa_shutdown(struct pci_dev *pdev)
  3461. {
  3462. struct ctlr_info *h;
  3463. h = pci_get_drvdata(pdev);
  3464. /* Turn board interrupts off and send the flush cache command
  3465. * sendcmd will turn off interrupt, and send the flush...
  3466. * To write all data in the battery backed cache to disks
  3467. */
  3468. hpsa_flush_cache(h);
  3469. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3470. free_irq(h->intr[PERF_MODE_INT], h);
  3471. #ifdef CONFIG_PCI_MSI
  3472. if (h->msix_vector)
  3473. pci_disable_msix(h->pdev);
  3474. else if (h->msi_vector)
  3475. pci_disable_msi(h->pdev);
  3476. #endif /* CONFIG_PCI_MSI */
  3477. }
  3478. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3479. {
  3480. struct ctlr_info *h;
  3481. if (pci_get_drvdata(pdev) == NULL) {
  3482. dev_err(&pdev->dev, "unable to remove device \n");
  3483. return;
  3484. }
  3485. h = pci_get_drvdata(pdev);
  3486. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3487. hpsa_shutdown(pdev);
  3488. iounmap(h->vaddr);
  3489. iounmap(h->transtable);
  3490. iounmap(h->cfgtable);
  3491. hpsa_free_sg_chain_blocks(h);
  3492. pci_free_consistent(h->pdev,
  3493. h->nr_cmds * sizeof(struct CommandList),
  3494. h->cmd_pool, h->cmd_pool_dhandle);
  3495. pci_free_consistent(h->pdev,
  3496. h->nr_cmds * sizeof(struct ErrorInfo),
  3497. h->errinfo_pool, h->errinfo_pool_dhandle);
  3498. pci_free_consistent(h->pdev, h->reply_pool_size,
  3499. h->reply_pool, h->reply_pool_dhandle);
  3500. kfree(h->cmd_pool_bits);
  3501. kfree(h->blockFetchTable);
  3502. kfree(h->hba_inquiry_data);
  3503. /*
  3504. * Deliberately omit pci_disable_device(): it does something nasty to
  3505. * Smart Array controllers that pci_enable_device does not undo
  3506. */
  3507. pci_release_regions(pdev);
  3508. pci_set_drvdata(pdev, NULL);
  3509. kfree(h);
  3510. }
  3511. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3512. __attribute__((unused)) pm_message_t state)
  3513. {
  3514. return -ENOSYS;
  3515. }
  3516. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3517. {
  3518. return -ENOSYS;
  3519. }
  3520. static struct pci_driver hpsa_pci_driver = {
  3521. .name = "hpsa",
  3522. .probe = hpsa_init_one,
  3523. .remove = __devexit_p(hpsa_remove_one),
  3524. .id_table = hpsa_pci_device_id, /* id_table */
  3525. .shutdown = hpsa_shutdown,
  3526. .suspend = hpsa_suspend,
  3527. .resume = hpsa_resume,
  3528. };
  3529. /* Fill in bucket_map[], given nsgs (the max number of
  3530. * scatter gather elements supported) and bucket[],
  3531. * which is an array of 8 integers. The bucket[] array
  3532. * contains 8 different DMA transfer sizes (in 16
  3533. * byte increments) which the controller uses to fetch
  3534. * commands. This function fills in bucket_map[], which
  3535. * maps a given number of scatter gather elements to one of
  3536. * the 8 DMA transfer sizes. The point of it is to allow the
  3537. * controller to only do as much DMA as needed to fetch the
  3538. * command, with the DMA transfer size encoded in the lower
  3539. * bits of the command address.
  3540. */
  3541. static void calc_bucket_map(int bucket[], int num_buckets,
  3542. int nsgs, int *bucket_map)
  3543. {
  3544. int i, j, b, size;
  3545. /* even a command with 0 SGs requires 4 blocks */
  3546. #define MINIMUM_TRANSFER_BLOCKS 4
  3547. #define NUM_BUCKETS 8
  3548. /* Note, bucket_map must have nsgs+1 entries. */
  3549. for (i = 0; i <= nsgs; i++) {
  3550. /* Compute size of a command with i SG entries */
  3551. size = i + MINIMUM_TRANSFER_BLOCKS;
  3552. b = num_buckets; /* Assume the biggest bucket */
  3553. /* Find the bucket that is just big enough */
  3554. for (j = 0; j < 8; j++) {
  3555. if (bucket[j] >= size) {
  3556. b = j;
  3557. break;
  3558. }
  3559. }
  3560. /* for a command with i SG entries, use bucket b. */
  3561. bucket_map[i] = b;
  3562. }
  3563. }
  3564. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3565. {
  3566. int i;
  3567. unsigned long register_value;
  3568. /* This is a bit complicated. There are 8 registers on
  3569. * the controller which we write to to tell it 8 different
  3570. * sizes of commands which there may be. It's a way of
  3571. * reducing the DMA done to fetch each command. Encoded into
  3572. * each command's tag are 3 bits which communicate to the controller
  3573. * which of the eight sizes that command fits within. The size of
  3574. * each command depends on how many scatter gather entries there are.
  3575. * Each SG entry requires 16 bytes. The eight registers are programmed
  3576. * with the number of 16-byte blocks a command of that size requires.
  3577. * The smallest command possible requires 5 such 16 byte blocks.
  3578. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3579. * blocks. Note, this only extends to the SG entries contained
  3580. * within the command block, and does not extend to chained blocks
  3581. * of SG elements. bft[] contains the eight values we write to
  3582. * the registers. They are not evenly distributed, but have more
  3583. * sizes for small commands, and fewer sizes for larger commands.
  3584. */
  3585. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3586. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3587. /* 5 = 1 s/g entry or 4k
  3588. * 6 = 2 s/g entry or 8k
  3589. * 8 = 4 s/g entry or 16k
  3590. * 10 = 6 s/g entry or 24k
  3591. */
  3592. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3593. /* Controller spec: zero out this buffer. */
  3594. memset(h->reply_pool, 0, h->reply_pool_size);
  3595. h->reply_pool_head = h->reply_pool;
  3596. bft[7] = h->max_sg_entries + 4;
  3597. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3598. for (i = 0; i < 8; i++)
  3599. writel(bft[i], &h->transtable->BlockFetch[i]);
  3600. /* size of controller ring buffer */
  3601. writel(h->max_commands, &h->transtable->RepQSize);
  3602. writel(1, &h->transtable->RepQCount);
  3603. writel(0, &h->transtable->RepQCtrAddrLow32);
  3604. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3605. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3606. writel(0, &h->transtable->RepQAddr0High32);
  3607. writel(CFGTBL_Trans_Performant,
  3608. &(h->cfgtable->HostWrite.TransportRequest));
  3609. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3610. hpsa_wait_for_mode_change_ack(h);
  3611. register_value = readl(&(h->cfgtable->TransportActive));
  3612. if (!(register_value & CFGTBL_Trans_Performant)) {
  3613. dev_warn(&h->pdev->dev, "unable to get board into"
  3614. " performant mode\n");
  3615. return;
  3616. }
  3617. }
  3618. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3619. {
  3620. u32 trans_support;
  3621. trans_support = readl(&(h->cfgtable->TransportSupport));
  3622. if (!(trans_support & PERFORMANT_MODE))
  3623. return;
  3624. hpsa_get_max_perf_mode_cmds(h);
  3625. h->max_sg_entries = 32;
  3626. /* Performant mode ring buffer and supporting data structures */
  3627. h->reply_pool_size = h->max_commands * sizeof(u64);
  3628. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3629. &(h->reply_pool_dhandle));
  3630. /* Need a block fetch table for performant mode */
  3631. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3632. sizeof(u32)), GFP_KERNEL);
  3633. if ((h->reply_pool == NULL)
  3634. || (h->blockFetchTable == NULL))
  3635. goto clean_up;
  3636. hpsa_enter_performant_mode(h);
  3637. /* Change the access methods to the performant access methods */
  3638. h->access = SA5_performant_access;
  3639. h->transMethod = CFGTBL_Trans_Performant;
  3640. return;
  3641. clean_up:
  3642. if (h->reply_pool)
  3643. pci_free_consistent(h->pdev, h->reply_pool_size,
  3644. h->reply_pool, h->reply_pool_dhandle);
  3645. kfree(h->blockFetchTable);
  3646. }
  3647. /*
  3648. * This is it. Register the PCI driver information for the cards we control
  3649. * the OS will call our registered routines when it finds one of our cards.
  3650. */
  3651. static int __init hpsa_init(void)
  3652. {
  3653. return pci_register_driver(&hpsa_pci_driver);
  3654. }
  3655. static void __exit hpsa_cleanup(void)
  3656. {
  3657. pci_unregister_driver(&hpsa_pci_driver);
  3658. }
  3659. module_init(hpsa_init);
  3660. module_exit(hpsa_cleanup);