board-trimslice.c 2.6 KB

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  1. /*
  2. * arch/arm/mach-tegra/board-trimslice.c
  3. *
  4. * Copyright (C) 2011 CompuLab, Ltd.
  5. * Author: Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * Based on board-harmony.c
  8. * Copyright (C) 2010 Google, Inc.
  9. *
  10. * This software is licensed under the terms of the GNU General Public
  11. * License version 2, as published by the Free Software Foundation, and
  12. * may be copied, distributed, and modified under those terms.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/serial_8250.h>
  24. #include <linux/io.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/setup.h>
  28. #include <mach/iomap.h>
  29. #include "board.h"
  30. #include "clock.h"
  31. #include "board-trimslice.h"
  32. static struct plat_serial8250_port debug_uart_platform_data[] = {
  33. {
  34. .membase = IO_ADDRESS(TEGRA_UARTA_BASE),
  35. .mapbase = TEGRA_UARTA_BASE,
  36. .irq = INT_UARTA,
  37. .flags = UPF_BOOT_AUTOCONF,
  38. .iotype = UPIO_MEM,
  39. .regshift = 2,
  40. .uartclk = 216000000,
  41. }, {
  42. .flags = 0
  43. }
  44. };
  45. static struct platform_device debug_uart = {
  46. .name = "serial8250",
  47. .id = PLAT8250_DEV_PLATFORM,
  48. .dev = {
  49. .platform_data = debug_uart_platform_data,
  50. },
  51. };
  52. static struct platform_device *trimslice_devices[] __initdata = {
  53. &debug_uart,
  54. };
  55. static void __init tegra_trimslice_fixup(struct machine_desc *desc,
  56. struct tag *tags, char **cmdline, struct meminfo *mi)
  57. {
  58. mi->nr_banks = 2;
  59. mi->bank[0].start = PHYS_OFFSET;
  60. mi->bank[0].size = 448 * SZ_1M;
  61. mi->bank[1].start = SZ_512M;
  62. mi->bank[1].size = SZ_512M;
  63. }
  64. static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
  65. /* name parent rate enabled */
  66. { "uarta", "pll_p", 216000000, true },
  67. { NULL, NULL, 0, 0},
  68. };
  69. static int __init tegra_trimslice_pci_init(void)
  70. {
  71. if (!machine_is_trimslice())
  72. return 0;
  73. return tegra_pcie_init(true, true);
  74. }
  75. subsys_initcall(tegra_trimslice_pci_init);
  76. static void __init tegra_trimslice_init(void)
  77. {
  78. tegra_clk_init_from_table(trimslice_clk_init_table);
  79. trimslice_pinmux_init();
  80. platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
  81. }
  82. MACHINE_START(TRIMSLICE, "trimslice")
  83. .boot_params = 0x00000100,
  84. .fixup = tegra_trimslice_fixup,
  85. .map_io = tegra_map_common_io,
  86. .init_early = tegra_init_early,
  87. .init_irq = tegra_init_irq,
  88. .timer = &tegra_timer,
  89. .init_machine = tegra_trimslice_init,
  90. MACHINE_END