mpc5200_psc_ac97.c 8.3 KB

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  1. /*
  2. * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
  3. *
  4. * Copyright (C) 2009 Jon Smirl, Digispeaker
  5. * Author: Jon Smirl <jonsmirl@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_platform.h>
  14. #include <sound/pcm.h>
  15. #include <sound/pcm_params.h>
  16. #include <sound/soc.h>
  17. #include <asm/time.h>
  18. #include <asm/delay.h>
  19. #include <asm/mpc52xx_psc.h>
  20. #include "mpc5200_dma.h"
  21. #include "mpc5200_psc_ac97.h"
  22. #define DRV_NAME "mpc5200-psc-ac97"
  23. /* ALSA only supports a single AC97 device so static is recommend here */
  24. static struct psc_dma *psc_dma;
  25. static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  26. {
  27. int status;
  28. unsigned int val;
  29. /* Wait for command send status zero = ready */
  30. status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  31. MPC52xx_PSC_SR_CMDSEND), 100, 0);
  32. if (status == 0) {
  33. pr_err("timeout on ac97 bus (rdy)\n");
  34. return -ENODEV;
  35. }
  36. /* Send the read */
  37. out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
  38. /* Wait for the answer */
  39. status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
  40. MPC52xx_PSC_SR_DATA_VAL), 100, 0);
  41. if (status == 0) {
  42. pr_err("timeout on ac97 read (val) %x\n",
  43. in_be16(&psc_dma->psc_regs->sr_csr.status));
  44. return -ENODEV;
  45. }
  46. /* Get the data */
  47. val = in_be32(&psc_dma->psc_regs->ac97_data);
  48. if (((val >> 24) & 0x7f) != reg) {
  49. pr_err("reg echo error on ac97 read\n");
  50. return -ENODEV;
  51. }
  52. val = (val >> 8) & 0xffff;
  53. return (unsigned short) val;
  54. }
  55. static void psc_ac97_write(struct snd_ac97 *ac97,
  56. unsigned short reg, unsigned short val)
  57. {
  58. int status;
  59. /* Wait for command status zero = ready */
  60. status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  61. MPC52xx_PSC_SR_CMDSEND), 100, 0);
  62. if (status == 0) {
  63. pr_err("timeout on ac97 bus (write)\n");
  64. return;
  65. }
  66. /* Write data */
  67. out_be32(&psc_dma->psc_regs->ac97_cmd,
  68. ((reg & 0x7f) << 24) | (val << 8));
  69. }
  70. static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
  71. {
  72. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  73. out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
  74. udelay(3);
  75. out_be32(&regs->sicr, psc_dma->sicr);
  76. }
  77. static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
  78. {
  79. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  80. /* Do a cold reset */
  81. out_8(&regs->op1, MPC52xx_PSC_OP_RES);
  82. udelay(10);
  83. out_8(&regs->op0, MPC52xx_PSC_OP_RES);
  84. udelay(50);
  85. psc_ac97_warm_reset(ac97);
  86. }
  87. struct snd_ac97_bus_ops soc_ac97_ops = {
  88. .read = psc_ac97_read,
  89. .write = psc_ac97_write,
  90. .reset = psc_ac97_cold_reset,
  91. .warm_reset = psc_ac97_warm_reset,
  92. };
  93. EXPORT_SYMBOL_GPL(soc_ac97_ops);
  94. static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
  95. struct snd_pcm_hw_params *params,
  96. struct snd_soc_dai *cpu_dai)
  97. {
  98. struct psc_dma *psc_dma = cpu_dai->private_data;
  99. dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
  100. " periods=%i buffer_size=%i buffer_bytes=%i channels=%i"
  101. " rate=%i format=%i\n",
  102. __func__, substream, params_period_size(params),
  103. params_period_bytes(params), params_periods(params),
  104. params_buffer_size(params), params_buffer_bytes(params),
  105. params_channels(params), params_rate(params),
  106. params_format(params));
  107. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
  108. if (params_channels(params) == 1)
  109. psc_dma->slots |= 0x00000100;
  110. else
  111. psc_dma->slots |= 0x00000300;
  112. } else {
  113. if (params_channels(params) == 1)
  114. psc_dma->slots |= 0x01000000;
  115. else
  116. psc_dma->slots |= 0x03000000;
  117. }
  118. out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
  119. return 0;
  120. }
  121. static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
  122. struct snd_pcm_hw_params *params,
  123. struct snd_soc_dai *cpu_dai)
  124. {
  125. struct psc_dma *psc_dma = cpu_dai->private_data;
  126. if (params_channels(params) == 1)
  127. out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
  128. else
  129. out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
  130. return 0;
  131. }
  132. static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
  133. struct snd_soc_dai *dai)
  134. {
  135. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  136. struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
  137. switch (cmd) {
  138. case SNDRV_PCM_TRIGGER_STOP:
  139. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  140. psc_dma->slots &= 0xFFFF0000;
  141. else
  142. psc_dma->slots &= 0x0000FFFF;
  143. out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
  144. break;
  145. }
  146. return 0;
  147. }
  148. static int psc_ac97_probe(struct platform_device *pdev,
  149. struct snd_soc_dai *cpu_dai)
  150. {
  151. struct psc_dma *psc_dma = cpu_dai->private_data;
  152. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  153. /* Go */
  154. out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
  155. return 0;
  156. }
  157. /* ---------------------------------------------------------------------
  158. * ALSA SoC Bindings
  159. *
  160. * - Digital Audio Interface (DAI) template
  161. * - create/destroy dai hooks
  162. */
  163. /**
  164. * psc_ac97_dai_template: template CPU Digital Audio Interface
  165. */
  166. static struct snd_soc_dai_ops psc_ac97_analog_ops = {
  167. .hw_params = psc_ac97_hw_analog_params,
  168. .trigger = psc_ac97_trigger,
  169. };
  170. static struct snd_soc_dai_ops psc_ac97_digital_ops = {
  171. .hw_params = psc_ac97_hw_digital_params,
  172. };
  173. struct snd_soc_dai psc_ac97_dai[] = {
  174. {
  175. .name = "AC97",
  176. .ac97_control = 1,
  177. .probe = psc_ac97_probe,
  178. .playback = {
  179. .channels_min = 1,
  180. .channels_max = 6,
  181. .rates = SNDRV_PCM_RATE_8000_48000,
  182. .formats = SNDRV_PCM_FMTBIT_S32_BE,
  183. },
  184. .capture = {
  185. .channels_min = 1,
  186. .channels_max = 2,
  187. .rates = SNDRV_PCM_RATE_8000_48000,
  188. .formats = SNDRV_PCM_FMTBIT_S32_BE,
  189. },
  190. .ops = &psc_ac97_analog_ops,
  191. },
  192. {
  193. .name = "SPDIF",
  194. .ac97_control = 1,
  195. .playback = {
  196. .channels_min = 1,
  197. .channels_max = 2,
  198. .rates = SNDRV_PCM_RATE_32000 | \
  199. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  200. .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
  201. },
  202. .ops = &psc_ac97_digital_ops,
  203. } };
  204. EXPORT_SYMBOL_GPL(psc_ac97_dai);
  205. /* ---------------------------------------------------------------------
  206. * OF platform bus binding code:
  207. * - Probe/remove operations
  208. * - OF device match table
  209. */
  210. static int __devinit psc_ac97_of_probe(struct of_device *op,
  211. const struct of_device_id *match)
  212. {
  213. int rc, i;
  214. struct snd_ac97 ac97;
  215. struct mpc52xx_psc __iomem *regs;
  216. rc = mpc5200_audio_dma_create(op);
  217. if (rc != 0)
  218. return rc;
  219. for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
  220. psc_ac97_dai[i].dev = &op->dev;
  221. rc = snd_soc_register_dais(psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
  222. if (rc != 0) {
  223. dev_err(&op->dev, "Failed to register DAI\n");
  224. return rc;
  225. }
  226. psc_dma = dev_get_drvdata(&op->dev);
  227. regs = psc_dma->psc_regs;
  228. ac97.private_data = psc_dma;
  229. for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
  230. psc_ac97_dai[i].private_data = psc_dma;
  231. psc_dma->imr = 0;
  232. out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
  233. /* Configure the serial interface mode to AC97 */
  234. psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
  235. out_be32(&regs->sicr, psc_dma->sicr);
  236. /* No slots active */
  237. out_be32(&regs->ac97_slots, 0x00000000);
  238. return 0;
  239. }
  240. static int __devexit psc_ac97_of_remove(struct of_device *op)
  241. {
  242. return mpc5200_audio_dma_destroy(op);
  243. }
  244. /* Match table for of_platform binding */
  245. static struct of_device_id psc_ac97_match[] __devinitdata = {
  246. { .compatible = "fsl,mpc5200-psc-ac97", },
  247. { .compatible = "fsl,mpc5200b-psc-ac97", },
  248. {}
  249. };
  250. MODULE_DEVICE_TABLE(of, psc_ac97_match);
  251. static struct of_platform_driver psc_ac97_driver = {
  252. .match_table = psc_ac97_match,
  253. .probe = psc_ac97_of_probe,
  254. .remove = __devexit_p(psc_ac97_of_remove),
  255. .driver = {
  256. .name = "mpc5200-psc-ac97",
  257. .owner = THIS_MODULE,
  258. },
  259. };
  260. /* ---------------------------------------------------------------------
  261. * Module setup and teardown; simply register the of_platform driver
  262. * for the PSC in AC97 mode.
  263. */
  264. static int __init psc_ac97_init(void)
  265. {
  266. return of_register_platform_driver(&psc_ac97_driver);
  267. }
  268. module_init(psc_ac97_init);
  269. static void __exit psc_ac97_exit(void)
  270. {
  271. of_unregister_platform_driver(&psc_ac97_driver);
  272. }
  273. module_exit(psc_ac97_exit);
  274. MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
  275. MODULE_DESCRIPTION("mpc5200 AC97 module");
  276. MODULE_LICENSE("GPL");