wm8988.c 29 KB

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  1. /*
  2. * wm8988.c -- WM8988 ALSA SoC audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. * Copyright 2005 Openedhand Ltd.
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/platform_device.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/tlv.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include "wm8988.h"
  29. /*
  30. * wm8988 register cache
  31. * We can't read the WM8988 register space when we
  32. * are using 2 wire for device control, so we cache them instead.
  33. */
  34. static const u16 wm8988_reg[] = {
  35. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  36. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  37. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  38. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  39. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  40. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  41. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  42. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  43. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  44. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  45. 0x0079, 0x0079, 0x0079, /* 40 */
  46. };
  47. /* codec private data */
  48. struct wm8988_priv {
  49. unsigned int sysclk;
  50. struct snd_soc_codec codec;
  51. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  52. u16 reg_cache[WM8988_NUM_REG];
  53. };
  54. /*
  55. * read wm8988 register cache
  56. */
  57. static inline unsigned int wm8988_read_reg_cache(struct snd_soc_codec *codec,
  58. unsigned int reg)
  59. {
  60. u16 *cache = codec->reg_cache;
  61. if (reg > WM8988_NUM_REG)
  62. return -1;
  63. return cache[reg];
  64. }
  65. /*
  66. * write wm8988 register cache
  67. */
  68. static inline void wm8988_write_reg_cache(struct snd_soc_codec *codec,
  69. unsigned int reg, unsigned int value)
  70. {
  71. u16 *cache = codec->reg_cache;
  72. if (reg > WM8988_NUM_REG)
  73. return;
  74. cache[reg] = value;
  75. }
  76. static int wm8988_write(struct snd_soc_codec *codec, unsigned int reg,
  77. unsigned int value)
  78. {
  79. u8 data[2];
  80. /* data is
  81. * D15..D9 WM8753 register offset
  82. * D8...D0 register data
  83. */
  84. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  85. data[1] = value & 0x00ff;
  86. wm8988_write_reg_cache(codec, reg, value);
  87. if (codec->hw_write(codec->control_data, data, 2) == 2)
  88. return 0;
  89. else
  90. return -EIO;
  91. }
  92. #define wm8988_reset(c) wm8988_write(c, WM8988_RESET, 0)
  93. /*
  94. * WM8988 Controls
  95. */
  96. static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"};
  97. static const struct soc_enum bass_boost =
  98. SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt);
  99. static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  100. static const struct soc_enum bass_filter =
  101. SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt);
  102. static const char *treble_txt[] = {"8kHz", "4kHz"};
  103. static const struct soc_enum treble =
  104. SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt);
  105. static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"};
  106. static const struct soc_enum stereo_3d_lc =
  107. SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt);
  108. static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
  109. static const struct soc_enum stereo_3d_uc =
  110. SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt);
  111. static const char *stereo_3d_func_txt[] = {"Capture", "Playback"};
  112. static const struct soc_enum stereo_3d_func =
  113. SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt);
  114. static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
  115. static const struct soc_enum alc_func =
  116. SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt);
  117. static const char *ng_type_txt[] = {"Constant PGA Gain",
  118. "Mute ADC Output"};
  119. static const struct soc_enum ng_type =
  120. SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt);
  121. static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  122. static const struct soc_enum deemph =
  123. SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt);
  124. static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert",
  125. "L + R Invert"};
  126. static const struct soc_enum adcpol =
  127. SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt);
  128. static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
  129. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  130. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  131. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  132. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
  133. static const struct snd_kcontrol_new wm8988_snd_controls[] = {
  134. SOC_ENUM("Bass Boost", bass_boost),
  135. SOC_ENUM("Bass Filter", bass_filter),
  136. SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1),
  137. SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0),
  138. SOC_ENUM("Treble Cut-off", treble),
  139. SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0),
  140. SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0),
  141. SOC_ENUM("3D Lower Cut-off", stereo_3d_lc),
  142. SOC_ENUM("3D Upper Cut-off", stereo_3d_uc),
  143. SOC_ENUM("3D Mode", stereo_3d_func),
  144. SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0),
  145. SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0),
  146. SOC_ENUM("ALC Capture Function", alc_func),
  147. SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0),
  148. SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0),
  149. SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0),
  150. SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0),
  151. SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0),
  152. SOC_ENUM("ALC Capture NG Type", ng_type),
  153. SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0),
  154. SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0),
  155. SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC,
  156. 0, 255, 0, adc_tlv),
  157. SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL,
  158. 0, 63, 0, pga_tlv),
  159. SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0),
  160. SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1),
  161. SOC_ENUM("Playback De-emphasis", deemph),
  162. SOC_ENUM("Capture Polarity", adcpol),
  163. SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0),
  164. SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0),
  165. SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv),
  166. SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1,
  167. bypass_tlv),
  168. SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1,
  169. bypass_tlv),
  170. SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1,
  171. bypass_tlv),
  172. SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1,
  173. bypass_tlv),
  174. SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V,
  175. WM8988_ROUT1V, 7, 1, 0),
  176. SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V,
  177. 0, 127, 0, out_tlv),
  178. SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V,
  179. WM8988_ROUT2V, 7, 1, 0),
  180. SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V,
  181. 0, 127, 0, out_tlv),
  182. };
  183. /*
  184. * DAPM Controls
  185. */
  186. static int wm8988_lrc_control(struct snd_soc_dapm_widget *w,
  187. struct snd_kcontrol *kcontrol, int event)
  188. {
  189. struct snd_soc_codec *codec = w->codec;
  190. u16 adctl2 = wm8988_read_reg_cache(codec, WM8988_ADCTL2);
  191. /* Use the DAC to gate LRC if active, otherwise use ADC */
  192. if (wm8988_read_reg_cache(codec, WM8988_PWR2) & 0x180)
  193. adctl2 &= ~0x4;
  194. else
  195. adctl2 |= 0x4;
  196. return wm8988_write(codec, WM8988_ADCTL2, adctl2);
  197. }
  198. static const char *wm8988_line_texts[] = {
  199. "Line 1", "Line 2", "PGA", "Differential"};
  200. static const unsigned int wm8988_line_values[] = {
  201. 0, 1, 3, 4};
  202. static const struct soc_enum wm8988_lline_enum =
  203. SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7,
  204. ARRAY_SIZE(wm8988_line_texts),
  205. wm8988_line_texts,
  206. wm8988_line_values);
  207. static const struct snd_kcontrol_new wm8988_left_line_controls =
  208. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  209. static const struct soc_enum wm8988_rline_enum =
  210. SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7,
  211. ARRAY_SIZE(wm8988_line_texts),
  212. wm8988_line_texts,
  213. wm8988_line_values);
  214. static const struct snd_kcontrol_new wm8988_right_line_controls =
  215. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  216. /* Left Mixer */
  217. static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = {
  218. SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0),
  219. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0),
  220. SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0),
  221. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0),
  222. };
  223. /* Right Mixer */
  224. static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = {
  225. SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0),
  226. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0),
  227. SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0),
  228. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0),
  229. };
  230. static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"};
  231. static const unsigned int wm8988_pga_val[] = { 0, 1, 3 };
  232. /* Left PGA Mux */
  233. static const struct soc_enum wm8988_lpga_enum =
  234. SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3,
  235. ARRAY_SIZE(wm8988_pga_sel),
  236. wm8988_pga_sel,
  237. wm8988_pga_val);
  238. static const struct snd_kcontrol_new wm8988_left_pga_controls =
  239. SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum);
  240. /* Right PGA Mux */
  241. static const struct soc_enum wm8988_rpga_enum =
  242. SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3,
  243. ARRAY_SIZE(wm8988_pga_sel),
  244. wm8988_pga_sel,
  245. wm8988_pga_val);
  246. static const struct snd_kcontrol_new wm8988_right_pga_controls =
  247. SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum);
  248. /* Differential Mux */
  249. static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"};
  250. static const struct soc_enum diffmux =
  251. SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel);
  252. static const struct snd_kcontrol_new wm8988_diffmux_controls =
  253. SOC_DAPM_ENUM("Route", diffmux);
  254. /* Mono ADC Mux */
  255. static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)",
  256. "Mono (Right)", "Digital Mono"};
  257. static const struct soc_enum monomux =
  258. SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux);
  259. static const struct snd_kcontrol_new wm8988_monomux_controls =
  260. SOC_DAPM_ENUM("Route", monomux);
  261. static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = {
  262. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8988_PWR1, 1, 0),
  263. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  264. &wm8988_diffmux_controls),
  265. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  266. &wm8988_monomux_controls),
  267. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  268. &wm8988_monomux_controls),
  269. SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0,
  270. &wm8988_left_pga_controls),
  271. SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0,
  272. &wm8988_right_pga_controls),
  273. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  274. &wm8988_left_line_controls),
  275. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  276. &wm8988_right_line_controls),
  277. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0),
  278. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0),
  279. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0),
  280. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0),
  281. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  282. &wm8988_left_mixer_controls[0],
  283. ARRAY_SIZE(wm8988_left_mixer_controls)),
  284. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  285. &wm8988_right_mixer_controls[0],
  286. ARRAY_SIZE(wm8988_right_mixer_controls)),
  287. SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0),
  288. SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0),
  289. SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0),
  290. SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0),
  291. SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control),
  292. SND_SOC_DAPM_OUTPUT("LOUT1"),
  293. SND_SOC_DAPM_OUTPUT("ROUT1"),
  294. SND_SOC_DAPM_OUTPUT("LOUT2"),
  295. SND_SOC_DAPM_OUTPUT("ROUT2"),
  296. SND_SOC_DAPM_OUTPUT("VREF"),
  297. SND_SOC_DAPM_INPUT("LINPUT1"),
  298. SND_SOC_DAPM_INPUT("LINPUT2"),
  299. SND_SOC_DAPM_INPUT("RINPUT1"),
  300. SND_SOC_DAPM_INPUT("RINPUT2"),
  301. };
  302. static const struct snd_soc_dapm_route audio_map[] = {
  303. { "Left Line Mux", "Line 1", "LINPUT1" },
  304. { "Left Line Mux", "Line 2", "LINPUT2" },
  305. { "Left Line Mux", "PGA", "Left PGA Mux" },
  306. { "Left Line Mux", "Differential", "Differential Mux" },
  307. { "Right Line Mux", "Line 1", "RINPUT1" },
  308. { "Right Line Mux", "Line 2", "RINPUT2" },
  309. { "Right Line Mux", "PGA", "Right PGA Mux" },
  310. { "Right Line Mux", "Differential", "Differential Mux" },
  311. { "Left PGA Mux", "Line 1", "LINPUT1" },
  312. { "Left PGA Mux", "Line 2", "LINPUT2" },
  313. { "Left PGA Mux", "Differential", "Differential Mux" },
  314. { "Right PGA Mux", "Line 1", "RINPUT1" },
  315. { "Right PGA Mux", "Line 2", "RINPUT2" },
  316. { "Right PGA Mux", "Differential", "Differential Mux" },
  317. { "Differential Mux", "Line 1", "LINPUT1" },
  318. { "Differential Mux", "Line 1", "RINPUT1" },
  319. { "Differential Mux", "Line 2", "LINPUT2" },
  320. { "Differential Mux", "Line 2", "RINPUT2" },
  321. { "Left ADC Mux", "Stereo", "Left PGA Mux" },
  322. { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
  323. { "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
  324. { "Right ADC Mux", "Stereo", "Right PGA Mux" },
  325. { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
  326. { "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
  327. { "Left ADC", NULL, "Left ADC Mux" },
  328. { "Right ADC", NULL, "Right ADC Mux" },
  329. { "Left Line Mux", "Line 1", "LINPUT1" },
  330. { "Left Line Mux", "Line 2", "LINPUT2" },
  331. { "Left Line Mux", "PGA", "Left PGA Mux" },
  332. { "Left Line Mux", "Differential", "Differential Mux" },
  333. { "Right Line Mux", "Line 1", "RINPUT1" },
  334. { "Right Line Mux", "Line 2", "RINPUT2" },
  335. { "Right Line Mux", "PGA", "Right PGA Mux" },
  336. { "Right Line Mux", "Differential", "Differential Mux" },
  337. { "Left Mixer", "Playback Switch", "Left DAC" },
  338. { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
  339. { "Left Mixer", "Right Playback Switch", "Right DAC" },
  340. { "Left Mixer", "Right Bypass Switch", "Right Line Mux" },
  341. { "Right Mixer", "Left Playback Switch", "Left DAC" },
  342. { "Right Mixer", "Left Bypass Switch", "Left Line Mux" },
  343. { "Right Mixer", "Playback Switch", "Right DAC" },
  344. { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
  345. { "Left Out 1", NULL, "Left Mixer" },
  346. { "LOUT1", NULL, "Left Out 1" },
  347. { "Right Out 1", NULL, "Right Mixer" },
  348. { "ROUT1", NULL, "Right Out 1" },
  349. { "Left Out 2", NULL, "Left Mixer" },
  350. { "LOUT2", NULL, "Left Out 2" },
  351. { "Right Out 2", NULL, "Right Mixer" },
  352. { "ROUT2", NULL, "Right Out 2" },
  353. };
  354. struct _coeff_div {
  355. u32 mclk;
  356. u32 rate;
  357. u16 fs;
  358. u8 sr:5;
  359. u8 usb:1;
  360. };
  361. /* codec hifi mclk clock divider coefficients */
  362. static const struct _coeff_div coeff_div[] = {
  363. /* 8k */
  364. {12288000, 8000, 1536, 0x6, 0x0},
  365. {11289600, 8000, 1408, 0x16, 0x0},
  366. {18432000, 8000, 2304, 0x7, 0x0},
  367. {16934400, 8000, 2112, 0x17, 0x0},
  368. {12000000, 8000, 1500, 0x6, 0x1},
  369. /* 11.025k */
  370. {11289600, 11025, 1024, 0x18, 0x0},
  371. {16934400, 11025, 1536, 0x19, 0x0},
  372. {12000000, 11025, 1088, 0x19, 0x1},
  373. /* 16k */
  374. {12288000, 16000, 768, 0xa, 0x0},
  375. {18432000, 16000, 1152, 0xb, 0x0},
  376. {12000000, 16000, 750, 0xa, 0x1},
  377. /* 22.05k */
  378. {11289600, 22050, 512, 0x1a, 0x0},
  379. {16934400, 22050, 768, 0x1b, 0x0},
  380. {12000000, 22050, 544, 0x1b, 0x1},
  381. /* 32k */
  382. {12288000, 32000, 384, 0xc, 0x0},
  383. {18432000, 32000, 576, 0xd, 0x0},
  384. {12000000, 32000, 375, 0xa, 0x1},
  385. /* 44.1k */
  386. {11289600, 44100, 256, 0x10, 0x0},
  387. {16934400, 44100, 384, 0x11, 0x0},
  388. {12000000, 44100, 272, 0x11, 0x1},
  389. /* 48k */
  390. {12288000, 48000, 256, 0x0, 0x0},
  391. {18432000, 48000, 384, 0x1, 0x0},
  392. {12000000, 48000, 250, 0x0, 0x1},
  393. /* 88.2k */
  394. {11289600, 88200, 128, 0x1e, 0x0},
  395. {16934400, 88200, 192, 0x1f, 0x0},
  396. {12000000, 88200, 136, 0x1f, 0x1},
  397. /* 96k */
  398. {12288000, 96000, 128, 0xe, 0x0},
  399. {18432000, 96000, 192, 0xf, 0x0},
  400. {12000000, 96000, 125, 0xe, 0x1},
  401. };
  402. static inline int get_coeff(int mclk, int rate)
  403. {
  404. int i;
  405. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  406. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  407. return i;
  408. }
  409. return -EINVAL;
  410. }
  411. /* The set of rates we can generate from the above for each SYSCLK */
  412. static unsigned int rates_12288[] = {
  413. 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
  414. };
  415. static struct snd_pcm_hw_constraint_list constraints_12288 = {
  416. .count = ARRAY_SIZE(rates_12288),
  417. .list = rates_12288,
  418. };
  419. static unsigned int rates_112896[] = {
  420. 8000, 11025, 22050, 44100,
  421. };
  422. static struct snd_pcm_hw_constraint_list constraints_112896 = {
  423. .count = ARRAY_SIZE(rates_112896),
  424. .list = rates_112896,
  425. };
  426. static unsigned int rates_12[] = {
  427. 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
  428. 48000, 88235, 96000,
  429. };
  430. static struct snd_pcm_hw_constraint_list constraints_12 = {
  431. .count = ARRAY_SIZE(rates_12),
  432. .list = rates_12,
  433. };
  434. /*
  435. * Note that this should be called from init rather than from hw_params.
  436. */
  437. static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  438. int clk_id, unsigned int freq, int dir)
  439. {
  440. struct snd_soc_codec *codec = codec_dai->codec;
  441. struct wm8988_priv *wm8988 = codec->private_data;
  442. switch (freq) {
  443. case 11289600:
  444. case 18432000:
  445. case 22579200:
  446. case 36864000:
  447. wm8988->sysclk_constraints = &constraints_112896;
  448. wm8988->sysclk = freq;
  449. return 0;
  450. case 12288000:
  451. case 16934400:
  452. case 24576000:
  453. case 33868800:
  454. wm8988->sysclk_constraints = &constraints_12288;
  455. wm8988->sysclk = freq;
  456. return 0;
  457. case 12000000:
  458. case 24000000:
  459. wm8988->sysclk_constraints = &constraints_12;
  460. wm8988->sysclk = freq;
  461. return 0;
  462. }
  463. return -EINVAL;
  464. }
  465. static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
  466. unsigned int fmt)
  467. {
  468. struct snd_soc_codec *codec = codec_dai->codec;
  469. u16 iface = 0;
  470. /* set master/slave audio interface */
  471. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  472. case SND_SOC_DAIFMT_CBM_CFM:
  473. iface = 0x0040;
  474. break;
  475. case SND_SOC_DAIFMT_CBS_CFS:
  476. break;
  477. default:
  478. return -EINVAL;
  479. }
  480. /* interface format */
  481. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  482. case SND_SOC_DAIFMT_I2S:
  483. iface |= 0x0002;
  484. break;
  485. case SND_SOC_DAIFMT_RIGHT_J:
  486. break;
  487. case SND_SOC_DAIFMT_LEFT_J:
  488. iface |= 0x0001;
  489. break;
  490. case SND_SOC_DAIFMT_DSP_A:
  491. iface |= 0x0003;
  492. break;
  493. case SND_SOC_DAIFMT_DSP_B:
  494. iface |= 0x0013;
  495. break;
  496. default:
  497. return -EINVAL;
  498. }
  499. /* clock inversion */
  500. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  501. case SND_SOC_DAIFMT_NB_NF:
  502. break;
  503. case SND_SOC_DAIFMT_IB_IF:
  504. iface |= 0x0090;
  505. break;
  506. case SND_SOC_DAIFMT_IB_NF:
  507. iface |= 0x0080;
  508. break;
  509. case SND_SOC_DAIFMT_NB_IF:
  510. iface |= 0x0010;
  511. break;
  512. default:
  513. return -EINVAL;
  514. }
  515. wm8988_write(codec, WM8988_IFACE, iface);
  516. return 0;
  517. }
  518. static int wm8988_pcm_startup(struct snd_pcm_substream *substream,
  519. struct snd_soc_dai *dai)
  520. {
  521. struct snd_soc_codec *codec = dai->codec;
  522. struct wm8988_priv *wm8988 = codec->private_data;
  523. /* The set of sample rates that can be supported depends on the
  524. * MCLK supplied to the CODEC - enforce this.
  525. */
  526. if (!wm8988->sysclk) {
  527. dev_err(codec->dev,
  528. "No MCLK configured, call set_sysclk() on init\n");
  529. return -EINVAL;
  530. }
  531. snd_pcm_hw_constraint_list(substream->runtime, 0,
  532. SNDRV_PCM_HW_PARAM_RATE,
  533. wm8988->sysclk_constraints);
  534. return 0;
  535. }
  536. static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
  537. struct snd_pcm_hw_params *params,
  538. struct snd_soc_dai *dai)
  539. {
  540. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  541. struct snd_soc_device *socdev = rtd->socdev;
  542. struct snd_soc_codec *codec = socdev->card->codec;
  543. struct wm8988_priv *wm8988 = codec->private_data;
  544. u16 iface = wm8988_read_reg_cache(codec, WM8988_IFACE) & 0x1f3;
  545. u16 srate = wm8988_read_reg_cache(codec, WM8988_SRATE) & 0x180;
  546. int coeff;
  547. coeff = get_coeff(wm8988->sysclk, params_rate(params));
  548. if (coeff < 0) {
  549. coeff = get_coeff(wm8988->sysclk / 2, params_rate(params));
  550. srate |= 0x40;
  551. }
  552. if (coeff < 0) {
  553. dev_err(codec->dev,
  554. "Unable to configure sample rate %dHz with %dHz MCLK\n",
  555. params_rate(params), wm8988->sysclk);
  556. return coeff;
  557. }
  558. /* bit size */
  559. switch (params_format(params)) {
  560. case SNDRV_PCM_FORMAT_S16_LE:
  561. break;
  562. case SNDRV_PCM_FORMAT_S20_3LE:
  563. iface |= 0x0004;
  564. break;
  565. case SNDRV_PCM_FORMAT_S24_LE:
  566. iface |= 0x0008;
  567. break;
  568. case SNDRV_PCM_FORMAT_S32_LE:
  569. iface |= 0x000c;
  570. break;
  571. }
  572. /* set iface & srate */
  573. wm8988_write(codec, WM8988_IFACE, iface);
  574. if (coeff >= 0)
  575. wm8988_write(codec, WM8988_SRATE, srate |
  576. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  577. return 0;
  578. }
  579. static int wm8988_mute(struct snd_soc_dai *dai, int mute)
  580. {
  581. struct snd_soc_codec *codec = dai->codec;
  582. u16 mute_reg = wm8988_read_reg_cache(codec, WM8988_ADCDAC) & 0xfff7;
  583. if (mute)
  584. wm8988_write(codec, WM8988_ADCDAC, mute_reg | 0x8);
  585. else
  586. wm8988_write(codec, WM8988_ADCDAC, mute_reg);
  587. return 0;
  588. }
  589. static int wm8988_set_bias_level(struct snd_soc_codec *codec,
  590. enum snd_soc_bias_level level)
  591. {
  592. u16 pwr_reg = wm8988_read_reg_cache(codec, WM8988_PWR1) & ~0x1c1;
  593. switch (level) {
  594. case SND_SOC_BIAS_ON:
  595. break;
  596. case SND_SOC_BIAS_PREPARE:
  597. /* VREF, VMID=2x50k, digital enabled */
  598. wm8988_write(codec, WM8988_PWR1, pwr_reg | 0x00c0);
  599. break;
  600. case SND_SOC_BIAS_STANDBY:
  601. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  602. /* VREF, VMID=2x5k */
  603. wm8988_write(codec, WM8988_PWR1, pwr_reg | 0x1c1);
  604. /* Charge caps */
  605. msleep(100);
  606. }
  607. /* VREF, VMID=2*500k, digital stopped */
  608. wm8988_write(codec, WM8988_PWR1, pwr_reg | 0x0141);
  609. break;
  610. case SND_SOC_BIAS_OFF:
  611. wm8988_write(codec, WM8988_PWR1, 0x0000);
  612. break;
  613. }
  614. codec->bias_level = level;
  615. return 0;
  616. }
  617. #define WM8988_RATES SNDRV_PCM_RATE_8000_96000
  618. #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  619. SNDRV_PCM_FMTBIT_S24_LE)
  620. static struct snd_soc_dai_ops wm8988_ops = {
  621. .startup = wm8988_pcm_startup,
  622. .hw_params = wm8988_pcm_hw_params,
  623. .set_fmt = wm8988_set_dai_fmt,
  624. .set_sysclk = wm8988_set_dai_sysclk,
  625. .digital_mute = wm8988_mute,
  626. };
  627. struct snd_soc_dai wm8988_dai = {
  628. .name = "WM8988",
  629. .playback = {
  630. .stream_name = "Playback",
  631. .channels_min = 1,
  632. .channels_max = 2,
  633. .rates = WM8988_RATES,
  634. .formats = WM8988_FORMATS,
  635. },
  636. .capture = {
  637. .stream_name = "Capture",
  638. .channels_min = 1,
  639. .channels_max = 2,
  640. .rates = WM8988_RATES,
  641. .formats = WM8988_FORMATS,
  642. },
  643. .ops = &wm8988_ops,
  644. .symmetric_rates = 1,
  645. };
  646. EXPORT_SYMBOL_GPL(wm8988_dai);
  647. static int wm8988_suspend(struct platform_device *pdev, pm_message_t state)
  648. {
  649. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  650. struct snd_soc_codec *codec = socdev->card->codec;
  651. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  652. return 0;
  653. }
  654. static int wm8988_resume(struct platform_device *pdev)
  655. {
  656. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  657. struct snd_soc_codec *codec = socdev->card->codec;
  658. int i;
  659. u8 data[2];
  660. u16 *cache = codec->reg_cache;
  661. /* Sync reg_cache with the hardware */
  662. for (i = 0; i < WM8988_NUM_REG; i++) {
  663. if (i == WM8988_RESET)
  664. continue;
  665. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  666. data[1] = cache[i] & 0x00ff;
  667. codec->hw_write(codec->control_data, data, 2);
  668. }
  669. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  670. return 0;
  671. }
  672. static struct snd_soc_codec *wm8988_codec;
  673. static int wm8988_probe(struct platform_device *pdev)
  674. {
  675. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  676. struct snd_soc_codec *codec;
  677. int ret = 0;
  678. if (wm8988_codec == NULL) {
  679. dev_err(&pdev->dev, "Codec device not registered\n");
  680. return -ENODEV;
  681. }
  682. socdev->card->codec = wm8988_codec;
  683. codec = wm8988_codec;
  684. /* register pcms */
  685. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  686. if (ret < 0) {
  687. dev_err(codec->dev, "failed to create pcms: %d\n", ret);
  688. goto pcm_err;
  689. }
  690. snd_soc_add_controls(codec, wm8988_snd_controls,
  691. ARRAY_SIZE(wm8988_snd_controls));
  692. snd_soc_dapm_new_controls(codec, wm8988_dapm_widgets,
  693. ARRAY_SIZE(wm8988_dapm_widgets));
  694. snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
  695. snd_soc_dapm_new_widgets(codec);
  696. ret = snd_soc_init_card(socdev);
  697. if (ret < 0) {
  698. dev_err(codec->dev, "failed to register card: %d\n", ret);
  699. goto card_err;
  700. }
  701. return ret;
  702. card_err:
  703. snd_soc_free_pcms(socdev);
  704. snd_soc_dapm_free(socdev);
  705. pcm_err:
  706. return ret;
  707. }
  708. static int wm8988_remove(struct platform_device *pdev)
  709. {
  710. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  711. snd_soc_free_pcms(socdev);
  712. snd_soc_dapm_free(socdev);
  713. return 0;
  714. }
  715. struct snd_soc_codec_device soc_codec_dev_wm8988 = {
  716. .probe = wm8988_probe,
  717. .remove = wm8988_remove,
  718. .suspend = wm8988_suspend,
  719. .resume = wm8988_resume,
  720. };
  721. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8988);
  722. static int wm8988_register(struct wm8988_priv *wm8988)
  723. {
  724. struct snd_soc_codec *codec = &wm8988->codec;
  725. int ret;
  726. u16 reg;
  727. if (wm8988_codec) {
  728. dev_err(codec->dev, "Another WM8988 is registered\n");
  729. ret = -EINVAL;
  730. goto err;
  731. }
  732. mutex_init(&codec->mutex);
  733. INIT_LIST_HEAD(&codec->dapm_widgets);
  734. INIT_LIST_HEAD(&codec->dapm_paths);
  735. codec->private_data = wm8988;
  736. codec->name = "WM8988";
  737. codec->owner = THIS_MODULE;
  738. codec->read = wm8988_read_reg_cache;
  739. codec->write = wm8988_write;
  740. codec->dai = &wm8988_dai;
  741. codec->num_dai = 1;
  742. codec->reg_cache_size = ARRAY_SIZE(wm8988->reg_cache);
  743. codec->reg_cache = &wm8988->reg_cache;
  744. codec->bias_level = SND_SOC_BIAS_OFF;
  745. codec->set_bias_level = wm8988_set_bias_level;
  746. memcpy(codec->reg_cache, wm8988_reg,
  747. sizeof(wm8988_reg));
  748. ret = wm8988_reset(codec);
  749. if (ret < 0) {
  750. dev_err(codec->dev, "Failed to issue reset\n");
  751. return ret;
  752. }
  753. /* set the update bits (we always update left then right) */
  754. reg = wm8988_read_reg_cache(codec, WM8988_RADC);
  755. wm8988_write(codec, WM8988_RADC, reg | 0x100);
  756. reg = wm8988_read_reg_cache(codec, WM8988_RDAC);
  757. wm8988_write(codec, WM8988_RDAC, reg | 0x0100);
  758. reg = wm8988_read_reg_cache(codec, WM8988_ROUT1V);
  759. wm8988_write(codec, WM8988_ROUT1V, reg | 0x0100);
  760. reg = wm8988_read_reg_cache(codec, WM8988_ROUT2V);
  761. wm8988_write(codec, WM8988_ROUT2V, reg | 0x0100);
  762. reg = wm8988_read_reg_cache(codec, WM8988_RINVOL);
  763. wm8988_write(codec, WM8988_RINVOL, reg | 0x0100);
  764. wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_STANDBY);
  765. wm8988_dai.dev = codec->dev;
  766. wm8988_codec = codec;
  767. ret = snd_soc_register_codec(codec);
  768. if (ret != 0) {
  769. dev_err(codec->dev, "Failed to register codec: %d\n", ret);
  770. return ret;
  771. }
  772. ret = snd_soc_register_dai(&wm8988_dai);
  773. if (ret != 0) {
  774. dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
  775. snd_soc_unregister_codec(codec);
  776. return ret;
  777. }
  778. return 0;
  779. err:
  780. kfree(wm8988);
  781. return ret;
  782. }
  783. static void wm8988_unregister(struct wm8988_priv *wm8988)
  784. {
  785. wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_OFF);
  786. snd_soc_unregister_dai(&wm8988_dai);
  787. snd_soc_unregister_codec(&wm8988->codec);
  788. kfree(wm8988);
  789. wm8988_codec = NULL;
  790. }
  791. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  792. static int wm8988_i2c_probe(struct i2c_client *i2c,
  793. const struct i2c_device_id *id)
  794. {
  795. struct wm8988_priv *wm8988;
  796. struct snd_soc_codec *codec;
  797. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  798. if (wm8988 == NULL)
  799. return -ENOMEM;
  800. codec = &wm8988->codec;
  801. codec->hw_write = (hw_write_t)i2c_master_send;
  802. i2c_set_clientdata(i2c, wm8988);
  803. codec->control_data = i2c;
  804. codec->dev = &i2c->dev;
  805. return wm8988_register(wm8988);
  806. }
  807. static int wm8988_i2c_remove(struct i2c_client *client)
  808. {
  809. struct wm8988_priv *wm8988 = i2c_get_clientdata(client);
  810. wm8988_unregister(wm8988);
  811. return 0;
  812. }
  813. static const struct i2c_device_id wm8988_i2c_id[] = {
  814. { "wm8988", 0 },
  815. { }
  816. };
  817. MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id);
  818. static struct i2c_driver wm8988_i2c_driver = {
  819. .driver = {
  820. .name = "WM8988",
  821. .owner = THIS_MODULE,
  822. },
  823. .probe = wm8988_i2c_probe,
  824. .remove = wm8988_i2c_remove,
  825. .id_table = wm8988_i2c_id,
  826. };
  827. #endif
  828. #if defined(CONFIG_SPI_MASTER)
  829. static int wm8988_spi_write(struct spi_device *spi, const char *data, int len)
  830. {
  831. struct spi_transfer t;
  832. struct spi_message m;
  833. u8 msg[2];
  834. if (len <= 0)
  835. return 0;
  836. msg[0] = data[0];
  837. msg[1] = data[1];
  838. spi_message_init(&m);
  839. memset(&t, 0, (sizeof t));
  840. t.tx_buf = &msg[0];
  841. t.len = len;
  842. spi_message_add_tail(&t, &m);
  843. spi_sync(spi, &m);
  844. return len;
  845. }
  846. static int __devinit wm8988_spi_probe(struct spi_device *spi)
  847. {
  848. struct wm8988_priv *wm8988;
  849. struct snd_soc_codec *codec;
  850. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  851. if (wm8988 == NULL)
  852. return -ENOMEM;
  853. codec = &wm8988->codec;
  854. codec->hw_write = (hw_write_t)wm8988_spi_write;
  855. codec->control_data = spi;
  856. codec->dev = &spi->dev;
  857. spi->dev.driver_data = wm8988;
  858. return wm8988_register(wm8988);
  859. }
  860. static int __devexit wm8988_spi_remove(struct spi_device *spi)
  861. {
  862. struct wm8988_priv *wm8988 = spi->dev.driver_data;
  863. wm8988_unregister(wm8988);
  864. return 0;
  865. }
  866. static struct spi_driver wm8988_spi_driver = {
  867. .driver = {
  868. .name = "wm8988",
  869. .bus = &spi_bus_type,
  870. .owner = THIS_MODULE,
  871. },
  872. .probe = wm8988_spi_probe,
  873. .remove = __devexit_p(wm8988_spi_remove),
  874. };
  875. #endif
  876. static int __init wm8988_modinit(void)
  877. {
  878. int ret;
  879. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  880. ret = i2c_add_driver(&wm8988_i2c_driver);
  881. if (ret != 0)
  882. pr_err("WM8988: Unable to register I2C driver: %d\n", ret);
  883. #endif
  884. #if defined(CONFIG_SPI_MASTER)
  885. ret = spi_register_driver(&wm8988_spi_driver);
  886. if (ret != 0)
  887. pr_err("WM8988: Unable to register SPI driver: %d\n", ret);
  888. #endif
  889. return ret;
  890. }
  891. module_init(wm8988_modinit);
  892. static void __exit wm8988_exit(void)
  893. {
  894. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  895. i2c_del_driver(&wm8988_i2c_driver);
  896. #endif
  897. #if defined(CONFIG_SPI_MASTER)
  898. spi_unregister_driver(&wm8988_spi_driver);
  899. #endif
  900. }
  901. module_exit(wm8988_exit);
  902. MODULE_DESCRIPTION("ASoC WM8988 driver");
  903. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  904. MODULE_LICENSE("GPL");