twl4030.c 66 KB

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  1. /*
  2. * ALSA SoC TWL4030 codec driver
  3. *
  4. * Author: Steve Sakoman, <steve@sakoman.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/i2c/twl4030.h>
  29. #include <sound/core.h>
  30. #include <sound/pcm.h>
  31. #include <sound/pcm_params.h>
  32. #include <sound/soc.h>
  33. #include <sound/soc-dapm.h>
  34. #include <sound/initval.h>
  35. #include <sound/tlv.h>
  36. #include "twl4030.h"
  37. /*
  38. * twl4030 register cache & default register settings
  39. */
  40. static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
  41. 0x00, /* this register not used */
  42. 0x91, /* REG_CODEC_MODE (0x1) */
  43. 0xc3, /* REG_OPTION (0x2) */
  44. 0x00, /* REG_UNKNOWN (0x3) */
  45. 0x00, /* REG_MICBIAS_CTL (0x4) */
  46. 0x20, /* REG_ANAMICL (0x5) */
  47. 0x00, /* REG_ANAMICR (0x6) */
  48. 0x00, /* REG_AVADC_CTL (0x7) */
  49. 0x00, /* REG_ADCMICSEL (0x8) */
  50. 0x00, /* REG_DIGMIXING (0x9) */
  51. 0x0c, /* REG_ATXL1PGA (0xA) */
  52. 0x0c, /* REG_ATXR1PGA (0xB) */
  53. 0x00, /* REG_AVTXL2PGA (0xC) */
  54. 0x00, /* REG_AVTXR2PGA (0xD) */
  55. 0x01, /* REG_AUDIO_IF (0xE) */
  56. 0x00, /* REG_VOICE_IF (0xF) */
  57. 0x00, /* REG_ARXR1PGA (0x10) */
  58. 0x00, /* REG_ARXL1PGA (0x11) */
  59. 0x6c, /* REG_ARXR2PGA (0x12) */
  60. 0x6c, /* REG_ARXL2PGA (0x13) */
  61. 0x00, /* REG_VRXPGA (0x14) */
  62. 0x00, /* REG_VSTPGA (0x15) */
  63. 0x00, /* REG_VRX2ARXPGA (0x16) */
  64. 0x0c, /* REG_AVDAC_CTL (0x17) */
  65. 0x00, /* REG_ARX2VTXPGA (0x18) */
  66. 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
  67. 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
  68. 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
  69. 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
  70. 0x00, /* REG_ATX2ARXPGA (0x1D) */
  71. 0x00, /* REG_BT_IF (0x1E) */
  72. 0x00, /* REG_BTPGA (0x1F) */
  73. 0x00, /* REG_BTSTPGA (0x20) */
  74. 0x00, /* REG_EAR_CTL (0x21) */
  75. 0x24, /* REG_HS_SEL (0x22) */
  76. 0x0a, /* REG_HS_GAIN_SET (0x23) */
  77. 0x00, /* REG_HS_POPN_SET (0x24) */
  78. 0x00, /* REG_PREDL_CTL (0x25) */
  79. 0x00, /* REG_PREDR_CTL (0x26) */
  80. 0x00, /* REG_PRECKL_CTL (0x27) */
  81. 0x00, /* REG_PRECKR_CTL (0x28) */
  82. 0x00, /* REG_HFL_CTL (0x29) */
  83. 0x00, /* REG_HFR_CTL (0x2A) */
  84. 0x00, /* REG_ALC_CTL (0x2B) */
  85. 0x00, /* REG_ALC_SET1 (0x2C) */
  86. 0x00, /* REG_ALC_SET2 (0x2D) */
  87. 0x00, /* REG_BOOST_CTL (0x2E) */
  88. 0x00, /* REG_SOFTVOL_CTL (0x2F) */
  89. 0x00, /* REG_DTMF_FREQSEL (0x30) */
  90. 0x00, /* REG_DTMF_TONEXT1H (0x31) */
  91. 0x00, /* REG_DTMF_TONEXT1L (0x32) */
  92. 0x00, /* REG_DTMF_TONEXT2H (0x33) */
  93. 0x00, /* REG_DTMF_TONEXT2L (0x34) */
  94. 0x00, /* REG_DTMF_TONOFF (0x35) */
  95. 0x00, /* REG_DTMF_WANONOFF (0x36) */
  96. 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
  97. 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
  98. 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
  99. 0x16, /* REG_APLL_CTL (0x3A) */
  100. 0x00, /* REG_DTMF_CTL (0x3B) */
  101. 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
  102. 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
  103. 0x00, /* REG_MISC_SET_1 (0x3E) */
  104. 0x00, /* REG_PCMBTMUX (0x3F) */
  105. 0x00, /* not used (0x40) */
  106. 0x00, /* not used (0x41) */
  107. 0x00, /* not used (0x42) */
  108. 0x00, /* REG_RX_PATH_SEL (0x43) */
  109. 0x00, /* REG_VDL_APGA_CTL (0x44) */
  110. 0x00, /* REG_VIBRA_CTL (0x45) */
  111. 0x00, /* REG_VIBRA_SET (0x46) */
  112. 0x00, /* REG_VIBRA_PWM_SET (0x47) */
  113. 0x00, /* REG_ANAMIC_GAIN (0x48) */
  114. 0x00, /* REG_MISC_SET_2 (0x49) */
  115. 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
  116. };
  117. /* codec private data */
  118. struct twl4030_priv {
  119. unsigned int bypass_state;
  120. unsigned int codec_powered;
  121. unsigned int codec_muted;
  122. struct snd_pcm_substream *master_substream;
  123. struct snd_pcm_substream *slave_substream;
  124. unsigned int configured;
  125. unsigned int rate;
  126. unsigned int sample_bits;
  127. unsigned int channels;
  128. unsigned int sysclk;
  129. /* Headset output state handling */
  130. unsigned int hsl_enabled;
  131. unsigned int hsr_enabled;
  132. };
  133. /*
  134. * read twl4030 register cache
  135. */
  136. static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
  137. unsigned int reg)
  138. {
  139. u8 *cache = codec->reg_cache;
  140. if (reg >= TWL4030_CACHEREGNUM)
  141. return -EIO;
  142. return cache[reg];
  143. }
  144. /*
  145. * write twl4030 register cache
  146. */
  147. static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
  148. u8 reg, u8 value)
  149. {
  150. u8 *cache = codec->reg_cache;
  151. if (reg >= TWL4030_CACHEREGNUM)
  152. return;
  153. cache[reg] = value;
  154. }
  155. /*
  156. * write to the twl4030 register space
  157. */
  158. static int twl4030_write(struct snd_soc_codec *codec,
  159. unsigned int reg, unsigned int value)
  160. {
  161. twl4030_write_reg_cache(codec, reg, value);
  162. if (likely(reg < TWL4030_REG_SW_SHADOW))
  163. return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value,
  164. reg);
  165. else
  166. return 0;
  167. }
  168. static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
  169. {
  170. struct twl4030_priv *twl4030 = codec->private_data;
  171. u8 mode;
  172. if (enable == twl4030->codec_powered)
  173. return;
  174. mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
  175. if (enable)
  176. mode |= TWL4030_CODECPDZ;
  177. else
  178. mode &= ~TWL4030_CODECPDZ;
  179. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  180. twl4030->codec_powered = enable;
  181. /* REVISIT: this delay is present in TI sample drivers */
  182. /* but there seems to be no TRM requirement for it */
  183. udelay(10);
  184. }
  185. static void twl4030_init_chip(struct snd_soc_codec *codec)
  186. {
  187. u8 *cache = codec->reg_cache;
  188. int i;
  189. /* clear CODECPDZ prior to setting register defaults */
  190. twl4030_codec_enable(codec, 0);
  191. /* set all audio section registers to reasonable defaults */
  192. for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
  193. twl4030_write(codec, i, cache[i]);
  194. }
  195. static void twl4030_codec_mute(struct snd_soc_codec *codec, int mute)
  196. {
  197. struct twl4030_priv *twl4030 = codec->private_data;
  198. u8 reg_val;
  199. if (mute == twl4030->codec_muted)
  200. return;
  201. if (mute) {
  202. /* Bypass the reg_cache and mute the volumes
  203. * Headset mute is done in it's own event handler
  204. * Things to mute: Earpiece, PreDrivL/R, CarkitL/R
  205. */
  206. reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL);
  207. twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  208. reg_val & (~TWL4030_EAR_GAIN),
  209. TWL4030_REG_EAR_CTL);
  210. reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL);
  211. twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  212. reg_val & (~TWL4030_PREDL_GAIN),
  213. TWL4030_REG_PREDL_CTL);
  214. reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL);
  215. twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  216. reg_val & (~TWL4030_PREDR_GAIN),
  217. TWL4030_REG_PREDL_CTL);
  218. reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL);
  219. twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  220. reg_val & (~TWL4030_PRECKL_GAIN),
  221. TWL4030_REG_PRECKL_CTL);
  222. reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL);
  223. twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  224. reg_val & (~TWL4030_PRECKR_GAIN),
  225. TWL4030_REG_PRECKR_CTL);
  226. /* Disable PLL */
  227. reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
  228. reg_val &= ~TWL4030_APLL_EN;
  229. twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
  230. } else {
  231. /* Restore the volumes
  232. * Headset mute is done in it's own event handler
  233. * Things to restore: Earpiece, PreDrivL/R, CarkitL/R
  234. */
  235. twl4030_write(codec, TWL4030_REG_EAR_CTL,
  236. twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL));
  237. twl4030_write(codec, TWL4030_REG_PREDL_CTL,
  238. twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL));
  239. twl4030_write(codec, TWL4030_REG_PREDR_CTL,
  240. twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL));
  241. twl4030_write(codec, TWL4030_REG_PRECKL_CTL,
  242. twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL));
  243. twl4030_write(codec, TWL4030_REG_PRECKR_CTL,
  244. twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL));
  245. /* Enable PLL */
  246. reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
  247. reg_val |= TWL4030_APLL_EN;
  248. twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
  249. }
  250. twl4030->codec_muted = mute;
  251. }
  252. static void twl4030_power_up(struct snd_soc_codec *codec)
  253. {
  254. struct twl4030_priv *twl4030 = codec->private_data;
  255. u8 anamicl, regmisc1, byte;
  256. int i = 0;
  257. if (twl4030->codec_powered)
  258. return;
  259. /* set CODECPDZ to turn on codec */
  260. twl4030_codec_enable(codec, 1);
  261. /* initiate offset cancellation */
  262. anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
  263. twl4030_write(codec, TWL4030_REG_ANAMICL,
  264. anamicl | TWL4030_CNCL_OFFSET_START);
  265. /* wait for offset cancellation to complete */
  266. do {
  267. /* this takes a little while, so don't slam i2c */
  268. udelay(2000);
  269. twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
  270. TWL4030_REG_ANAMICL);
  271. } while ((i++ < 100) &&
  272. ((byte & TWL4030_CNCL_OFFSET_START) ==
  273. TWL4030_CNCL_OFFSET_START));
  274. /* Make sure that the reg_cache has the same value as the HW */
  275. twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
  276. /* anti-pop when changing analog gain */
  277. regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
  278. twl4030_write(codec, TWL4030_REG_MISC_SET_1,
  279. regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
  280. /* toggle CODECPDZ as per TRM */
  281. twl4030_codec_enable(codec, 0);
  282. twl4030_codec_enable(codec, 1);
  283. }
  284. /*
  285. * Unconditional power down
  286. */
  287. static void twl4030_power_down(struct snd_soc_codec *codec)
  288. {
  289. /* power down */
  290. twl4030_codec_enable(codec, 0);
  291. }
  292. /* Earpiece */
  293. static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
  294. SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
  295. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
  296. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
  297. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
  298. };
  299. /* PreDrive Left */
  300. static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
  301. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
  302. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
  303. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
  304. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
  305. };
  306. /* PreDrive Right */
  307. static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
  308. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
  309. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
  310. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
  311. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
  312. };
  313. /* Headset Left */
  314. static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
  315. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
  316. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
  317. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
  318. };
  319. /* Headset Right */
  320. static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
  321. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
  322. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
  323. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
  324. };
  325. /* Carkit Left */
  326. static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
  327. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
  328. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
  329. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
  330. };
  331. /* Carkit Right */
  332. static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
  333. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
  334. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
  335. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
  336. };
  337. /* Handsfree Left */
  338. static const char *twl4030_handsfreel_texts[] =
  339. {"Voice", "AudioL1", "AudioL2", "AudioR2"};
  340. static const struct soc_enum twl4030_handsfreel_enum =
  341. SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
  342. ARRAY_SIZE(twl4030_handsfreel_texts),
  343. twl4030_handsfreel_texts);
  344. static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
  345. SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
  346. /* Handsfree Left virtual mute */
  347. static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
  348. SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
  349. /* Handsfree Right */
  350. static const char *twl4030_handsfreer_texts[] =
  351. {"Voice", "AudioR1", "AudioR2", "AudioL2"};
  352. static const struct soc_enum twl4030_handsfreer_enum =
  353. SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
  354. ARRAY_SIZE(twl4030_handsfreer_texts),
  355. twl4030_handsfreer_texts);
  356. static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
  357. SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
  358. /* Handsfree Right virtual mute */
  359. static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
  360. SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
  361. /* Vibra */
  362. /* Vibra audio path selection */
  363. static const char *twl4030_vibra_texts[] =
  364. {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
  365. static const struct soc_enum twl4030_vibra_enum =
  366. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
  367. ARRAY_SIZE(twl4030_vibra_texts),
  368. twl4030_vibra_texts);
  369. static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
  370. SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
  371. /* Vibra path selection: local vibrator (PWM) or audio driven */
  372. static const char *twl4030_vibrapath_texts[] =
  373. {"Local vibrator", "Audio"};
  374. static const struct soc_enum twl4030_vibrapath_enum =
  375. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
  376. ARRAY_SIZE(twl4030_vibrapath_texts),
  377. twl4030_vibrapath_texts);
  378. static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
  379. SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
  380. /* Left analog microphone selection */
  381. static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
  382. SOC_DAPM_SINGLE("Main mic", TWL4030_REG_ANAMICL, 0, 1, 0),
  383. SOC_DAPM_SINGLE("Headset mic", TWL4030_REG_ANAMICL, 1, 1, 0),
  384. SOC_DAPM_SINGLE("AUXL", TWL4030_REG_ANAMICL, 2, 1, 0),
  385. SOC_DAPM_SINGLE("Carkit mic", TWL4030_REG_ANAMICL, 3, 1, 0),
  386. };
  387. /* Right analog microphone selection */
  388. static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
  389. SOC_DAPM_SINGLE("Sub mic", TWL4030_REG_ANAMICR, 0, 1, 0),
  390. SOC_DAPM_SINGLE("AUXR", TWL4030_REG_ANAMICR, 2, 1, 0),
  391. };
  392. /* TX1 L/R Analog/Digital microphone selection */
  393. static const char *twl4030_micpathtx1_texts[] =
  394. {"Analog", "Digimic0"};
  395. static const struct soc_enum twl4030_micpathtx1_enum =
  396. SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
  397. ARRAY_SIZE(twl4030_micpathtx1_texts),
  398. twl4030_micpathtx1_texts);
  399. static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
  400. SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
  401. /* TX2 L/R Analog/Digital microphone selection */
  402. static const char *twl4030_micpathtx2_texts[] =
  403. {"Analog", "Digimic1"};
  404. static const struct soc_enum twl4030_micpathtx2_enum =
  405. SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
  406. ARRAY_SIZE(twl4030_micpathtx2_texts),
  407. twl4030_micpathtx2_texts);
  408. static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
  409. SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
  410. /* Analog bypass for AudioR1 */
  411. static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
  412. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
  413. /* Analog bypass for AudioL1 */
  414. static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
  415. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
  416. /* Analog bypass for AudioR2 */
  417. static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
  418. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
  419. /* Analog bypass for AudioL2 */
  420. static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
  421. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
  422. /* Analog bypass for Voice */
  423. static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
  424. SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
  425. /* Digital bypass gain, 0 mutes the bypass */
  426. static const unsigned int twl4030_dapm_dbypass_tlv[] = {
  427. TLV_DB_RANGE_HEAD(2),
  428. 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
  429. 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
  430. };
  431. /* Digital bypass left (TX1L -> RX2L) */
  432. static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
  433. SOC_DAPM_SINGLE_TLV("Volume",
  434. TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
  435. twl4030_dapm_dbypass_tlv);
  436. /* Digital bypass right (TX1R -> RX2R) */
  437. static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
  438. SOC_DAPM_SINGLE_TLV("Volume",
  439. TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
  440. twl4030_dapm_dbypass_tlv);
  441. /*
  442. * Voice Sidetone GAIN volume control:
  443. * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
  444. */
  445. static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
  446. /* Digital bypass voice: sidetone (VUL -> VDL)*/
  447. static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
  448. SOC_DAPM_SINGLE_TLV("Volume",
  449. TWL4030_REG_VSTPGA, 0, 0x29, 0,
  450. twl4030_dapm_dbypassv_tlv);
  451. static int micpath_event(struct snd_soc_dapm_widget *w,
  452. struct snd_kcontrol *kcontrol, int event)
  453. {
  454. struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
  455. unsigned char adcmicsel, micbias_ctl;
  456. adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
  457. micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
  458. /* Prepare the bits for the given TX path:
  459. * shift_l == 0: TX1 microphone path
  460. * shift_l == 2: TX2 microphone path */
  461. if (e->shift_l) {
  462. /* TX2 microphone path */
  463. if (adcmicsel & TWL4030_TX2IN_SEL)
  464. micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
  465. else
  466. micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
  467. } else {
  468. /* TX1 microphone path */
  469. if (adcmicsel & TWL4030_TX1IN_SEL)
  470. micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
  471. else
  472. micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
  473. }
  474. twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
  475. return 0;
  476. }
  477. static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
  478. {
  479. unsigned char hs_ctl;
  480. hs_ctl = twl4030_read_reg_cache(codec, reg);
  481. if (ramp) {
  482. /* HF ramp-up */
  483. hs_ctl |= TWL4030_HF_CTL_REF_EN;
  484. twl4030_write(codec, reg, hs_ctl);
  485. udelay(10);
  486. hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
  487. twl4030_write(codec, reg, hs_ctl);
  488. udelay(40);
  489. hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
  490. hs_ctl |= TWL4030_HF_CTL_HB_EN;
  491. twl4030_write(codec, reg, hs_ctl);
  492. } else {
  493. /* HF ramp-down */
  494. hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
  495. hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
  496. twl4030_write(codec, reg, hs_ctl);
  497. hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
  498. twl4030_write(codec, reg, hs_ctl);
  499. udelay(40);
  500. hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
  501. twl4030_write(codec, reg, hs_ctl);
  502. }
  503. }
  504. static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
  505. struct snd_kcontrol *kcontrol, int event)
  506. {
  507. switch (event) {
  508. case SND_SOC_DAPM_POST_PMU:
  509. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
  510. break;
  511. case SND_SOC_DAPM_POST_PMD:
  512. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
  513. break;
  514. }
  515. return 0;
  516. }
  517. static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
  518. struct snd_kcontrol *kcontrol, int event)
  519. {
  520. switch (event) {
  521. case SND_SOC_DAPM_POST_PMU:
  522. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
  523. break;
  524. case SND_SOC_DAPM_POST_PMD:
  525. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
  526. break;
  527. }
  528. return 0;
  529. }
  530. static void headset_ramp(struct snd_soc_codec *codec, int ramp)
  531. {
  532. unsigned char hs_gain, hs_pop;
  533. struct twl4030_priv *twl4030 = codec->private_data;
  534. /* Base values for ramp delay calculation: 2^19 - 2^26 */
  535. unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
  536. 8388608, 16777216, 33554432, 67108864};
  537. hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
  538. hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
  539. if (ramp) {
  540. /* Headset ramp-up according to the TRM */
  541. hs_pop |= TWL4030_VMID_EN;
  542. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  543. twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hs_gain);
  544. hs_pop |= TWL4030_RAMP_EN;
  545. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  546. } else {
  547. /* Headset ramp-down _not_ according to
  548. * the TRM, but in a way that it is working */
  549. hs_pop &= ~TWL4030_RAMP_EN;
  550. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  551. /* Wait ramp delay time + 1, so the VMID can settle */
  552. mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
  553. twl4030->sysclk) + 1);
  554. /* Bypass the reg_cache to mute the headset */
  555. twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  556. hs_gain & (~0x0f),
  557. TWL4030_REG_HS_GAIN_SET);
  558. hs_pop &= ~TWL4030_VMID_EN;
  559. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  560. }
  561. }
  562. static int headsetlpga_event(struct snd_soc_dapm_widget *w,
  563. struct snd_kcontrol *kcontrol, int event)
  564. {
  565. struct twl4030_priv *twl4030 = w->codec->private_data;
  566. switch (event) {
  567. case SND_SOC_DAPM_POST_PMU:
  568. /* Do the ramp-up only once */
  569. if (!twl4030->hsr_enabled)
  570. headset_ramp(w->codec, 1);
  571. twl4030->hsl_enabled = 1;
  572. break;
  573. case SND_SOC_DAPM_POST_PMD:
  574. /* Do the ramp-down only if both headsetL/R is disabled */
  575. if (!twl4030->hsr_enabled)
  576. headset_ramp(w->codec, 0);
  577. twl4030->hsl_enabled = 0;
  578. break;
  579. }
  580. return 0;
  581. }
  582. static int headsetrpga_event(struct snd_soc_dapm_widget *w,
  583. struct snd_kcontrol *kcontrol, int event)
  584. {
  585. struct twl4030_priv *twl4030 = w->codec->private_data;
  586. switch (event) {
  587. case SND_SOC_DAPM_POST_PMU:
  588. /* Do the ramp-up only once */
  589. if (!twl4030->hsl_enabled)
  590. headset_ramp(w->codec, 1);
  591. twl4030->hsr_enabled = 1;
  592. break;
  593. case SND_SOC_DAPM_POST_PMD:
  594. /* Do the ramp-down only if both headsetL/R is disabled */
  595. if (!twl4030->hsl_enabled)
  596. headset_ramp(w->codec, 0);
  597. twl4030->hsr_enabled = 0;
  598. break;
  599. }
  600. return 0;
  601. }
  602. static int bypass_event(struct snd_soc_dapm_widget *w,
  603. struct snd_kcontrol *kcontrol, int event)
  604. {
  605. struct soc_mixer_control *m =
  606. (struct soc_mixer_control *)w->kcontrols->private_value;
  607. struct twl4030_priv *twl4030 = w->codec->private_data;
  608. unsigned char reg, misc;
  609. reg = twl4030_read_reg_cache(w->codec, m->reg);
  610. if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) {
  611. /* Analog bypass */
  612. if (reg & (1 << m->shift))
  613. twl4030->bypass_state |=
  614. (1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
  615. else
  616. twl4030->bypass_state &=
  617. ~(1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
  618. } else if (m->reg == TWL4030_REG_VDL_APGA_CTL) {
  619. /* Analog voice bypass */
  620. if (reg & (1 << m->shift))
  621. twl4030->bypass_state |= (1 << 4);
  622. else
  623. twl4030->bypass_state &= ~(1 << 4);
  624. } else if (m->reg == TWL4030_REG_VSTPGA) {
  625. /* Voice digital bypass */
  626. if (reg)
  627. twl4030->bypass_state |= (1 << 5);
  628. else
  629. twl4030->bypass_state &= ~(1 << 5);
  630. } else {
  631. /* Digital bypass */
  632. if (reg & (0x7 << m->shift))
  633. twl4030->bypass_state |= (1 << (m->shift ? 7 : 6));
  634. else
  635. twl4030->bypass_state &= ~(1 << (m->shift ? 7 : 6));
  636. }
  637. /* Enable master analog loopback mode if any analog switch is enabled*/
  638. misc = twl4030_read_reg_cache(w->codec, TWL4030_REG_MISC_SET_1);
  639. if (twl4030->bypass_state & 0x1F)
  640. misc |= TWL4030_FMLOOP_EN;
  641. else
  642. misc &= ~TWL4030_FMLOOP_EN;
  643. twl4030_write(w->codec, TWL4030_REG_MISC_SET_1, misc);
  644. if (w->codec->bias_level == SND_SOC_BIAS_STANDBY) {
  645. if (twl4030->bypass_state)
  646. twl4030_codec_mute(w->codec, 0);
  647. else
  648. twl4030_codec_mute(w->codec, 1);
  649. }
  650. return 0;
  651. }
  652. /*
  653. * Some of the gain controls in TWL (mostly those which are associated with
  654. * the outputs) are implemented in an interesting way:
  655. * 0x0 : Power down (mute)
  656. * 0x1 : 6dB
  657. * 0x2 : 0 dB
  658. * 0x3 : -6 dB
  659. * Inverting not going to help with these.
  660. * Custom volsw and volsw_2r get/put functions to handle these gain bits.
  661. */
  662. #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
  663. xinvert, tlv_array) \
  664. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
  665. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
  666. SNDRV_CTL_ELEM_ACCESS_READWRITE,\
  667. .tlv.p = (tlv_array), \
  668. .info = snd_soc_info_volsw, \
  669. .get = snd_soc_get_volsw_twl4030, \
  670. .put = snd_soc_put_volsw_twl4030, \
  671. .private_value = (unsigned long)&(struct soc_mixer_control) \
  672. {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
  673. .max = xmax, .invert = xinvert} }
  674. #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
  675. xinvert, tlv_array) \
  676. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
  677. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
  678. SNDRV_CTL_ELEM_ACCESS_READWRITE,\
  679. .tlv.p = (tlv_array), \
  680. .info = snd_soc_info_volsw_2r, \
  681. .get = snd_soc_get_volsw_r2_twl4030,\
  682. .put = snd_soc_put_volsw_r2_twl4030, \
  683. .private_value = (unsigned long)&(struct soc_mixer_control) \
  684. {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
  685. .rshift = xshift, .max = xmax, .invert = xinvert} }
  686. #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
  687. SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
  688. xinvert, tlv_array)
  689. static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
  690. struct snd_ctl_elem_value *ucontrol)
  691. {
  692. struct soc_mixer_control *mc =
  693. (struct soc_mixer_control *)kcontrol->private_value;
  694. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  695. unsigned int reg = mc->reg;
  696. unsigned int shift = mc->shift;
  697. unsigned int rshift = mc->rshift;
  698. int max = mc->max;
  699. int mask = (1 << fls(max)) - 1;
  700. ucontrol->value.integer.value[0] =
  701. (snd_soc_read(codec, reg) >> shift) & mask;
  702. if (ucontrol->value.integer.value[0])
  703. ucontrol->value.integer.value[0] =
  704. max + 1 - ucontrol->value.integer.value[0];
  705. if (shift != rshift) {
  706. ucontrol->value.integer.value[1] =
  707. (snd_soc_read(codec, reg) >> rshift) & mask;
  708. if (ucontrol->value.integer.value[1])
  709. ucontrol->value.integer.value[1] =
  710. max + 1 - ucontrol->value.integer.value[1];
  711. }
  712. return 0;
  713. }
  714. static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
  715. struct snd_ctl_elem_value *ucontrol)
  716. {
  717. struct soc_mixer_control *mc =
  718. (struct soc_mixer_control *)kcontrol->private_value;
  719. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  720. unsigned int reg = mc->reg;
  721. unsigned int shift = mc->shift;
  722. unsigned int rshift = mc->rshift;
  723. int max = mc->max;
  724. int mask = (1 << fls(max)) - 1;
  725. unsigned short val, val2, val_mask;
  726. val = (ucontrol->value.integer.value[0] & mask);
  727. val_mask = mask << shift;
  728. if (val)
  729. val = max + 1 - val;
  730. val = val << shift;
  731. if (shift != rshift) {
  732. val2 = (ucontrol->value.integer.value[1] & mask);
  733. val_mask |= mask << rshift;
  734. if (val2)
  735. val2 = max + 1 - val2;
  736. val |= val2 << rshift;
  737. }
  738. return snd_soc_update_bits(codec, reg, val_mask, val);
  739. }
  740. static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  741. struct snd_ctl_elem_value *ucontrol)
  742. {
  743. struct soc_mixer_control *mc =
  744. (struct soc_mixer_control *)kcontrol->private_value;
  745. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  746. unsigned int reg = mc->reg;
  747. unsigned int reg2 = mc->rreg;
  748. unsigned int shift = mc->shift;
  749. int max = mc->max;
  750. int mask = (1<<fls(max))-1;
  751. ucontrol->value.integer.value[0] =
  752. (snd_soc_read(codec, reg) >> shift) & mask;
  753. ucontrol->value.integer.value[1] =
  754. (snd_soc_read(codec, reg2) >> shift) & mask;
  755. if (ucontrol->value.integer.value[0])
  756. ucontrol->value.integer.value[0] =
  757. max + 1 - ucontrol->value.integer.value[0];
  758. if (ucontrol->value.integer.value[1])
  759. ucontrol->value.integer.value[1] =
  760. max + 1 - ucontrol->value.integer.value[1];
  761. return 0;
  762. }
  763. static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  764. struct snd_ctl_elem_value *ucontrol)
  765. {
  766. struct soc_mixer_control *mc =
  767. (struct soc_mixer_control *)kcontrol->private_value;
  768. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  769. unsigned int reg = mc->reg;
  770. unsigned int reg2 = mc->rreg;
  771. unsigned int shift = mc->shift;
  772. int max = mc->max;
  773. int mask = (1 << fls(max)) - 1;
  774. int err;
  775. unsigned short val, val2, val_mask;
  776. val_mask = mask << shift;
  777. val = (ucontrol->value.integer.value[0] & mask);
  778. val2 = (ucontrol->value.integer.value[1] & mask);
  779. if (val)
  780. val = max + 1 - val;
  781. if (val2)
  782. val2 = max + 1 - val2;
  783. val = val << shift;
  784. val2 = val2 << shift;
  785. err = snd_soc_update_bits(codec, reg, val_mask, val);
  786. if (err < 0)
  787. return err;
  788. err = snd_soc_update_bits(codec, reg2, val_mask, val2);
  789. return err;
  790. }
  791. /* Codec operation modes */
  792. static const char *twl4030_op_modes_texts[] = {
  793. "Option 2 (voice/audio)", "Option 1 (audio)"
  794. };
  795. static const struct soc_enum twl4030_op_modes_enum =
  796. SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
  797. ARRAY_SIZE(twl4030_op_modes_texts),
  798. twl4030_op_modes_texts);
  799. int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
  800. struct snd_ctl_elem_value *ucontrol)
  801. {
  802. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  803. struct twl4030_priv *twl4030 = codec->private_data;
  804. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  805. unsigned short val;
  806. unsigned short mask, bitmask;
  807. if (twl4030->configured) {
  808. printk(KERN_ERR "twl4030 operation mode cannot be "
  809. "changed on-the-fly\n");
  810. return -EBUSY;
  811. }
  812. for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
  813. ;
  814. if (ucontrol->value.enumerated.item[0] > e->max - 1)
  815. return -EINVAL;
  816. val = ucontrol->value.enumerated.item[0] << e->shift_l;
  817. mask = (bitmask - 1) << e->shift_l;
  818. if (e->shift_l != e->shift_r) {
  819. if (ucontrol->value.enumerated.item[1] > e->max - 1)
  820. return -EINVAL;
  821. val |= ucontrol->value.enumerated.item[1] << e->shift_r;
  822. mask |= (bitmask - 1) << e->shift_r;
  823. }
  824. return snd_soc_update_bits(codec, e->reg, mask, val);
  825. }
  826. /*
  827. * FGAIN volume control:
  828. * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
  829. */
  830. static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
  831. /*
  832. * CGAIN volume control:
  833. * 0 dB to 12 dB in 6 dB steps
  834. * value 2 and 3 means 12 dB
  835. */
  836. static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
  837. /*
  838. * Voice Downlink GAIN volume control:
  839. * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
  840. */
  841. static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
  842. /*
  843. * Analog playback gain
  844. * -24 dB to 12 dB in 2 dB steps
  845. */
  846. static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
  847. /*
  848. * Gain controls tied to outputs
  849. * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
  850. */
  851. static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
  852. /*
  853. * Gain control for earpiece amplifier
  854. * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
  855. */
  856. static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
  857. /*
  858. * Capture gain after the ADCs
  859. * from 0 dB to 31 dB in 1 dB steps
  860. */
  861. static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
  862. /*
  863. * Gain control for input amplifiers
  864. * 0 dB to 30 dB in 6 dB steps
  865. */
  866. static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
  867. static const char *twl4030_rampdelay_texts[] = {
  868. "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
  869. "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
  870. "3495/2581/1748 ms"
  871. };
  872. static const struct soc_enum twl4030_rampdelay_enum =
  873. SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
  874. ARRAY_SIZE(twl4030_rampdelay_texts),
  875. twl4030_rampdelay_texts);
  876. /* Vibra H-bridge direction mode */
  877. static const char *twl4030_vibradirmode_texts[] = {
  878. "Vibra H-bridge direction", "Audio data MSB",
  879. };
  880. static const struct soc_enum twl4030_vibradirmode_enum =
  881. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
  882. ARRAY_SIZE(twl4030_vibradirmode_texts),
  883. twl4030_vibradirmode_texts);
  884. /* Vibra H-bridge direction */
  885. static const char *twl4030_vibradir_texts[] = {
  886. "Positive polarity", "Negative polarity",
  887. };
  888. static const struct soc_enum twl4030_vibradir_enum =
  889. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
  890. ARRAY_SIZE(twl4030_vibradir_texts),
  891. twl4030_vibradir_texts);
  892. static const struct snd_kcontrol_new twl4030_snd_controls[] = {
  893. /* Codec operation mode control */
  894. SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
  895. snd_soc_get_enum_double,
  896. snd_soc_put_twl4030_opmode_enum_double),
  897. /* Common playback gain controls */
  898. SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
  899. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  900. 0, 0x3f, 0, digital_fine_tlv),
  901. SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
  902. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  903. 0, 0x3f, 0, digital_fine_tlv),
  904. SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
  905. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  906. 6, 0x2, 0, digital_coarse_tlv),
  907. SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
  908. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  909. 6, 0x2, 0, digital_coarse_tlv),
  910. SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
  911. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  912. 3, 0x12, 1, analog_tlv),
  913. SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
  914. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  915. 3, 0x12, 1, analog_tlv),
  916. SOC_DOUBLE_R("DAC1 Analog Playback Switch",
  917. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  918. 1, 1, 0),
  919. SOC_DOUBLE_R("DAC2 Analog Playback Switch",
  920. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  921. 1, 1, 0),
  922. /* Common voice downlink gain controls */
  923. SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
  924. TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
  925. SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
  926. TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
  927. SOC_SINGLE("DAC Voice Analog Downlink Switch",
  928. TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
  929. /* Separate output gain controls */
  930. SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
  931. TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
  932. 4, 3, 0, output_tvl),
  933. SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
  934. TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
  935. SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
  936. TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
  937. 4, 3, 0, output_tvl),
  938. SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
  939. TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
  940. /* Common capture gain controls */
  941. SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
  942. TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
  943. 0, 0x1f, 0, digital_capture_tlv),
  944. SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
  945. TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
  946. 0, 0x1f, 0, digital_capture_tlv),
  947. SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
  948. 0, 3, 5, 0, input_gain_tlv),
  949. SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
  950. SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
  951. SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
  952. };
  953. static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
  954. /* Left channel inputs */
  955. SND_SOC_DAPM_INPUT("MAINMIC"),
  956. SND_SOC_DAPM_INPUT("HSMIC"),
  957. SND_SOC_DAPM_INPUT("AUXL"),
  958. SND_SOC_DAPM_INPUT("CARKITMIC"),
  959. /* Right channel inputs */
  960. SND_SOC_DAPM_INPUT("SUBMIC"),
  961. SND_SOC_DAPM_INPUT("AUXR"),
  962. /* Digital microphones (Stereo) */
  963. SND_SOC_DAPM_INPUT("DIGIMIC0"),
  964. SND_SOC_DAPM_INPUT("DIGIMIC1"),
  965. /* Outputs */
  966. SND_SOC_DAPM_OUTPUT("OUTL"),
  967. SND_SOC_DAPM_OUTPUT("OUTR"),
  968. SND_SOC_DAPM_OUTPUT("EARPIECE"),
  969. SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
  970. SND_SOC_DAPM_OUTPUT("PREDRIVER"),
  971. SND_SOC_DAPM_OUTPUT("HSOL"),
  972. SND_SOC_DAPM_OUTPUT("HSOR"),
  973. SND_SOC_DAPM_OUTPUT("CARKITL"),
  974. SND_SOC_DAPM_OUTPUT("CARKITR"),
  975. SND_SOC_DAPM_OUTPUT("HFL"),
  976. SND_SOC_DAPM_OUTPUT("HFR"),
  977. SND_SOC_DAPM_OUTPUT("VIBRA"),
  978. /* DACs */
  979. SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
  980. SND_SOC_NOPM, 0, 0),
  981. SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
  982. SND_SOC_NOPM, 0, 0),
  983. SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
  984. SND_SOC_NOPM, 0, 0),
  985. SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
  986. SND_SOC_NOPM, 0, 0),
  987. SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
  988. SND_SOC_NOPM, 0, 0),
  989. /* Analog bypasses */
  990. SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  991. &twl4030_dapm_abypassr1_control, bypass_event,
  992. SND_SOC_DAPM_POST_REG),
  993. SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  994. &twl4030_dapm_abypassl1_control,
  995. bypass_event, SND_SOC_DAPM_POST_REG),
  996. SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  997. &twl4030_dapm_abypassr2_control,
  998. bypass_event, SND_SOC_DAPM_POST_REG),
  999. SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1000. &twl4030_dapm_abypassl2_control,
  1001. bypass_event, SND_SOC_DAPM_POST_REG),
  1002. SND_SOC_DAPM_SWITCH_E("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
  1003. &twl4030_dapm_abypassv_control,
  1004. bypass_event, SND_SOC_DAPM_POST_REG),
  1005. /* Digital bypasses */
  1006. SND_SOC_DAPM_SWITCH_E("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
  1007. &twl4030_dapm_dbypassl_control, bypass_event,
  1008. SND_SOC_DAPM_POST_REG),
  1009. SND_SOC_DAPM_SWITCH_E("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
  1010. &twl4030_dapm_dbypassr_control, bypass_event,
  1011. SND_SOC_DAPM_POST_REG),
  1012. SND_SOC_DAPM_SWITCH_E("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
  1013. &twl4030_dapm_dbypassv_control, bypass_event,
  1014. SND_SOC_DAPM_POST_REG),
  1015. /* Digital mixers, power control for the physical DACs */
  1016. SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
  1017. TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
  1018. SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
  1019. TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
  1020. SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
  1021. TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
  1022. SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
  1023. TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
  1024. SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
  1025. TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
  1026. /* Analog mixers, power control for the physical PGAs */
  1027. SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
  1028. TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
  1029. SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
  1030. TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
  1031. SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
  1032. TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
  1033. SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
  1034. TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
  1035. SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
  1036. TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
  1037. /* Output MIXER controls */
  1038. /* Earpiece */
  1039. SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
  1040. &twl4030_dapm_earpiece_controls[0],
  1041. ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
  1042. /* PreDrivL/R */
  1043. SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
  1044. &twl4030_dapm_predrivel_controls[0],
  1045. ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
  1046. SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
  1047. &twl4030_dapm_predriver_controls[0],
  1048. ARRAY_SIZE(twl4030_dapm_predriver_controls)),
  1049. /* HeadsetL/R */
  1050. SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
  1051. &twl4030_dapm_hsol_controls[0],
  1052. ARRAY_SIZE(twl4030_dapm_hsol_controls)),
  1053. SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
  1054. 0, 0, NULL, 0, headsetlpga_event,
  1055. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1056. SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
  1057. &twl4030_dapm_hsor_controls[0],
  1058. ARRAY_SIZE(twl4030_dapm_hsor_controls)),
  1059. SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
  1060. 0, 0, NULL, 0, headsetrpga_event,
  1061. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1062. /* CarkitL/R */
  1063. SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
  1064. &twl4030_dapm_carkitl_controls[0],
  1065. ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
  1066. SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
  1067. &twl4030_dapm_carkitr_controls[0],
  1068. ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
  1069. /* Output MUX controls */
  1070. /* HandsfreeL/R */
  1071. SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
  1072. &twl4030_dapm_handsfreel_control),
  1073. SND_SOC_DAPM_SWITCH("HandsfreeL Switch", SND_SOC_NOPM, 0, 0,
  1074. &twl4030_dapm_handsfreelmute_control),
  1075. SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
  1076. 0, 0, NULL, 0, handsfreelpga_event,
  1077. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1078. SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
  1079. &twl4030_dapm_handsfreer_control),
  1080. SND_SOC_DAPM_SWITCH("HandsfreeR Switch", SND_SOC_NOPM, 0, 0,
  1081. &twl4030_dapm_handsfreermute_control),
  1082. SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
  1083. 0, 0, NULL, 0, handsfreerpga_event,
  1084. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1085. /* Vibra */
  1086. SND_SOC_DAPM_MUX("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
  1087. &twl4030_dapm_vibra_control),
  1088. SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
  1089. &twl4030_dapm_vibrapath_control),
  1090. /* Introducing four virtual ADC, since TWL4030 have four channel for
  1091. capture */
  1092. SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
  1093. SND_SOC_NOPM, 0, 0),
  1094. SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
  1095. SND_SOC_NOPM, 0, 0),
  1096. SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
  1097. SND_SOC_NOPM, 0, 0),
  1098. SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
  1099. SND_SOC_NOPM, 0, 0),
  1100. /* Analog/Digital mic path selection.
  1101. TX1 Left/Right: either analog Left/Right or Digimic0
  1102. TX2 Left/Right: either analog Left/Right or Digimic1 */
  1103. SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
  1104. &twl4030_dapm_micpathtx1_control, micpath_event,
  1105. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
  1106. SND_SOC_DAPM_POST_REG),
  1107. SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
  1108. &twl4030_dapm_micpathtx2_control, micpath_event,
  1109. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
  1110. SND_SOC_DAPM_POST_REG),
  1111. /* Analog input mixers for the capture amplifiers */
  1112. SND_SOC_DAPM_MIXER("Analog Left Capture Route",
  1113. TWL4030_REG_ANAMICL, 4, 0,
  1114. &twl4030_dapm_analoglmic_controls[0],
  1115. ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
  1116. SND_SOC_DAPM_MIXER("Analog Right Capture Route",
  1117. TWL4030_REG_ANAMICR, 4, 0,
  1118. &twl4030_dapm_analogrmic_controls[0],
  1119. ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
  1120. SND_SOC_DAPM_PGA("ADC Physical Left",
  1121. TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
  1122. SND_SOC_DAPM_PGA("ADC Physical Right",
  1123. TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
  1124. SND_SOC_DAPM_PGA("Digimic0 Enable",
  1125. TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
  1126. SND_SOC_DAPM_PGA("Digimic1 Enable",
  1127. TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
  1128. SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
  1129. SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
  1130. SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
  1131. };
  1132. static const struct snd_soc_dapm_route intercon[] = {
  1133. {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
  1134. {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
  1135. {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
  1136. {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
  1137. {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
  1138. {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
  1139. {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
  1140. {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
  1141. {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
  1142. {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
  1143. /* Internal playback routings */
  1144. /* Earpiece */
  1145. {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
  1146. {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1147. {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1148. {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1149. /* PreDrivL */
  1150. {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1151. {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1152. {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1153. {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1154. /* PreDrivR */
  1155. {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1156. {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1157. {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1158. {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1159. /* HeadsetL */
  1160. {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1161. {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1162. {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1163. {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
  1164. /* HeadsetR */
  1165. {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1166. {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1167. {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1168. {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
  1169. /* CarkitL */
  1170. {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1171. {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1172. {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1173. /* CarkitR */
  1174. {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1175. {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1176. {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1177. /* HandsfreeL */
  1178. {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
  1179. {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
  1180. {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1181. {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1182. {"HandsfreeL Switch", "Switch", "HandsfreeL Mux"},
  1183. {"HandsfreeL PGA", NULL, "HandsfreeL Switch"},
  1184. /* HandsfreeR */
  1185. {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
  1186. {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
  1187. {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1188. {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1189. {"HandsfreeR Switch", "Switch", "HandsfreeR Mux"},
  1190. {"HandsfreeR PGA", NULL, "HandsfreeR Switch"},
  1191. /* Vibra */
  1192. {"Vibra Mux", "AudioL1", "DAC Left1"},
  1193. {"Vibra Mux", "AudioR1", "DAC Right1"},
  1194. {"Vibra Mux", "AudioL2", "DAC Left2"},
  1195. {"Vibra Mux", "AudioR2", "DAC Right2"},
  1196. /* outputs */
  1197. {"OUTL", NULL, "Analog L2 Playback Mixer"},
  1198. {"OUTR", NULL, "Analog R2 Playback Mixer"},
  1199. {"EARPIECE", NULL, "Earpiece Mixer"},
  1200. {"PREDRIVEL", NULL, "PredriveL Mixer"},
  1201. {"PREDRIVER", NULL, "PredriveR Mixer"},
  1202. {"HSOL", NULL, "HeadsetL PGA"},
  1203. {"HSOR", NULL, "HeadsetR PGA"},
  1204. {"CARKITL", NULL, "CarkitL Mixer"},
  1205. {"CARKITR", NULL, "CarkitR Mixer"},
  1206. {"HFL", NULL, "HandsfreeL PGA"},
  1207. {"HFR", NULL, "HandsfreeR PGA"},
  1208. {"Vibra Route", "Audio", "Vibra Mux"},
  1209. {"VIBRA", NULL, "Vibra Route"},
  1210. /* Capture path */
  1211. {"Analog Left Capture Route", "Main mic", "MAINMIC"},
  1212. {"Analog Left Capture Route", "Headset mic", "HSMIC"},
  1213. {"Analog Left Capture Route", "AUXL", "AUXL"},
  1214. {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
  1215. {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
  1216. {"Analog Right Capture Route", "AUXR", "AUXR"},
  1217. {"ADC Physical Left", NULL, "Analog Left Capture Route"},
  1218. {"ADC Physical Right", NULL, "Analog Right Capture Route"},
  1219. {"Digimic0 Enable", NULL, "DIGIMIC0"},
  1220. {"Digimic1 Enable", NULL, "DIGIMIC1"},
  1221. /* TX1 Left capture path */
  1222. {"TX1 Capture Route", "Analog", "ADC Physical Left"},
  1223. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1224. /* TX1 Right capture path */
  1225. {"TX1 Capture Route", "Analog", "ADC Physical Right"},
  1226. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1227. /* TX2 Left capture path */
  1228. {"TX2 Capture Route", "Analog", "ADC Physical Left"},
  1229. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1230. /* TX2 Right capture path */
  1231. {"TX2 Capture Route", "Analog", "ADC Physical Right"},
  1232. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1233. {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
  1234. {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
  1235. {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
  1236. {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
  1237. /* Analog bypass routes */
  1238. {"Right1 Analog Loopback", "Switch", "Analog Right Capture Route"},
  1239. {"Left1 Analog Loopback", "Switch", "Analog Left Capture Route"},
  1240. {"Right2 Analog Loopback", "Switch", "Analog Right Capture Route"},
  1241. {"Left2 Analog Loopback", "Switch", "Analog Left Capture Route"},
  1242. {"Voice Analog Loopback", "Switch", "Analog Left Capture Route"},
  1243. {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
  1244. {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
  1245. {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
  1246. {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
  1247. {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
  1248. /* Digital bypass routes */
  1249. {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
  1250. {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
  1251. {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
  1252. {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
  1253. {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
  1254. {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
  1255. };
  1256. static int twl4030_add_widgets(struct snd_soc_codec *codec)
  1257. {
  1258. snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
  1259. ARRAY_SIZE(twl4030_dapm_widgets));
  1260. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  1261. snd_soc_dapm_new_widgets(codec);
  1262. return 0;
  1263. }
  1264. static int twl4030_set_bias_level(struct snd_soc_codec *codec,
  1265. enum snd_soc_bias_level level)
  1266. {
  1267. struct twl4030_priv *twl4030 = codec->private_data;
  1268. switch (level) {
  1269. case SND_SOC_BIAS_ON:
  1270. twl4030_codec_mute(codec, 0);
  1271. break;
  1272. case SND_SOC_BIAS_PREPARE:
  1273. twl4030_power_up(codec);
  1274. if (twl4030->bypass_state)
  1275. twl4030_codec_mute(codec, 0);
  1276. else
  1277. twl4030_codec_mute(codec, 1);
  1278. break;
  1279. case SND_SOC_BIAS_STANDBY:
  1280. twl4030_power_up(codec);
  1281. if (twl4030->bypass_state)
  1282. twl4030_codec_mute(codec, 0);
  1283. else
  1284. twl4030_codec_mute(codec, 1);
  1285. break;
  1286. case SND_SOC_BIAS_OFF:
  1287. twl4030_power_down(codec);
  1288. break;
  1289. }
  1290. codec->bias_level = level;
  1291. return 0;
  1292. }
  1293. static void twl4030_constraints(struct twl4030_priv *twl4030,
  1294. struct snd_pcm_substream *mst_substream)
  1295. {
  1296. struct snd_pcm_substream *slv_substream;
  1297. /* Pick the stream, which need to be constrained */
  1298. if (mst_substream == twl4030->master_substream)
  1299. slv_substream = twl4030->slave_substream;
  1300. else if (mst_substream == twl4030->slave_substream)
  1301. slv_substream = twl4030->master_substream;
  1302. else /* This should not happen.. */
  1303. return;
  1304. /* Set the constraints according to the already configured stream */
  1305. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1306. SNDRV_PCM_HW_PARAM_RATE,
  1307. twl4030->rate,
  1308. twl4030->rate);
  1309. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1310. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  1311. twl4030->sample_bits,
  1312. twl4030->sample_bits);
  1313. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1314. SNDRV_PCM_HW_PARAM_CHANNELS,
  1315. twl4030->channels,
  1316. twl4030->channels);
  1317. }
  1318. /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
  1319. * capture has to be enabled/disabled. */
  1320. static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
  1321. int enable)
  1322. {
  1323. u8 reg, mask;
  1324. reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
  1325. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1326. mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
  1327. else
  1328. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1329. if (enable)
  1330. reg |= mask;
  1331. else
  1332. reg &= ~mask;
  1333. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1334. }
  1335. static int twl4030_startup(struct snd_pcm_substream *substream,
  1336. struct snd_soc_dai *dai)
  1337. {
  1338. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1339. struct snd_soc_device *socdev = rtd->socdev;
  1340. struct snd_soc_codec *codec = socdev->card->codec;
  1341. struct twl4030_priv *twl4030 = codec->private_data;
  1342. if (twl4030->master_substream) {
  1343. twl4030->slave_substream = substream;
  1344. /* The DAI has one configuration for playback and capture, so
  1345. * if the DAI has been already configured then constrain this
  1346. * substream to match it. */
  1347. if (twl4030->configured)
  1348. twl4030_constraints(twl4030, twl4030->master_substream);
  1349. } else {
  1350. if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
  1351. TWL4030_OPTION_1)) {
  1352. /* In option2 4 channel is not supported, set the
  1353. * constraint for the first stream for channels, the
  1354. * second stream will 'inherit' this cosntraint */
  1355. snd_pcm_hw_constraint_minmax(substream->runtime,
  1356. SNDRV_PCM_HW_PARAM_CHANNELS,
  1357. 2, 2);
  1358. }
  1359. twl4030->master_substream = substream;
  1360. }
  1361. return 0;
  1362. }
  1363. static void twl4030_shutdown(struct snd_pcm_substream *substream,
  1364. struct snd_soc_dai *dai)
  1365. {
  1366. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1367. struct snd_soc_device *socdev = rtd->socdev;
  1368. struct snd_soc_codec *codec = socdev->card->codec;
  1369. struct twl4030_priv *twl4030 = codec->private_data;
  1370. if (twl4030->master_substream == substream)
  1371. twl4030->master_substream = twl4030->slave_substream;
  1372. twl4030->slave_substream = NULL;
  1373. /* If all streams are closed, or the remaining stream has not yet
  1374. * been configured than set the DAI as not configured. */
  1375. if (!twl4030->master_substream)
  1376. twl4030->configured = 0;
  1377. else if (!twl4030->master_substream->runtime->channels)
  1378. twl4030->configured = 0;
  1379. /* If the closing substream had 4 channel, do the necessary cleanup */
  1380. if (substream->runtime->channels == 4)
  1381. twl4030_tdm_enable(codec, substream->stream, 0);
  1382. }
  1383. static int twl4030_hw_params(struct snd_pcm_substream *substream,
  1384. struct snd_pcm_hw_params *params,
  1385. struct snd_soc_dai *dai)
  1386. {
  1387. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1388. struct snd_soc_device *socdev = rtd->socdev;
  1389. struct snd_soc_codec *codec = socdev->card->codec;
  1390. struct twl4030_priv *twl4030 = codec->private_data;
  1391. u8 mode, old_mode, format, old_format;
  1392. /* If the substream has 4 channel, do the necessary setup */
  1393. if (params_channels(params) == 4) {
  1394. u8 format, mode;
  1395. format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1396. mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
  1397. /* Safety check: are we in the correct operating mode and
  1398. * the interface is in TDM mode? */
  1399. if ((mode & TWL4030_OPTION_1) &&
  1400. ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
  1401. twl4030_tdm_enable(codec, substream->stream, 1);
  1402. else
  1403. return -EINVAL;
  1404. }
  1405. if (twl4030->configured)
  1406. /* Ignoring hw_params for already configured DAI */
  1407. return 0;
  1408. /* bit rate */
  1409. old_mode = twl4030_read_reg_cache(codec,
  1410. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1411. mode = old_mode & ~TWL4030_APLL_RATE;
  1412. switch (params_rate(params)) {
  1413. case 8000:
  1414. mode |= TWL4030_APLL_RATE_8000;
  1415. break;
  1416. case 11025:
  1417. mode |= TWL4030_APLL_RATE_11025;
  1418. break;
  1419. case 12000:
  1420. mode |= TWL4030_APLL_RATE_12000;
  1421. break;
  1422. case 16000:
  1423. mode |= TWL4030_APLL_RATE_16000;
  1424. break;
  1425. case 22050:
  1426. mode |= TWL4030_APLL_RATE_22050;
  1427. break;
  1428. case 24000:
  1429. mode |= TWL4030_APLL_RATE_24000;
  1430. break;
  1431. case 32000:
  1432. mode |= TWL4030_APLL_RATE_32000;
  1433. break;
  1434. case 44100:
  1435. mode |= TWL4030_APLL_RATE_44100;
  1436. break;
  1437. case 48000:
  1438. mode |= TWL4030_APLL_RATE_48000;
  1439. break;
  1440. case 96000:
  1441. mode |= TWL4030_APLL_RATE_96000;
  1442. break;
  1443. default:
  1444. printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
  1445. params_rate(params));
  1446. return -EINVAL;
  1447. }
  1448. if (mode != old_mode) {
  1449. /* change rate and set CODECPDZ */
  1450. twl4030_codec_enable(codec, 0);
  1451. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1452. twl4030_codec_enable(codec, 1);
  1453. }
  1454. /* sample size */
  1455. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1456. format = old_format;
  1457. format &= ~TWL4030_DATA_WIDTH;
  1458. switch (params_format(params)) {
  1459. case SNDRV_PCM_FORMAT_S16_LE:
  1460. format |= TWL4030_DATA_WIDTH_16S_16W;
  1461. break;
  1462. case SNDRV_PCM_FORMAT_S24_LE:
  1463. format |= TWL4030_DATA_WIDTH_32S_24W;
  1464. break;
  1465. default:
  1466. printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
  1467. params_format(params));
  1468. return -EINVAL;
  1469. }
  1470. if (format != old_format) {
  1471. /* clear CODECPDZ before changing format (codec requirement) */
  1472. twl4030_codec_enable(codec, 0);
  1473. /* change format */
  1474. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1475. /* set CODECPDZ afterwards */
  1476. twl4030_codec_enable(codec, 1);
  1477. }
  1478. /* Store the important parameters for the DAI configuration and set
  1479. * the DAI as configured */
  1480. twl4030->configured = 1;
  1481. twl4030->rate = params_rate(params);
  1482. twl4030->sample_bits = hw_param_interval(params,
  1483. SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
  1484. twl4030->channels = params_channels(params);
  1485. /* If both playback and capture streams are open, and one of them
  1486. * is setting the hw parameters right now (since we are here), set
  1487. * constraints to the other stream to match the current one. */
  1488. if (twl4030->slave_substream)
  1489. twl4030_constraints(twl4030, substream);
  1490. return 0;
  1491. }
  1492. static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1493. int clk_id, unsigned int freq, int dir)
  1494. {
  1495. struct snd_soc_codec *codec = codec_dai->codec;
  1496. struct twl4030_priv *twl4030 = codec->private_data;
  1497. u8 infreq;
  1498. switch (freq) {
  1499. case 19200000:
  1500. infreq = TWL4030_APLL_INFREQ_19200KHZ;
  1501. twl4030->sysclk = 19200;
  1502. break;
  1503. case 26000000:
  1504. infreq = TWL4030_APLL_INFREQ_26000KHZ;
  1505. twl4030->sysclk = 26000;
  1506. break;
  1507. case 38400000:
  1508. infreq = TWL4030_APLL_INFREQ_38400KHZ;
  1509. twl4030->sysclk = 38400;
  1510. break;
  1511. default:
  1512. printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n",
  1513. freq);
  1514. return -EINVAL;
  1515. }
  1516. infreq |= TWL4030_APLL_EN;
  1517. twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
  1518. return 0;
  1519. }
  1520. static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1521. unsigned int fmt)
  1522. {
  1523. struct snd_soc_codec *codec = codec_dai->codec;
  1524. u8 old_format, format;
  1525. /* get format */
  1526. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1527. format = old_format;
  1528. /* set master/slave audio interface */
  1529. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1530. case SND_SOC_DAIFMT_CBM_CFM:
  1531. format &= ~(TWL4030_AIF_SLAVE_EN);
  1532. format &= ~(TWL4030_CLK256FS_EN);
  1533. break;
  1534. case SND_SOC_DAIFMT_CBS_CFS:
  1535. format |= TWL4030_AIF_SLAVE_EN;
  1536. format |= TWL4030_CLK256FS_EN;
  1537. break;
  1538. default:
  1539. return -EINVAL;
  1540. }
  1541. /* interface format */
  1542. format &= ~TWL4030_AIF_FORMAT;
  1543. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1544. case SND_SOC_DAIFMT_I2S:
  1545. format |= TWL4030_AIF_FORMAT_CODEC;
  1546. break;
  1547. case SND_SOC_DAIFMT_DSP_A:
  1548. format |= TWL4030_AIF_FORMAT_TDM;
  1549. break;
  1550. default:
  1551. return -EINVAL;
  1552. }
  1553. if (format != old_format) {
  1554. /* clear CODECPDZ before changing format (codec requirement) */
  1555. twl4030_codec_enable(codec, 0);
  1556. /* change format */
  1557. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1558. /* set CODECPDZ afterwards */
  1559. twl4030_codec_enable(codec, 1);
  1560. }
  1561. return 0;
  1562. }
  1563. /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
  1564. * (VTXL, VTXR) for uplink has to be enabled/disabled. */
  1565. static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
  1566. int enable)
  1567. {
  1568. u8 reg, mask;
  1569. reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
  1570. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1571. mask = TWL4030_ARXL1_VRX_EN;
  1572. else
  1573. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1574. if (enable)
  1575. reg |= mask;
  1576. else
  1577. reg &= ~mask;
  1578. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1579. }
  1580. static int twl4030_voice_startup(struct snd_pcm_substream *substream,
  1581. struct snd_soc_dai *dai)
  1582. {
  1583. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1584. struct snd_soc_device *socdev = rtd->socdev;
  1585. struct snd_soc_codec *codec = socdev->card->codec;
  1586. u8 infreq;
  1587. u8 mode;
  1588. /* If the system master clock is not 26MHz, the voice PCM interface is
  1589. * not avilable.
  1590. */
  1591. infreq = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL)
  1592. & TWL4030_APLL_INFREQ;
  1593. if (infreq != TWL4030_APLL_INFREQ_26000KHZ) {
  1594. printk(KERN_ERR "TWL4030 voice startup: "
  1595. "MCLK is not 26MHz, call set_sysclk() on init\n");
  1596. return -EINVAL;
  1597. }
  1598. /* If the codec mode is not option2, the voice PCM interface is not
  1599. * avilable.
  1600. */
  1601. mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
  1602. & TWL4030_OPT_MODE;
  1603. if (mode != TWL4030_OPTION_2) {
  1604. printk(KERN_ERR "TWL4030 voice startup: "
  1605. "the codec mode is not option2\n");
  1606. return -EINVAL;
  1607. }
  1608. return 0;
  1609. }
  1610. static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
  1611. struct snd_soc_dai *dai)
  1612. {
  1613. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1614. struct snd_soc_device *socdev = rtd->socdev;
  1615. struct snd_soc_codec *codec = socdev->card->codec;
  1616. /* Enable voice digital filters */
  1617. twl4030_voice_enable(codec, substream->stream, 0);
  1618. }
  1619. static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
  1620. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  1621. {
  1622. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1623. struct snd_soc_device *socdev = rtd->socdev;
  1624. struct snd_soc_codec *codec = socdev->card->codec;
  1625. u8 old_mode, mode;
  1626. /* Enable voice digital filters */
  1627. twl4030_voice_enable(codec, substream->stream, 1);
  1628. /* bit rate */
  1629. old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
  1630. & ~(TWL4030_CODECPDZ);
  1631. mode = old_mode;
  1632. switch (params_rate(params)) {
  1633. case 8000:
  1634. mode &= ~(TWL4030_SEL_16K);
  1635. break;
  1636. case 16000:
  1637. mode |= TWL4030_SEL_16K;
  1638. break;
  1639. default:
  1640. printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
  1641. params_rate(params));
  1642. return -EINVAL;
  1643. }
  1644. if (mode != old_mode) {
  1645. /* change rate and set CODECPDZ */
  1646. twl4030_codec_enable(codec, 0);
  1647. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1648. twl4030_codec_enable(codec, 1);
  1649. }
  1650. return 0;
  1651. }
  1652. static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1653. int clk_id, unsigned int freq, int dir)
  1654. {
  1655. struct snd_soc_codec *codec = codec_dai->codec;
  1656. u8 infreq;
  1657. switch (freq) {
  1658. case 26000000:
  1659. infreq = TWL4030_APLL_INFREQ_26000KHZ;
  1660. break;
  1661. default:
  1662. printk(KERN_ERR "TWL4030 voice set sysclk: unknown rate %d\n",
  1663. freq);
  1664. return -EINVAL;
  1665. }
  1666. infreq |= TWL4030_APLL_EN;
  1667. twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
  1668. return 0;
  1669. }
  1670. static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1671. unsigned int fmt)
  1672. {
  1673. struct snd_soc_codec *codec = codec_dai->codec;
  1674. u8 old_format, format;
  1675. /* get format */
  1676. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
  1677. format = old_format;
  1678. /* set master/slave audio interface */
  1679. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1680. case SND_SOC_DAIFMT_CBS_CFM:
  1681. format &= ~(TWL4030_VIF_SLAVE_EN);
  1682. break;
  1683. case SND_SOC_DAIFMT_CBS_CFS:
  1684. format |= TWL4030_VIF_SLAVE_EN;
  1685. break;
  1686. default:
  1687. return -EINVAL;
  1688. }
  1689. /* clock inversion */
  1690. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1691. case SND_SOC_DAIFMT_IB_NF:
  1692. format &= ~(TWL4030_VIF_FORMAT);
  1693. break;
  1694. case SND_SOC_DAIFMT_NB_IF:
  1695. format |= TWL4030_VIF_FORMAT;
  1696. break;
  1697. default:
  1698. return -EINVAL;
  1699. }
  1700. if (format != old_format) {
  1701. /* change format and set CODECPDZ */
  1702. twl4030_codec_enable(codec, 0);
  1703. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1704. twl4030_codec_enable(codec, 1);
  1705. }
  1706. return 0;
  1707. }
  1708. #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
  1709. #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
  1710. static struct snd_soc_dai_ops twl4030_dai_ops = {
  1711. .startup = twl4030_startup,
  1712. .shutdown = twl4030_shutdown,
  1713. .hw_params = twl4030_hw_params,
  1714. .set_sysclk = twl4030_set_dai_sysclk,
  1715. .set_fmt = twl4030_set_dai_fmt,
  1716. };
  1717. static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
  1718. .startup = twl4030_voice_startup,
  1719. .shutdown = twl4030_voice_shutdown,
  1720. .hw_params = twl4030_voice_hw_params,
  1721. .set_sysclk = twl4030_voice_set_dai_sysclk,
  1722. .set_fmt = twl4030_voice_set_dai_fmt,
  1723. };
  1724. struct snd_soc_dai twl4030_dai[] = {
  1725. {
  1726. .name = "twl4030",
  1727. .playback = {
  1728. .stream_name = "HiFi Playback",
  1729. .channels_min = 2,
  1730. .channels_max = 4,
  1731. .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
  1732. .formats = TWL4030_FORMATS,},
  1733. .capture = {
  1734. .stream_name = "Capture",
  1735. .channels_min = 2,
  1736. .channels_max = 4,
  1737. .rates = TWL4030_RATES,
  1738. .formats = TWL4030_FORMATS,},
  1739. .ops = &twl4030_dai_ops,
  1740. },
  1741. {
  1742. .name = "twl4030 Voice",
  1743. .playback = {
  1744. .stream_name = "Voice Playback",
  1745. .channels_min = 1,
  1746. .channels_max = 1,
  1747. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1748. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1749. .capture = {
  1750. .stream_name = "Capture",
  1751. .channels_min = 1,
  1752. .channels_max = 2,
  1753. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1754. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1755. .ops = &twl4030_dai_voice_ops,
  1756. },
  1757. };
  1758. EXPORT_SYMBOL_GPL(twl4030_dai);
  1759. static int twl4030_suspend(struct platform_device *pdev, pm_message_t state)
  1760. {
  1761. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1762. struct snd_soc_codec *codec = socdev->card->codec;
  1763. twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1764. return 0;
  1765. }
  1766. static int twl4030_resume(struct platform_device *pdev)
  1767. {
  1768. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1769. struct snd_soc_codec *codec = socdev->card->codec;
  1770. twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1771. twl4030_set_bias_level(codec, codec->suspend_bias_level);
  1772. return 0;
  1773. }
  1774. /*
  1775. * initialize the driver
  1776. * register the mixer and dsp interfaces with the kernel
  1777. */
  1778. static int twl4030_init(struct snd_soc_device *socdev)
  1779. {
  1780. struct snd_soc_codec *codec = socdev->card->codec;
  1781. struct twl4030_setup_data *setup = socdev->codec_data;
  1782. struct twl4030_priv *twl4030 = codec->private_data;
  1783. int ret = 0;
  1784. printk(KERN_INFO "TWL4030 Audio Codec init \n");
  1785. codec->name = "twl4030";
  1786. codec->owner = THIS_MODULE;
  1787. codec->read = twl4030_read_reg_cache;
  1788. codec->write = twl4030_write;
  1789. codec->set_bias_level = twl4030_set_bias_level;
  1790. codec->dai = twl4030_dai;
  1791. codec->num_dai = ARRAY_SIZE(twl4030_dai),
  1792. codec->reg_cache_size = sizeof(twl4030_reg);
  1793. codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
  1794. GFP_KERNEL);
  1795. if (codec->reg_cache == NULL)
  1796. return -ENOMEM;
  1797. /* Configuration for headset ramp delay from setup data */
  1798. if (setup) {
  1799. unsigned char hs_pop;
  1800. if (setup->sysclk)
  1801. twl4030->sysclk = setup->sysclk;
  1802. else
  1803. twl4030->sysclk = 26000;
  1804. hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
  1805. hs_pop &= ~TWL4030_RAMP_DELAY;
  1806. hs_pop |= (setup->ramp_delay_value << 2);
  1807. twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  1808. } else {
  1809. twl4030->sysclk = 26000;
  1810. }
  1811. /* register pcms */
  1812. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  1813. if (ret < 0) {
  1814. printk(KERN_ERR "twl4030: failed to create pcms\n");
  1815. goto pcm_err;
  1816. }
  1817. twl4030_init_chip(codec);
  1818. /* power on device */
  1819. twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1820. snd_soc_add_controls(codec, twl4030_snd_controls,
  1821. ARRAY_SIZE(twl4030_snd_controls));
  1822. twl4030_add_widgets(codec);
  1823. ret = snd_soc_init_card(socdev);
  1824. if (ret < 0) {
  1825. printk(KERN_ERR "twl4030: failed to register card\n");
  1826. goto card_err;
  1827. }
  1828. return ret;
  1829. card_err:
  1830. snd_soc_free_pcms(socdev);
  1831. snd_soc_dapm_free(socdev);
  1832. pcm_err:
  1833. kfree(codec->reg_cache);
  1834. return ret;
  1835. }
  1836. static struct snd_soc_device *twl4030_socdev;
  1837. static int twl4030_probe(struct platform_device *pdev)
  1838. {
  1839. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1840. struct snd_soc_codec *codec;
  1841. struct twl4030_priv *twl4030;
  1842. codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
  1843. if (codec == NULL)
  1844. return -ENOMEM;
  1845. twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
  1846. if (twl4030 == NULL) {
  1847. kfree(codec);
  1848. return -ENOMEM;
  1849. }
  1850. codec->private_data = twl4030;
  1851. socdev->card->codec = codec;
  1852. mutex_init(&codec->mutex);
  1853. INIT_LIST_HEAD(&codec->dapm_widgets);
  1854. INIT_LIST_HEAD(&codec->dapm_paths);
  1855. twl4030_socdev = socdev;
  1856. twl4030_init(socdev);
  1857. return 0;
  1858. }
  1859. static int twl4030_remove(struct platform_device *pdev)
  1860. {
  1861. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1862. struct snd_soc_codec *codec = socdev->card->codec;
  1863. printk(KERN_INFO "TWL4030 Audio Codec remove\n");
  1864. twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1865. snd_soc_free_pcms(socdev);
  1866. snd_soc_dapm_free(socdev);
  1867. kfree(codec->private_data);
  1868. kfree(codec);
  1869. return 0;
  1870. }
  1871. struct snd_soc_codec_device soc_codec_dev_twl4030 = {
  1872. .probe = twl4030_probe,
  1873. .remove = twl4030_remove,
  1874. .suspend = twl4030_suspend,
  1875. .resume = twl4030_resume,
  1876. };
  1877. EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
  1878. static int __init twl4030_modinit(void)
  1879. {
  1880. return snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
  1881. }
  1882. module_init(twl4030_modinit);
  1883. static void __exit twl4030_exit(void)
  1884. {
  1885. snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
  1886. }
  1887. module_exit(twl4030_exit);
  1888. MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
  1889. MODULE_AUTHOR("Steve Sakoman");
  1890. MODULE_LICENSE("GPL");