ice1724.c 73 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "maya44.h"
  49. #include "phase.h"
  50. #include "wtm.h"
  51. #include "se.h"
  52. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  53. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  54. MODULE_LICENSE("GPL");
  55. MODULE_SUPPORTED_DEVICE("{"
  56. REVO_DEVICE_DESC
  57. AMP_AUDIO2000_DEVICE_DESC
  58. AUREON_DEVICE_DESC
  59. VT1720_MOBO_DEVICE_DESC
  60. PONTIS_DEVICE_DESC
  61. PRODIGY192_DEVICE_DESC
  62. PRODIGY_HIFI_DEVICE_DESC
  63. JULI_DEVICE_DESC
  64. MAYA44_DEVICE_DESC
  65. PHASE_DEVICE_DESC
  66. WTM_DEVICE_DESC
  67. SE_DEVICE_DESC
  68. "{VIA,VT1720},"
  69. "{VIA,VT1724},"
  70. "{ICEnsemble,Generic ICE1724},"
  71. "{ICEnsemble,Generic Envy24HT}"
  72. "{ICEnsemble,Generic Envy24PT}}");
  73. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  74. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  75. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  76. static char *model[SNDRV_CARDS];
  77. module_param_array(index, int, NULL, 0444);
  78. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  79. module_param_array(id, charp, NULL, 0444);
  80. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  81. module_param_array(enable, bool, NULL, 0444);
  82. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  83. module_param_array(model, charp, NULL, 0444);
  84. MODULE_PARM_DESC(model, "Use the given board model.");
  85. /* Both VT1720 and VT1724 have the same PCI IDs */
  86. static const struct pci_device_id snd_vt1724_ids[] = {
  87. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  88. { 0, }
  89. };
  90. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  91. static int PRO_RATE_LOCKED;
  92. static int PRO_RATE_RESET = 1;
  93. static unsigned int PRO_RATE_DEFAULT = 44100;
  94. /*
  95. * Basic I/O
  96. */
  97. /*
  98. * default rates, default clock routines
  99. */
  100. /* check whether the clock mode is spdif-in */
  101. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  102. {
  103. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  104. }
  105. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  106. {
  107. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  108. }
  109. /*
  110. * ac97 section
  111. */
  112. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  113. {
  114. unsigned char old_cmd;
  115. int tm;
  116. for (tm = 0; tm < 0x10000; tm++) {
  117. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  118. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  119. continue;
  120. if (!(old_cmd & VT1724_AC97_READY))
  121. continue;
  122. return old_cmd;
  123. }
  124. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  125. return old_cmd;
  126. }
  127. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  128. {
  129. int tm;
  130. for (tm = 0; tm < 0x10000; tm++)
  131. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  132. return 0;
  133. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  134. return -EIO;
  135. }
  136. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  137. unsigned short reg,
  138. unsigned short val)
  139. {
  140. struct snd_ice1712 *ice = ac97->private_data;
  141. unsigned char old_cmd;
  142. old_cmd = snd_vt1724_ac97_ready(ice);
  143. old_cmd &= ~VT1724_AC97_ID_MASK;
  144. old_cmd |= ac97->num;
  145. outb(reg, ICEMT1724(ice, AC97_INDEX));
  146. outw(val, ICEMT1724(ice, AC97_DATA));
  147. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  148. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  149. }
  150. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  151. {
  152. struct snd_ice1712 *ice = ac97->private_data;
  153. unsigned char old_cmd;
  154. old_cmd = snd_vt1724_ac97_ready(ice);
  155. old_cmd &= ~VT1724_AC97_ID_MASK;
  156. old_cmd |= ac97->num;
  157. outb(reg, ICEMT1724(ice, AC97_INDEX));
  158. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  159. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  160. return ~0;
  161. return inw(ICEMT1724(ice, AC97_DATA));
  162. }
  163. /*
  164. * GPIO operations
  165. */
  166. /* set gpio direction 0 = read, 1 = write */
  167. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  168. {
  169. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  170. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  171. }
  172. /* set the gpio mask (0 = writable) */
  173. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  174. {
  175. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  176. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  177. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  178. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  179. }
  180. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  181. {
  182. outw(data, ICEREG1724(ice, GPIO_DATA));
  183. if (!ice->vt1720)
  184. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  185. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  186. }
  187. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  188. {
  189. unsigned int data;
  190. if (!ice->vt1720)
  191. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  192. else
  193. data = 0;
  194. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  195. return data;
  196. }
  197. /*
  198. * MIDI
  199. */
  200. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  201. {
  202. unsigned int count;
  203. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  204. inb(ICEREG1724(ice, MPU_DATA));
  205. }
  206. static inline struct snd_rawmidi_substream *
  207. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  208. {
  209. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  210. struct snd_rawmidi_substream, list);
  211. }
  212. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
  213. static void vt1724_midi_write(struct snd_ice1712 *ice)
  214. {
  215. struct snd_rawmidi_substream *s;
  216. int count, i;
  217. u8 buffer[32];
  218. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  219. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  220. if (count > 0) {
  221. count = snd_rawmidi_transmit(s, buffer, count);
  222. for (i = 0; i < count; ++i)
  223. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  224. }
  225. /* mask irq when all bytes have been transmitted.
  226. * enabled again in output_trigger when the new data comes in.
  227. */
  228. enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
  229. !snd_rawmidi_transmit_empty(s));
  230. }
  231. static void vt1724_midi_read(struct snd_ice1712 *ice)
  232. {
  233. struct snd_rawmidi_substream *s;
  234. int count, i;
  235. u8 buffer[32];
  236. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  237. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  238. if (count > 0) {
  239. count = min(count, 32);
  240. for (i = 0; i < count; ++i)
  241. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  242. snd_rawmidi_receive(s, buffer, count);
  243. }
  244. }
  245. /* call with ice->reg_lock */
  246. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
  247. {
  248. u8 mask = inb(ICEREG1724(ice, IRQMASK));
  249. if (enable)
  250. mask &= ~flag;
  251. else
  252. mask |= flag;
  253. outb(mask, ICEREG1724(ice, IRQMASK));
  254. }
  255. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  256. u8 flag, int enable)
  257. {
  258. struct snd_ice1712 *ice = substream->rmidi->private_data;
  259. spin_lock_irq(&ice->reg_lock);
  260. enable_midi_irq(ice, flag, enable);
  261. spin_unlock_irq(&ice->reg_lock);
  262. }
  263. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  264. {
  265. return 0;
  266. }
  267. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  268. {
  269. return 0;
  270. }
  271. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  272. {
  273. struct snd_ice1712 *ice = s->rmidi->private_data;
  274. unsigned long flags;
  275. spin_lock_irqsave(&ice->reg_lock, flags);
  276. if (up) {
  277. ice->midi_output = 1;
  278. vt1724_midi_write(ice);
  279. } else {
  280. ice->midi_output = 0;
  281. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  282. }
  283. spin_unlock_irqrestore(&ice->reg_lock, flags);
  284. }
  285. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  286. {
  287. struct snd_ice1712 *ice = s->rmidi->private_data;
  288. unsigned long timeout;
  289. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  290. /* 32 bytes should be transmitted in less than about 12 ms */
  291. timeout = jiffies + msecs_to_jiffies(15);
  292. do {
  293. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  294. break;
  295. schedule_timeout_uninterruptible(1);
  296. } while (time_after(timeout, jiffies));
  297. }
  298. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  299. .open = vt1724_midi_output_open,
  300. .close = vt1724_midi_output_close,
  301. .trigger = vt1724_midi_output_trigger,
  302. .drain = vt1724_midi_output_drain,
  303. };
  304. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  305. {
  306. vt1724_midi_clear_rx(s->rmidi->private_data);
  307. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  308. return 0;
  309. }
  310. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  311. {
  312. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  313. return 0;
  314. }
  315. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  316. {
  317. struct snd_ice1712 *ice = s->rmidi->private_data;
  318. unsigned long flags;
  319. spin_lock_irqsave(&ice->reg_lock, flags);
  320. if (up) {
  321. ice->midi_input = 1;
  322. vt1724_midi_read(ice);
  323. } else {
  324. ice->midi_input = 0;
  325. }
  326. spin_unlock_irqrestore(&ice->reg_lock, flags);
  327. }
  328. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  329. .open = vt1724_midi_input_open,
  330. .close = vt1724_midi_input_close,
  331. .trigger = vt1724_midi_input_trigger,
  332. };
  333. /*
  334. * Interrupt handler
  335. */
  336. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  337. {
  338. struct snd_ice1712 *ice = dev_id;
  339. unsigned char status;
  340. unsigned char status_mask =
  341. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  342. int handled = 0;
  343. int timeout = 0;
  344. while (1) {
  345. status = inb(ICEREG1724(ice, IRQSTAT));
  346. status &= status_mask;
  347. if (status == 0)
  348. break;
  349. spin_lock(&ice->reg_lock);
  350. if (++timeout > 10) {
  351. status = inb(ICEREG1724(ice, IRQSTAT));
  352. printk(KERN_ERR "ice1724: Too long irq loop, "
  353. "status = 0x%x\n", status);
  354. if (status & VT1724_IRQ_MPU_TX) {
  355. printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
  356. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  357. }
  358. spin_unlock(&ice->reg_lock);
  359. break;
  360. }
  361. handled = 1;
  362. if (status & VT1724_IRQ_MPU_TX) {
  363. if (ice->midi_output)
  364. vt1724_midi_write(ice);
  365. else
  366. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  367. /* Due to mysterical reasons, MPU_TX is always
  368. * generated (and can't be cleared) when a PCM
  369. * playback is going. So let's ignore at the
  370. * next loop.
  371. */
  372. status_mask &= ~VT1724_IRQ_MPU_TX;
  373. }
  374. if (status & VT1724_IRQ_MPU_RX) {
  375. if (ice->midi_input)
  376. vt1724_midi_read(ice);
  377. else
  378. vt1724_midi_clear_rx(ice);
  379. }
  380. /* ack MPU irq */
  381. outb(status, ICEREG1724(ice, IRQSTAT));
  382. spin_unlock(&ice->reg_lock);
  383. if (status & VT1724_IRQ_MTPCM) {
  384. /*
  385. * Multi-track PCM
  386. * PCM assignment are:
  387. * Playback DMA0 (M/C) = playback_pro_substream
  388. * Playback DMA1 = playback_con_substream_ds[0]
  389. * Playback DMA2 = playback_con_substream_ds[1]
  390. * Playback DMA3 = playback_con_substream_ds[2]
  391. * Playback DMA4 (SPDIF) = playback_con_substream
  392. * Record DMA0 = capture_pro_substream
  393. * Record DMA1 = capture_con_substream
  394. */
  395. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  396. if (mtstat & VT1724_MULTI_PDMA0) {
  397. if (ice->playback_pro_substream)
  398. snd_pcm_period_elapsed(ice->playback_pro_substream);
  399. }
  400. if (mtstat & VT1724_MULTI_RDMA0) {
  401. if (ice->capture_pro_substream)
  402. snd_pcm_period_elapsed(ice->capture_pro_substream);
  403. }
  404. if (mtstat & VT1724_MULTI_PDMA1) {
  405. if (ice->playback_con_substream_ds[0])
  406. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  407. }
  408. if (mtstat & VT1724_MULTI_PDMA2) {
  409. if (ice->playback_con_substream_ds[1])
  410. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  411. }
  412. if (mtstat & VT1724_MULTI_PDMA3) {
  413. if (ice->playback_con_substream_ds[2])
  414. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  415. }
  416. if (mtstat & VT1724_MULTI_PDMA4) {
  417. if (ice->playback_con_substream)
  418. snd_pcm_period_elapsed(ice->playback_con_substream);
  419. }
  420. if (mtstat & VT1724_MULTI_RDMA1) {
  421. if (ice->capture_con_substream)
  422. snd_pcm_period_elapsed(ice->capture_con_substream);
  423. }
  424. /* ack anyway to avoid freeze */
  425. outb(mtstat, ICEMT1724(ice, IRQ));
  426. /* ought to really handle this properly */
  427. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  428. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  429. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  430. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  431. /* If I don't do this, I get machine lockup due to continual interrupts */
  432. }
  433. }
  434. }
  435. return IRQ_RETVAL(handled);
  436. }
  437. /*
  438. * PCM code - professional part (multitrack)
  439. */
  440. static unsigned int rates[] = {
  441. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  442. 32000, 44100, 48000, 64000, 88200, 96000,
  443. 176400, 192000,
  444. };
  445. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  446. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  447. .list = rates,
  448. .mask = 0,
  449. };
  450. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  451. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  452. .list = rates,
  453. .mask = 0,
  454. };
  455. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  456. .count = ARRAY_SIZE(rates),
  457. .list = rates,
  458. .mask = 0,
  459. };
  460. struct vt1724_pcm_reg {
  461. unsigned int addr; /* ADDR register offset */
  462. unsigned int size; /* SIZE register offset */
  463. unsigned int count; /* COUNT register offset */
  464. unsigned int start; /* start & pause bit */
  465. };
  466. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  467. {
  468. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  469. unsigned char what;
  470. unsigned char old;
  471. struct snd_pcm_substream *s;
  472. what = 0;
  473. snd_pcm_group_for_each_entry(s, substream) {
  474. if (snd_pcm_substream_chip(s) == ice) {
  475. const struct vt1724_pcm_reg *reg;
  476. reg = s->runtime->private_data;
  477. what |= reg->start;
  478. snd_pcm_trigger_done(s, substream);
  479. }
  480. }
  481. switch (cmd) {
  482. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  483. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  484. spin_lock(&ice->reg_lock);
  485. old = inb(ICEMT1724(ice, DMA_PAUSE));
  486. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  487. old |= what;
  488. else
  489. old &= ~what;
  490. outb(old, ICEMT1724(ice, DMA_PAUSE));
  491. spin_unlock(&ice->reg_lock);
  492. break;
  493. case SNDRV_PCM_TRIGGER_START:
  494. case SNDRV_PCM_TRIGGER_STOP:
  495. spin_lock(&ice->reg_lock);
  496. old = inb(ICEMT1724(ice, DMA_CONTROL));
  497. if (cmd == SNDRV_PCM_TRIGGER_START)
  498. old |= what;
  499. else
  500. old &= ~what;
  501. outb(old, ICEMT1724(ice, DMA_CONTROL));
  502. spin_unlock(&ice->reg_lock);
  503. break;
  504. default:
  505. return -EINVAL;
  506. }
  507. return 0;
  508. }
  509. /*
  510. */
  511. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  512. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  513. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  514. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  515. static const unsigned int stdclock_rate_list[16] = {
  516. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  517. 22050, 11025, 88200, 176400, 0, 192000, 64000
  518. };
  519. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  520. {
  521. unsigned int rate;
  522. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  523. return rate;
  524. }
  525. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  526. {
  527. int i;
  528. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  529. if (stdclock_rate_list[i] == rate) {
  530. outb(i, ICEMT1724(ice, RATE));
  531. return;
  532. }
  533. }
  534. }
  535. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  536. unsigned int rate)
  537. {
  538. unsigned char val, old;
  539. /* check MT02 */
  540. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  541. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  542. if (rate > 96000)
  543. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  544. else
  545. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  546. if (val != old) {
  547. outb(val, ICEMT1724(ice, I2S_FORMAT));
  548. /* master clock changed */
  549. return 1;
  550. }
  551. }
  552. /* no change in master clock */
  553. return 0;
  554. }
  555. static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  556. int force)
  557. {
  558. unsigned long flags;
  559. unsigned char mclk_change;
  560. unsigned int i, old_rate;
  561. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  562. return -EINVAL;
  563. spin_lock_irqsave(&ice->reg_lock, flags);
  564. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  565. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  566. /* running? we cannot change the rate now... */
  567. spin_unlock_irqrestore(&ice->reg_lock, flags);
  568. return -EBUSY;
  569. }
  570. if (!force && is_pro_rate_locked(ice)) {
  571. spin_unlock_irqrestore(&ice->reg_lock, flags);
  572. return (rate == ice->cur_rate) ? 0 : -EBUSY;
  573. }
  574. old_rate = ice->get_rate(ice);
  575. if (force || (old_rate != rate))
  576. ice->set_rate(ice, rate);
  577. else if (rate == ice->cur_rate) {
  578. spin_unlock_irqrestore(&ice->reg_lock, flags);
  579. return 0;
  580. }
  581. ice->cur_rate = rate;
  582. /* setting master clock */
  583. mclk_change = ice->set_mclk(ice, rate);
  584. spin_unlock_irqrestore(&ice->reg_lock, flags);
  585. if (mclk_change && ice->gpio.i2s_mclk_changed)
  586. ice->gpio.i2s_mclk_changed(ice);
  587. if (ice->gpio.set_pro_rate)
  588. ice->gpio.set_pro_rate(ice, rate);
  589. /* set up codecs */
  590. for (i = 0; i < ice->akm_codecs; i++) {
  591. if (ice->akm[i].ops.set_rate_val)
  592. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  593. }
  594. if (ice->spdif.ops.setup_rate)
  595. ice->spdif.ops.setup_rate(ice, rate);
  596. return 0;
  597. }
  598. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  599. struct snd_pcm_hw_params *hw_params)
  600. {
  601. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  602. int i, chs, err;
  603. chs = params_channels(hw_params);
  604. mutex_lock(&ice->open_mutex);
  605. /* mark surround channels */
  606. if (substream == ice->playback_pro_substream) {
  607. /* PDMA0 can be multi-channel up to 8 */
  608. chs = chs / 2 - 1;
  609. for (i = 0; i < chs; i++) {
  610. if (ice->pcm_reserved[i] &&
  611. ice->pcm_reserved[i] != substream) {
  612. mutex_unlock(&ice->open_mutex);
  613. return -EBUSY;
  614. }
  615. ice->pcm_reserved[i] = substream;
  616. }
  617. for (; i < 3; i++) {
  618. if (ice->pcm_reserved[i] == substream)
  619. ice->pcm_reserved[i] = NULL;
  620. }
  621. } else {
  622. for (i = 0; i < 3; i++) {
  623. /* check individual playback stream */
  624. if (ice->playback_con_substream_ds[i] == substream) {
  625. if (ice->pcm_reserved[i] &&
  626. ice->pcm_reserved[i] != substream) {
  627. mutex_unlock(&ice->open_mutex);
  628. return -EBUSY;
  629. }
  630. ice->pcm_reserved[i] = substream;
  631. break;
  632. }
  633. }
  634. }
  635. mutex_unlock(&ice->open_mutex);
  636. err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  637. if (err < 0)
  638. return err;
  639. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  640. }
  641. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  642. {
  643. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  644. int i;
  645. mutex_lock(&ice->open_mutex);
  646. /* unmark surround channels */
  647. for (i = 0; i < 3; i++)
  648. if (ice->pcm_reserved[i] == substream)
  649. ice->pcm_reserved[i] = NULL;
  650. mutex_unlock(&ice->open_mutex);
  651. return snd_pcm_lib_free_pages(substream);
  652. }
  653. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  654. {
  655. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  656. unsigned char val;
  657. unsigned int size;
  658. spin_lock_irq(&ice->reg_lock);
  659. val = (8 - substream->runtime->channels) >> 1;
  660. outb(val, ICEMT1724(ice, BURST));
  661. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  662. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  663. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  664. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  665. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  666. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  667. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  668. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  669. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  670. spin_unlock_irq(&ice->reg_lock);
  671. /*
  672. printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
  673. "buffer = 0x%x, period = 0x%x\n",
  674. substream->runtime->channels,
  675. (unsigned int)substream->runtime->dma_addr,
  676. snd_pcm_lib_buffer_bytes(substream),
  677. snd_pcm_lib_period_bytes(substream));
  678. */
  679. return 0;
  680. }
  681. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  682. {
  683. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  684. size_t ptr;
  685. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  686. return 0;
  687. #if 0 /* read PLAYBACK_ADDR */
  688. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  689. if (ptr < substream->runtime->dma_addr) {
  690. snd_printd("ice1724: invalid negative ptr\n");
  691. return 0;
  692. }
  693. ptr -= substream->runtime->dma_addr;
  694. ptr = bytes_to_frames(substream->runtime, ptr);
  695. if (ptr >= substream->runtime->buffer_size) {
  696. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  697. (int)ptr, (int)substream->runtime->period_size);
  698. return 0;
  699. }
  700. #else /* read PLAYBACK_SIZE */
  701. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  702. ptr = (ptr + 1) << 2;
  703. ptr = bytes_to_frames(substream->runtime, ptr);
  704. if (!ptr)
  705. ;
  706. else if (ptr <= substream->runtime->buffer_size)
  707. ptr = substream->runtime->buffer_size - ptr;
  708. else {
  709. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  710. (int)ptr, (int)substream->runtime->buffer_size);
  711. ptr = 0;
  712. }
  713. #endif
  714. return ptr;
  715. }
  716. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  717. {
  718. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  719. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  720. spin_lock_irq(&ice->reg_lock);
  721. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  722. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  723. ice->profi_port + reg->size);
  724. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  725. ice->profi_port + reg->count);
  726. spin_unlock_irq(&ice->reg_lock);
  727. return 0;
  728. }
  729. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  730. {
  731. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  732. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  733. size_t ptr;
  734. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  735. return 0;
  736. #if 0 /* use ADDR register */
  737. ptr = inl(ice->profi_port + reg->addr);
  738. ptr -= substream->runtime->dma_addr;
  739. return bytes_to_frames(substream->runtime, ptr);
  740. #else /* use SIZE register */
  741. ptr = inw(ice->profi_port + reg->size);
  742. ptr = (ptr + 1) << 2;
  743. ptr = bytes_to_frames(substream->runtime, ptr);
  744. if (!ptr)
  745. ;
  746. else if (ptr <= substream->runtime->buffer_size)
  747. ptr = substream->runtime->buffer_size - ptr;
  748. else {
  749. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  750. (int)ptr, (int)substream->runtime->buffer_size);
  751. ptr = 0;
  752. }
  753. return ptr;
  754. #endif
  755. }
  756. static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
  757. .addr = VT1724_MT_PLAYBACK_ADDR,
  758. .size = VT1724_MT_PLAYBACK_SIZE,
  759. .count = VT1724_MT_PLAYBACK_COUNT,
  760. .start = VT1724_PDMA0_START,
  761. };
  762. static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
  763. .addr = VT1724_MT_PDMA4_ADDR,
  764. .size = VT1724_MT_PDMA4_SIZE,
  765. .count = VT1724_MT_PDMA4_COUNT,
  766. .start = VT1724_PDMA4_START,
  767. };
  768. static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
  769. .addr = VT1724_MT_CAPTURE_ADDR,
  770. .size = VT1724_MT_CAPTURE_SIZE,
  771. .count = VT1724_MT_CAPTURE_COUNT,
  772. .start = VT1724_RDMA0_START,
  773. };
  774. static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
  775. .addr = VT1724_MT_RDMA1_ADDR,
  776. .size = VT1724_MT_RDMA1_SIZE,
  777. .count = VT1724_MT_RDMA1_COUNT,
  778. .start = VT1724_RDMA1_START,
  779. };
  780. #define vt1724_playback_pro_reg vt1724_pdma0_reg
  781. #define vt1724_playback_spdif_reg vt1724_pdma4_reg
  782. #define vt1724_capture_pro_reg vt1724_rdma0_reg
  783. #define vt1724_capture_spdif_reg vt1724_rdma1_reg
  784. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  785. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  786. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  787. SNDRV_PCM_INFO_MMAP_VALID |
  788. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  789. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  790. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  791. .rate_min = 8000,
  792. .rate_max = 192000,
  793. .channels_min = 2,
  794. .channels_max = 8,
  795. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  796. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  797. .period_bytes_max = (1UL << 21),
  798. .periods_min = 2,
  799. .periods_max = 1024,
  800. };
  801. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  802. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  803. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  804. SNDRV_PCM_INFO_MMAP_VALID |
  805. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  806. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  807. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  808. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  809. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  810. SNDRV_PCM_RATE_192000),
  811. .rate_min = 32000,
  812. .rate_max = 192000,
  813. .channels_min = 2,
  814. .channels_max = 2,
  815. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  816. .period_bytes_min = 2 * 4 * 2,
  817. .period_bytes_max = (1UL << 18),
  818. .periods_min = 2,
  819. .periods_max = 1024,
  820. };
  821. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  822. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  823. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  824. SNDRV_PCM_INFO_MMAP_VALID |
  825. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  826. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  827. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  828. .rate_min = 8000,
  829. .rate_max = 192000,
  830. .channels_min = 2,
  831. .channels_max = 2,
  832. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  833. .period_bytes_min = 2 * 4 * 2,
  834. .period_bytes_max = (1UL << 18),
  835. .periods_min = 2,
  836. .periods_max = 1024,
  837. };
  838. /*
  839. * set rate constraints
  840. */
  841. static void set_std_hw_rates(struct snd_ice1712 *ice)
  842. {
  843. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  844. /* I2S */
  845. /* VT1720 doesn't support more than 96kHz */
  846. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  847. ice->hw_rates = &hw_constraints_rates_192;
  848. else
  849. ice->hw_rates = &hw_constraints_rates_96;
  850. } else {
  851. /* ACLINK */
  852. ice->hw_rates = &hw_constraints_rates_48;
  853. }
  854. }
  855. static int set_rate_constraints(struct snd_ice1712 *ice,
  856. struct snd_pcm_substream *substream)
  857. {
  858. struct snd_pcm_runtime *runtime = substream->runtime;
  859. runtime->hw.rate_min = ice->hw_rates->list[0];
  860. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  861. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  862. return snd_pcm_hw_constraint_list(runtime, 0,
  863. SNDRV_PCM_HW_PARAM_RATE,
  864. ice->hw_rates);
  865. }
  866. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  867. * actually used
  868. */
  869. #define VT1724_BUFFER_ALIGN 0x20
  870. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  871. {
  872. struct snd_pcm_runtime *runtime = substream->runtime;
  873. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  874. int chs, num_indeps;
  875. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  876. ice->playback_pro_substream = substream;
  877. runtime->hw = snd_vt1724_playback_pro;
  878. snd_pcm_set_sync(substream);
  879. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  880. set_rate_constraints(ice, substream);
  881. mutex_lock(&ice->open_mutex);
  882. /* calculate the currently available channels */
  883. num_indeps = ice->num_total_dacs / 2 - 1;
  884. for (chs = 0; chs < num_indeps; chs++) {
  885. if (ice->pcm_reserved[chs])
  886. break;
  887. }
  888. chs = (chs + 1) * 2;
  889. runtime->hw.channels_max = chs;
  890. if (chs > 2) /* channels must be even */
  891. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  892. mutex_unlock(&ice->open_mutex);
  893. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  894. VT1724_BUFFER_ALIGN);
  895. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  896. VT1724_BUFFER_ALIGN);
  897. return 0;
  898. }
  899. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  900. {
  901. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  902. struct snd_pcm_runtime *runtime = substream->runtime;
  903. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  904. ice->capture_pro_substream = substream;
  905. runtime->hw = snd_vt1724_2ch_stereo;
  906. snd_pcm_set_sync(substream);
  907. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  908. set_rate_constraints(ice, substream);
  909. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  910. VT1724_BUFFER_ALIGN);
  911. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  912. VT1724_BUFFER_ALIGN);
  913. return 0;
  914. }
  915. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  916. {
  917. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  918. if (PRO_RATE_RESET)
  919. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  920. ice->playback_pro_substream = NULL;
  921. return 0;
  922. }
  923. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  924. {
  925. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  926. if (PRO_RATE_RESET)
  927. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  928. ice->capture_pro_substream = NULL;
  929. return 0;
  930. }
  931. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  932. .open = snd_vt1724_playback_pro_open,
  933. .close = snd_vt1724_playback_pro_close,
  934. .ioctl = snd_pcm_lib_ioctl,
  935. .hw_params = snd_vt1724_pcm_hw_params,
  936. .hw_free = snd_vt1724_pcm_hw_free,
  937. .prepare = snd_vt1724_playback_pro_prepare,
  938. .trigger = snd_vt1724_pcm_trigger,
  939. .pointer = snd_vt1724_playback_pro_pointer,
  940. };
  941. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  942. .open = snd_vt1724_capture_pro_open,
  943. .close = snd_vt1724_capture_pro_close,
  944. .ioctl = snd_pcm_lib_ioctl,
  945. .hw_params = snd_vt1724_pcm_hw_params,
  946. .hw_free = snd_vt1724_pcm_hw_free,
  947. .prepare = snd_vt1724_pcm_prepare,
  948. .trigger = snd_vt1724_pcm_trigger,
  949. .pointer = snd_vt1724_pcm_pointer,
  950. };
  951. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  952. {
  953. struct snd_pcm *pcm;
  954. int err;
  955. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  956. if (err < 0)
  957. return err;
  958. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  959. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  960. pcm->private_data = ice;
  961. pcm->info_flags = 0;
  962. strcpy(pcm->name, "ICE1724");
  963. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  964. snd_dma_pci_data(ice->pci),
  965. 256*1024, 256*1024);
  966. ice->pcm_pro = pcm;
  967. return 0;
  968. }
  969. /*
  970. * SPDIF PCM
  971. */
  972. /* update spdif control bits; call with reg_lock */
  973. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  974. {
  975. unsigned char cbit, disabled;
  976. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  977. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  978. if (cbit != disabled)
  979. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  980. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  981. if (cbit != disabled)
  982. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  983. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  984. }
  985. /* update SPDIF control bits according to the given rate */
  986. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  987. {
  988. unsigned int val, nval;
  989. unsigned long flags;
  990. spin_lock_irqsave(&ice->reg_lock, flags);
  991. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  992. nval &= ~(7 << 12);
  993. switch (rate) {
  994. case 44100: break;
  995. case 48000: nval |= 2 << 12; break;
  996. case 32000: nval |= 3 << 12; break;
  997. case 88200: nval |= 4 << 12; break;
  998. case 96000: nval |= 5 << 12; break;
  999. case 192000: nval |= 6 << 12; break;
  1000. case 176400: nval |= 7 << 12; break;
  1001. }
  1002. if (val != nval)
  1003. update_spdif_bits(ice, nval);
  1004. spin_unlock_irqrestore(&ice->reg_lock, flags);
  1005. }
  1006. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  1007. {
  1008. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1009. if (!ice->force_pdma4)
  1010. update_spdif_rate(ice, substream->runtime->rate);
  1011. return snd_vt1724_pcm_prepare(substream);
  1012. }
  1013. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  1014. {
  1015. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1016. struct snd_pcm_runtime *runtime = substream->runtime;
  1017. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  1018. ice->playback_con_substream = substream;
  1019. if (ice->force_pdma4) {
  1020. runtime->hw = snd_vt1724_2ch_stereo;
  1021. set_rate_constraints(ice, substream);
  1022. } else
  1023. runtime->hw = snd_vt1724_spdif;
  1024. snd_pcm_set_sync(substream);
  1025. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1026. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1027. VT1724_BUFFER_ALIGN);
  1028. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1029. VT1724_BUFFER_ALIGN);
  1030. if (ice->spdif.ops.open)
  1031. ice->spdif.ops.open(ice, substream);
  1032. return 0;
  1033. }
  1034. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1035. {
  1036. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1037. if (PRO_RATE_RESET)
  1038. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1039. ice->playback_con_substream = NULL;
  1040. if (ice->spdif.ops.close)
  1041. ice->spdif.ops.close(ice, substream);
  1042. return 0;
  1043. }
  1044. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1045. {
  1046. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1047. struct snd_pcm_runtime *runtime = substream->runtime;
  1048. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1049. ice->capture_con_substream = substream;
  1050. if (ice->force_rdma1) {
  1051. runtime->hw = snd_vt1724_2ch_stereo;
  1052. set_rate_constraints(ice, substream);
  1053. } else
  1054. runtime->hw = snd_vt1724_spdif;
  1055. snd_pcm_set_sync(substream);
  1056. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1057. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1058. VT1724_BUFFER_ALIGN);
  1059. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1060. VT1724_BUFFER_ALIGN);
  1061. if (ice->spdif.ops.open)
  1062. ice->spdif.ops.open(ice, substream);
  1063. return 0;
  1064. }
  1065. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1066. {
  1067. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1068. if (PRO_RATE_RESET)
  1069. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1070. ice->capture_con_substream = NULL;
  1071. if (ice->spdif.ops.close)
  1072. ice->spdif.ops.close(ice, substream);
  1073. return 0;
  1074. }
  1075. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1076. .open = snd_vt1724_playback_spdif_open,
  1077. .close = snd_vt1724_playback_spdif_close,
  1078. .ioctl = snd_pcm_lib_ioctl,
  1079. .hw_params = snd_vt1724_pcm_hw_params,
  1080. .hw_free = snd_vt1724_pcm_hw_free,
  1081. .prepare = snd_vt1724_playback_spdif_prepare,
  1082. .trigger = snd_vt1724_pcm_trigger,
  1083. .pointer = snd_vt1724_pcm_pointer,
  1084. };
  1085. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1086. .open = snd_vt1724_capture_spdif_open,
  1087. .close = snd_vt1724_capture_spdif_close,
  1088. .ioctl = snd_pcm_lib_ioctl,
  1089. .hw_params = snd_vt1724_pcm_hw_params,
  1090. .hw_free = snd_vt1724_pcm_hw_free,
  1091. .prepare = snd_vt1724_pcm_prepare,
  1092. .trigger = snd_vt1724_pcm_trigger,
  1093. .pointer = snd_vt1724_pcm_pointer,
  1094. };
  1095. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1096. {
  1097. char *name;
  1098. struct snd_pcm *pcm;
  1099. int play, capt;
  1100. int err;
  1101. if (ice->force_pdma4 ||
  1102. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1103. play = 1;
  1104. ice->has_spdif = 1;
  1105. } else
  1106. play = 0;
  1107. if (ice->force_rdma1 ||
  1108. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1109. capt = 1;
  1110. ice->has_spdif = 1;
  1111. } else
  1112. capt = 0;
  1113. if (!play && !capt)
  1114. return 0; /* no spdif device */
  1115. if (ice->force_pdma4 || ice->force_rdma1)
  1116. name = "ICE1724 Secondary";
  1117. else
  1118. name = "ICE1724 IEC958";
  1119. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1120. if (err < 0)
  1121. return err;
  1122. if (play)
  1123. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1124. &snd_vt1724_playback_spdif_ops);
  1125. if (capt)
  1126. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1127. &snd_vt1724_capture_spdif_ops);
  1128. pcm->private_data = ice;
  1129. pcm->info_flags = 0;
  1130. strcpy(pcm->name, name);
  1131. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1132. snd_dma_pci_data(ice->pci),
  1133. 64*1024, 64*1024);
  1134. ice->pcm = pcm;
  1135. return 0;
  1136. }
  1137. /*
  1138. * independent surround PCMs
  1139. */
  1140. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1141. {
  1142. .addr = VT1724_MT_PDMA1_ADDR,
  1143. .size = VT1724_MT_PDMA1_SIZE,
  1144. .count = VT1724_MT_PDMA1_COUNT,
  1145. .start = VT1724_PDMA1_START,
  1146. },
  1147. {
  1148. .addr = VT1724_MT_PDMA2_ADDR,
  1149. .size = VT1724_MT_PDMA2_SIZE,
  1150. .count = VT1724_MT_PDMA2_COUNT,
  1151. .start = VT1724_PDMA2_START,
  1152. },
  1153. {
  1154. .addr = VT1724_MT_PDMA3_ADDR,
  1155. .size = VT1724_MT_PDMA3_SIZE,
  1156. .count = VT1724_MT_PDMA3_COUNT,
  1157. .start = VT1724_PDMA3_START,
  1158. },
  1159. };
  1160. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1161. {
  1162. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1163. unsigned char val;
  1164. spin_lock_irq(&ice->reg_lock);
  1165. val = 3 - substream->number;
  1166. if (inb(ICEMT1724(ice, BURST)) < val)
  1167. outb(val, ICEMT1724(ice, BURST));
  1168. spin_unlock_irq(&ice->reg_lock);
  1169. return snd_vt1724_pcm_prepare(substream);
  1170. }
  1171. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1172. {
  1173. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1174. struct snd_pcm_runtime *runtime = substream->runtime;
  1175. mutex_lock(&ice->open_mutex);
  1176. /* already used by PDMA0? */
  1177. if (ice->pcm_reserved[substream->number]) {
  1178. mutex_unlock(&ice->open_mutex);
  1179. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1180. }
  1181. mutex_unlock(&ice->open_mutex);
  1182. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1183. ice->playback_con_substream_ds[substream->number] = substream;
  1184. runtime->hw = snd_vt1724_2ch_stereo;
  1185. snd_pcm_set_sync(substream);
  1186. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1187. set_rate_constraints(ice, substream);
  1188. return 0;
  1189. }
  1190. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1191. {
  1192. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1193. if (PRO_RATE_RESET)
  1194. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1195. ice->playback_con_substream_ds[substream->number] = NULL;
  1196. ice->pcm_reserved[substream->number] = NULL;
  1197. return 0;
  1198. }
  1199. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1200. .open = snd_vt1724_playback_indep_open,
  1201. .close = snd_vt1724_playback_indep_close,
  1202. .ioctl = snd_pcm_lib_ioctl,
  1203. .hw_params = snd_vt1724_pcm_hw_params,
  1204. .hw_free = snd_vt1724_pcm_hw_free,
  1205. .prepare = snd_vt1724_playback_indep_prepare,
  1206. .trigger = snd_vt1724_pcm_trigger,
  1207. .pointer = snd_vt1724_pcm_pointer,
  1208. };
  1209. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1210. {
  1211. struct snd_pcm *pcm;
  1212. int play;
  1213. int err;
  1214. play = ice->num_total_dacs / 2 - 1;
  1215. if (play <= 0)
  1216. return 0;
  1217. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1218. if (err < 0)
  1219. return err;
  1220. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1221. &snd_vt1724_playback_indep_ops);
  1222. pcm->private_data = ice;
  1223. pcm->info_flags = 0;
  1224. strcpy(pcm->name, "ICE1724 Surround PCM");
  1225. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1226. snd_dma_pci_data(ice->pci),
  1227. 64*1024, 64*1024);
  1228. ice->pcm_ds = pcm;
  1229. return 0;
  1230. }
  1231. /*
  1232. * Mixer section
  1233. */
  1234. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1235. {
  1236. int err;
  1237. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1238. struct snd_ac97_bus *pbus;
  1239. struct snd_ac97_template ac97;
  1240. static struct snd_ac97_bus_ops ops = {
  1241. .write = snd_vt1724_ac97_write,
  1242. .read = snd_vt1724_ac97_read,
  1243. };
  1244. /* cold reset */
  1245. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1246. mdelay(5); /* FIXME */
  1247. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1248. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1249. if (err < 0)
  1250. return err;
  1251. memset(&ac97, 0, sizeof(ac97));
  1252. ac97.private_data = ice;
  1253. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1254. if (err < 0)
  1255. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1256. else
  1257. return 0;
  1258. }
  1259. /* I2S mixer only */
  1260. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1261. return 0;
  1262. }
  1263. /*
  1264. *
  1265. */
  1266. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1267. {
  1268. return (unsigned int)ice->eeprom.data[idx] | \
  1269. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1270. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1271. }
  1272. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1273. struct snd_info_buffer *buffer)
  1274. {
  1275. struct snd_ice1712 *ice = entry->private_data;
  1276. unsigned int idx;
  1277. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1278. snd_iprintf(buffer, "EEPROM:\n");
  1279. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1280. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1281. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1282. snd_iprintf(buffer, " System Config : 0x%x\n",
  1283. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1284. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1285. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1286. snd_iprintf(buffer, " I2S : 0x%x\n",
  1287. ice->eeprom.data[ICE_EEP2_I2S]);
  1288. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1289. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1290. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1291. ice->eeprom.gpiodir);
  1292. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1293. ice->eeprom.gpiomask);
  1294. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1295. ice->eeprom.gpiostate);
  1296. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1297. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1298. idx, ice->eeprom.data[idx]);
  1299. snd_iprintf(buffer, "\nRegisters:\n");
  1300. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1301. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1302. for (idx = 0x0; idx < 0x20 ; idx++)
  1303. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1304. idx, inb(ice->port+idx));
  1305. for (idx = 0x0; idx < 0x30 ; idx++)
  1306. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1307. idx, inb(ice->profi_port+idx));
  1308. }
  1309. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1310. {
  1311. struct snd_info_entry *entry;
  1312. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1313. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1314. }
  1315. /*
  1316. *
  1317. */
  1318. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1319. struct snd_ctl_elem_info *uinfo)
  1320. {
  1321. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1322. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1323. return 0;
  1324. }
  1325. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1326. struct snd_ctl_elem_value *ucontrol)
  1327. {
  1328. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1329. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1330. return 0;
  1331. }
  1332. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1333. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1334. .name = "ICE1724 EEPROM",
  1335. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1336. .info = snd_vt1724_eeprom_info,
  1337. .get = snd_vt1724_eeprom_get
  1338. };
  1339. /*
  1340. */
  1341. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1342. struct snd_ctl_elem_info *uinfo)
  1343. {
  1344. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1345. uinfo->count = 1;
  1346. return 0;
  1347. }
  1348. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1349. {
  1350. unsigned int val, rbits;
  1351. val = diga->status[0] & 0x03; /* professional, non-audio */
  1352. if (val & 0x01) {
  1353. /* professional */
  1354. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1355. IEC958_AES0_PRO_EMPHASIS_5015)
  1356. val |= 1U << 3;
  1357. rbits = (diga->status[4] >> 3) & 0x0f;
  1358. if (rbits) {
  1359. switch (rbits) {
  1360. case 2: val |= 5 << 12; break; /* 96k */
  1361. case 3: val |= 6 << 12; break; /* 192k */
  1362. case 10: val |= 4 << 12; break; /* 88.2k */
  1363. case 11: val |= 7 << 12; break; /* 176.4k */
  1364. }
  1365. } else {
  1366. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1367. case IEC958_AES0_PRO_FS_44100:
  1368. break;
  1369. case IEC958_AES0_PRO_FS_32000:
  1370. val |= 3U << 12;
  1371. break;
  1372. default:
  1373. val |= 2U << 12;
  1374. break;
  1375. }
  1376. }
  1377. } else {
  1378. /* consumer */
  1379. val |= diga->status[1] & 0x04; /* copyright */
  1380. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1381. IEC958_AES0_CON_EMPHASIS_5015)
  1382. val |= 1U << 3;
  1383. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1384. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1385. }
  1386. return val;
  1387. }
  1388. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1389. {
  1390. memset(diga->status, 0, sizeof(diga->status));
  1391. diga->status[0] = val & 0x03; /* professional, non-audio */
  1392. if (val & 0x01) {
  1393. /* professional */
  1394. if (val & (1U << 3))
  1395. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1396. switch ((val >> 12) & 0x7) {
  1397. case 0:
  1398. break;
  1399. case 2:
  1400. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1401. break;
  1402. default:
  1403. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1404. break;
  1405. }
  1406. } else {
  1407. /* consumer */
  1408. diga->status[0] |= val & (1U << 2); /* copyright */
  1409. if (val & (1U << 3))
  1410. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1411. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1412. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1413. }
  1414. }
  1415. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1416. struct snd_ctl_elem_value *ucontrol)
  1417. {
  1418. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1419. unsigned int val;
  1420. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1421. decode_spdif_bits(&ucontrol->value.iec958, val);
  1422. return 0;
  1423. }
  1424. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1425. struct snd_ctl_elem_value *ucontrol)
  1426. {
  1427. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1428. unsigned int val, old;
  1429. val = encode_spdif_bits(&ucontrol->value.iec958);
  1430. spin_lock_irq(&ice->reg_lock);
  1431. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1432. if (val != old)
  1433. update_spdif_bits(ice, val);
  1434. spin_unlock_irq(&ice->reg_lock);
  1435. return val != old;
  1436. }
  1437. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1438. {
  1439. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1440. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1441. .info = snd_vt1724_spdif_info,
  1442. .get = snd_vt1724_spdif_default_get,
  1443. .put = snd_vt1724_spdif_default_put
  1444. };
  1445. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1446. struct snd_ctl_elem_value *ucontrol)
  1447. {
  1448. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1449. IEC958_AES0_PROFESSIONAL |
  1450. IEC958_AES0_CON_NOT_COPYRIGHT |
  1451. IEC958_AES0_CON_EMPHASIS;
  1452. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1453. IEC958_AES1_CON_CATEGORY;
  1454. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1455. return 0;
  1456. }
  1457. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1458. struct snd_ctl_elem_value *ucontrol)
  1459. {
  1460. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1461. IEC958_AES0_PROFESSIONAL |
  1462. IEC958_AES0_PRO_FS |
  1463. IEC958_AES0_PRO_EMPHASIS;
  1464. return 0;
  1465. }
  1466. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1467. {
  1468. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1469. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1470. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1471. .info = snd_vt1724_spdif_info,
  1472. .get = snd_vt1724_spdif_maskc_get,
  1473. };
  1474. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1475. {
  1476. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1477. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1478. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1479. .info = snd_vt1724_spdif_info,
  1480. .get = snd_vt1724_spdif_maskp_get,
  1481. };
  1482. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1483. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1484. struct snd_ctl_elem_value *ucontrol)
  1485. {
  1486. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1487. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1488. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1489. return 0;
  1490. }
  1491. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1492. struct snd_ctl_elem_value *ucontrol)
  1493. {
  1494. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1495. unsigned char old, val;
  1496. spin_lock_irq(&ice->reg_lock);
  1497. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1498. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1499. if (ucontrol->value.integer.value[0])
  1500. val |= VT1724_CFG_SPDIF_OUT_EN;
  1501. if (old != val)
  1502. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1503. spin_unlock_irq(&ice->reg_lock);
  1504. return old != val;
  1505. }
  1506. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1507. {
  1508. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1509. /* FIXME: the following conflict with IEC958 Playback Route */
  1510. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1511. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1512. .info = snd_vt1724_spdif_sw_info,
  1513. .get = snd_vt1724_spdif_sw_get,
  1514. .put = snd_vt1724_spdif_sw_put
  1515. };
  1516. #if 0 /* NOT USED YET */
  1517. /*
  1518. * GPIO access from extern
  1519. */
  1520. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1521. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1522. struct snd_ctl_elem_value *ucontrol)
  1523. {
  1524. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1525. int shift = kcontrol->private_value & 0xff;
  1526. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1527. snd_ice1712_save_gpio_status(ice);
  1528. ucontrol->value.integer.value[0] =
  1529. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1530. snd_ice1712_restore_gpio_status(ice);
  1531. return 0;
  1532. }
  1533. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1534. struct snd_ctl_elem_value *ucontrol)
  1535. {
  1536. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1537. int shift = kcontrol->private_value & 0xff;
  1538. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1539. unsigned int val, nval;
  1540. if (kcontrol->private_value & (1 << 31))
  1541. return -EPERM;
  1542. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1543. snd_ice1712_save_gpio_status(ice);
  1544. val = snd_ice1712_gpio_read(ice);
  1545. nval |= val & ~(1 << shift);
  1546. if (val != nval)
  1547. snd_ice1712_gpio_write(ice, nval);
  1548. snd_ice1712_restore_gpio_status(ice);
  1549. return val != nval;
  1550. }
  1551. #endif /* NOT USED YET */
  1552. /*
  1553. * rate
  1554. */
  1555. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1556. struct snd_ctl_elem_info *uinfo)
  1557. {
  1558. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1559. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1560. uinfo->count = 1;
  1561. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1562. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1563. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1564. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1565. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1566. else
  1567. sprintf(uinfo->value.enumerated.name, "%d",
  1568. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1569. return 0;
  1570. }
  1571. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1572. struct snd_ctl_elem_value *ucontrol)
  1573. {
  1574. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1575. unsigned int i, rate;
  1576. spin_lock_irq(&ice->reg_lock);
  1577. if (ice->is_spdif_master(ice)) {
  1578. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1579. } else {
  1580. rate = ice->get_rate(ice);
  1581. ucontrol->value.enumerated.item[0] = 0;
  1582. for (i = 0; i < ice->hw_rates->count; i++) {
  1583. if (ice->hw_rates->list[i] == rate) {
  1584. ucontrol->value.enumerated.item[0] = i;
  1585. break;
  1586. }
  1587. }
  1588. }
  1589. spin_unlock_irq(&ice->reg_lock);
  1590. return 0;
  1591. }
  1592. /* setting clock to external - SPDIF */
  1593. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1594. {
  1595. unsigned char oval;
  1596. unsigned char i2s_oval;
  1597. oval = inb(ICEMT1724(ice, RATE));
  1598. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1599. /* setting 256fs */
  1600. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1601. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1602. }
  1603. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1604. struct snd_ctl_elem_value *ucontrol)
  1605. {
  1606. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1607. unsigned int old_rate, new_rate;
  1608. unsigned int item = ucontrol->value.enumerated.item[0];
  1609. unsigned int spdif = ice->hw_rates->count;
  1610. if (item > spdif)
  1611. return -EINVAL;
  1612. spin_lock_irq(&ice->reg_lock);
  1613. if (ice->is_spdif_master(ice))
  1614. old_rate = 0;
  1615. else
  1616. old_rate = ice->get_rate(ice);
  1617. if (item == spdif) {
  1618. /* switching to external clock via SPDIF */
  1619. ice->set_spdif_clock(ice);
  1620. new_rate = 0;
  1621. } else {
  1622. /* internal on-card clock */
  1623. new_rate = ice->hw_rates->list[item];
  1624. ice->pro_rate_default = new_rate;
  1625. spin_unlock_irq(&ice->reg_lock);
  1626. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1627. spin_lock_irq(&ice->reg_lock);
  1628. }
  1629. spin_unlock_irq(&ice->reg_lock);
  1630. /* the first reset to the SPDIF master mode? */
  1631. if (old_rate != new_rate && !new_rate) {
  1632. /* notify akm chips as well */
  1633. unsigned int i;
  1634. if (ice->gpio.set_pro_rate)
  1635. ice->gpio.set_pro_rate(ice, 0);
  1636. for (i = 0; i < ice->akm_codecs; i++) {
  1637. if (ice->akm[i].ops.set_rate_val)
  1638. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1639. }
  1640. }
  1641. return old_rate != new_rate;
  1642. }
  1643. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1644. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1645. .name = "Multi Track Internal Clock",
  1646. .info = snd_vt1724_pro_internal_clock_info,
  1647. .get = snd_vt1724_pro_internal_clock_get,
  1648. .put = snd_vt1724_pro_internal_clock_put
  1649. };
  1650. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1651. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1652. struct snd_ctl_elem_value *ucontrol)
  1653. {
  1654. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1655. return 0;
  1656. }
  1657. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1658. struct snd_ctl_elem_value *ucontrol)
  1659. {
  1660. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1661. int change = 0, nval;
  1662. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1663. spin_lock_irq(&ice->reg_lock);
  1664. change = PRO_RATE_LOCKED != nval;
  1665. PRO_RATE_LOCKED = nval;
  1666. spin_unlock_irq(&ice->reg_lock);
  1667. return change;
  1668. }
  1669. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1670. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1671. .name = "Multi Track Rate Locking",
  1672. .info = snd_vt1724_pro_rate_locking_info,
  1673. .get = snd_vt1724_pro_rate_locking_get,
  1674. .put = snd_vt1724_pro_rate_locking_put
  1675. };
  1676. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1677. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1678. struct snd_ctl_elem_value *ucontrol)
  1679. {
  1680. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1681. return 0;
  1682. }
  1683. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1684. struct snd_ctl_elem_value *ucontrol)
  1685. {
  1686. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1687. int change = 0, nval;
  1688. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1689. spin_lock_irq(&ice->reg_lock);
  1690. change = PRO_RATE_RESET != nval;
  1691. PRO_RATE_RESET = nval;
  1692. spin_unlock_irq(&ice->reg_lock);
  1693. return change;
  1694. }
  1695. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1696. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1697. .name = "Multi Track Rate Reset",
  1698. .info = snd_vt1724_pro_rate_reset_info,
  1699. .get = snd_vt1724_pro_rate_reset_get,
  1700. .put = snd_vt1724_pro_rate_reset_put
  1701. };
  1702. /*
  1703. * routing
  1704. */
  1705. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1706. struct snd_ctl_elem_info *uinfo)
  1707. {
  1708. static char *texts[] = {
  1709. "PCM Out", /* 0 */
  1710. "H/W In 0", "H/W In 1", /* 1-2 */
  1711. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1712. };
  1713. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1714. uinfo->count = 1;
  1715. uinfo->value.enumerated.items = 5;
  1716. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1717. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1718. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1719. return 0;
  1720. }
  1721. static inline int analog_route_shift(int idx)
  1722. {
  1723. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1724. }
  1725. static inline int digital_route_shift(int idx)
  1726. {
  1727. return idx * 3;
  1728. }
  1729. int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
  1730. {
  1731. unsigned long val;
  1732. unsigned char eitem;
  1733. static const unsigned char xlate[8] = {
  1734. 0, 255, 1, 2, 255, 255, 3, 4,
  1735. };
  1736. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1737. val >>= shift;
  1738. val &= 7; /* we now have 3 bits per output */
  1739. eitem = xlate[val];
  1740. if (eitem == 255) {
  1741. snd_BUG();
  1742. return 0;
  1743. }
  1744. return eitem;
  1745. }
  1746. int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
  1747. int shift)
  1748. {
  1749. unsigned int old_val, nval;
  1750. int change;
  1751. static const unsigned char xroute[8] = {
  1752. 0, /* PCM */
  1753. 2, /* PSDIN0 Left */
  1754. 3, /* PSDIN0 Right */
  1755. 6, /* SPDIN Left */
  1756. 7, /* SPDIN Right */
  1757. };
  1758. nval = xroute[val % 5];
  1759. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1760. val &= ~(0x07 << shift);
  1761. val |= nval << shift;
  1762. change = val != old_val;
  1763. if (change)
  1764. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1765. return change;
  1766. }
  1767. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1768. struct snd_ctl_elem_value *ucontrol)
  1769. {
  1770. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1771. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1772. ucontrol->value.enumerated.item[0] =
  1773. snd_ice1724_get_route_val(ice, analog_route_shift(idx));
  1774. return 0;
  1775. }
  1776. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1777. struct snd_ctl_elem_value *ucontrol)
  1778. {
  1779. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1780. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1781. return snd_ice1724_put_route_val(ice,
  1782. ucontrol->value.enumerated.item[0],
  1783. analog_route_shift(idx));
  1784. }
  1785. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1786. struct snd_ctl_elem_value *ucontrol)
  1787. {
  1788. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1789. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1790. ucontrol->value.enumerated.item[0] =
  1791. snd_ice1724_get_route_val(ice, digital_route_shift(idx));
  1792. return 0;
  1793. }
  1794. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1795. struct snd_ctl_elem_value *ucontrol)
  1796. {
  1797. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1798. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1799. return snd_ice1724_put_route_val(ice,
  1800. ucontrol->value.enumerated.item[0],
  1801. digital_route_shift(idx));
  1802. }
  1803. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata =
  1804. {
  1805. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1806. .name = "H/W Playback Route",
  1807. .info = snd_vt1724_pro_route_info,
  1808. .get = snd_vt1724_pro_route_analog_get,
  1809. .put = snd_vt1724_pro_route_analog_put,
  1810. };
  1811. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1812. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1813. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1814. .info = snd_vt1724_pro_route_info,
  1815. .get = snd_vt1724_pro_route_spdif_get,
  1816. .put = snd_vt1724_pro_route_spdif_put,
  1817. .count = 2,
  1818. };
  1819. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1820. struct snd_ctl_elem_info *uinfo)
  1821. {
  1822. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1823. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1824. uinfo->value.integer.min = 0;
  1825. uinfo->value.integer.max = 255;
  1826. return 0;
  1827. }
  1828. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1829. struct snd_ctl_elem_value *ucontrol)
  1830. {
  1831. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1832. int idx;
  1833. spin_lock_irq(&ice->reg_lock);
  1834. for (idx = 0; idx < 22; idx++) {
  1835. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1836. ucontrol->value.integer.value[idx] =
  1837. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1838. }
  1839. spin_unlock_irq(&ice->reg_lock);
  1840. return 0;
  1841. }
  1842. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1843. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1844. .name = "Multi Track Peak",
  1845. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1846. .info = snd_vt1724_pro_peak_info,
  1847. .get = snd_vt1724_pro_peak_get
  1848. };
  1849. /*
  1850. *
  1851. */
  1852. static struct snd_ice1712_card_info no_matched __devinitdata;
  1853. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1854. snd_vt1724_revo_cards,
  1855. snd_vt1724_amp_cards,
  1856. snd_vt1724_aureon_cards,
  1857. snd_vt1720_mobo_cards,
  1858. snd_vt1720_pontis_cards,
  1859. snd_vt1724_prodigy_hifi_cards,
  1860. snd_vt1724_prodigy192_cards,
  1861. snd_vt1724_juli_cards,
  1862. snd_vt1724_maya44_cards,
  1863. snd_vt1724_phase_cards,
  1864. snd_vt1724_wtm_cards,
  1865. snd_vt1724_se_cards,
  1866. NULL,
  1867. };
  1868. /*
  1869. */
  1870. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1871. {
  1872. int t = 0x10000;
  1873. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1874. ;
  1875. if (t == -1)
  1876. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1877. }
  1878. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1879. unsigned char dev, unsigned char addr)
  1880. {
  1881. unsigned char val;
  1882. mutex_lock(&ice->i2c_mutex);
  1883. wait_i2c_busy(ice);
  1884. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1885. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1886. wait_i2c_busy(ice);
  1887. val = inb(ICEREG1724(ice, I2C_DATA));
  1888. mutex_unlock(&ice->i2c_mutex);
  1889. /*
  1890. printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1891. */
  1892. return val;
  1893. }
  1894. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1895. unsigned char dev, unsigned char addr, unsigned char data)
  1896. {
  1897. mutex_lock(&ice->i2c_mutex);
  1898. wait_i2c_busy(ice);
  1899. /*
  1900. printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1901. */
  1902. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1903. outb(data, ICEREG1724(ice, I2C_DATA));
  1904. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1905. wait_i2c_busy(ice);
  1906. mutex_unlock(&ice->i2c_mutex);
  1907. }
  1908. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1909. const char *modelname)
  1910. {
  1911. const int dev = 0xa0; /* EEPROM device address */
  1912. unsigned int i, size;
  1913. struct snd_ice1712_card_info * const *tbl, *c;
  1914. if (!modelname || !*modelname) {
  1915. ice->eeprom.subvendor = 0;
  1916. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1917. ice->eeprom.subvendor =
  1918. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1919. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1920. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1921. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1922. if (ice->eeprom.subvendor == 0 ||
  1923. ice->eeprom.subvendor == (unsigned int)-1) {
  1924. /* invalid subvendor from EEPROM, try the PCI
  1925. * subststem ID instead
  1926. */
  1927. u16 vendor, device;
  1928. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1929. &vendor);
  1930. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1931. ice->eeprom.subvendor =
  1932. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1933. if (ice->eeprom.subvendor == 0 ||
  1934. ice->eeprom.subvendor == (unsigned int)-1) {
  1935. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1936. return -ENXIO;
  1937. }
  1938. }
  1939. }
  1940. for (tbl = card_tables; *tbl; tbl++) {
  1941. for (c = *tbl; c->subvendor; c++) {
  1942. if (modelname && c->model &&
  1943. !strcmp(modelname, c->model)) {
  1944. printk(KERN_INFO "ice1724: Using board model %s\n",
  1945. c->name);
  1946. ice->eeprom.subvendor = c->subvendor;
  1947. } else if (c->subvendor != ice->eeprom.subvendor)
  1948. continue;
  1949. if (!c->eeprom_size || !c->eeprom_data)
  1950. goto found;
  1951. /* if the EEPROM is given by the driver, use it */
  1952. snd_printdd("using the defined eeprom..\n");
  1953. ice->eeprom.version = 2;
  1954. ice->eeprom.size = c->eeprom_size + 6;
  1955. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1956. goto read_skipped;
  1957. }
  1958. }
  1959. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1960. ice->eeprom.subvendor);
  1961. found:
  1962. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1963. if (ice->eeprom.size < 6)
  1964. ice->eeprom.size = 32;
  1965. else if (ice->eeprom.size > 32) {
  1966. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1967. ice->eeprom.size);
  1968. return -EIO;
  1969. }
  1970. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1971. if (ice->eeprom.version != 2)
  1972. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1973. ice->eeprom.version);
  1974. size = ice->eeprom.size - 6;
  1975. for (i = 0; i < size; i++)
  1976. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1977. read_skipped:
  1978. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1979. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1980. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1981. return 0;
  1982. }
  1983. static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  1984. {
  1985. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1986. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  1987. msleep(10);
  1988. outb(0, ICEREG1724(ice, CONTROL));
  1989. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  1990. msleep(10);
  1991. }
  1992. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1993. {
  1994. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1995. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1996. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1997. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1998. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1999. ice->gpio.direction = ice->eeprom.gpiodir;
  2000. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  2001. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  2002. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  2003. outb(0, ICEREG1724(ice, POWERDOWN));
  2004. return 0;
  2005. }
  2006. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  2007. {
  2008. int err;
  2009. struct snd_kcontrol *kctl;
  2010. if (snd_BUG_ON(!ice->pcm))
  2011. return -EIO;
  2012. if (!ice->own_routing) {
  2013. err = snd_ctl_add(ice->card,
  2014. snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  2015. if (err < 0)
  2016. return err;
  2017. }
  2018. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  2019. if (err < 0)
  2020. return err;
  2021. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  2022. if (err < 0)
  2023. return err;
  2024. kctl->id.device = ice->pcm->device;
  2025. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  2026. if (err < 0)
  2027. return err;
  2028. kctl->id.device = ice->pcm->device;
  2029. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  2030. if (err < 0)
  2031. return err;
  2032. kctl->id.device = ice->pcm->device;
  2033. #if 0 /* use default only */
  2034. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  2035. if (err < 0)
  2036. return err;
  2037. kctl->id.device = ice->pcm->device;
  2038. ice->spdif.stream_ctl = kctl;
  2039. #endif
  2040. return 0;
  2041. }
  2042. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2043. {
  2044. int err;
  2045. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2046. if (err < 0)
  2047. return err;
  2048. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2049. if (err < 0)
  2050. return err;
  2051. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2052. if (err < 0)
  2053. return err;
  2054. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2055. if (err < 0)
  2056. return err;
  2057. if (!ice->own_routing && ice->num_total_dacs > 0) {
  2058. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2059. tmp.count = ice->num_total_dacs;
  2060. if (ice->vt1720 && tmp.count > 2)
  2061. tmp.count = 2;
  2062. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2063. if (err < 0)
  2064. return err;
  2065. }
  2066. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2067. if (err < 0)
  2068. return err;
  2069. return 0;
  2070. }
  2071. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2072. {
  2073. if (!ice->port)
  2074. goto __hw_end;
  2075. /* mask all interrupts */
  2076. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2077. outb(0xff, ICEREG1724(ice, IRQMASK));
  2078. /* --- */
  2079. __hw_end:
  2080. if (ice->irq >= 0)
  2081. free_irq(ice->irq, ice);
  2082. pci_release_regions(ice->pci);
  2083. snd_ice1712_akm4xxx_free(ice);
  2084. pci_disable_device(ice->pci);
  2085. kfree(ice->spec);
  2086. kfree(ice);
  2087. return 0;
  2088. }
  2089. static int snd_vt1724_dev_free(struct snd_device *device)
  2090. {
  2091. struct snd_ice1712 *ice = device->device_data;
  2092. return snd_vt1724_free(ice);
  2093. }
  2094. static int __devinit snd_vt1724_create(struct snd_card *card,
  2095. struct pci_dev *pci,
  2096. const char *modelname,
  2097. struct snd_ice1712 **r_ice1712)
  2098. {
  2099. struct snd_ice1712 *ice;
  2100. int err;
  2101. static struct snd_device_ops ops = {
  2102. .dev_free = snd_vt1724_dev_free,
  2103. };
  2104. *r_ice1712 = NULL;
  2105. /* enable PCI device */
  2106. err = pci_enable_device(pci);
  2107. if (err < 0)
  2108. return err;
  2109. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2110. if (ice == NULL) {
  2111. pci_disable_device(pci);
  2112. return -ENOMEM;
  2113. }
  2114. ice->vt1724 = 1;
  2115. spin_lock_init(&ice->reg_lock);
  2116. mutex_init(&ice->gpio_mutex);
  2117. mutex_init(&ice->open_mutex);
  2118. mutex_init(&ice->i2c_mutex);
  2119. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2120. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2121. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2122. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2123. ice->card = card;
  2124. ice->pci = pci;
  2125. ice->irq = -1;
  2126. pci_set_master(pci);
  2127. snd_vt1724_proc_init(ice);
  2128. synchronize_irq(pci->irq);
  2129. err = pci_request_regions(pci, "ICE1724");
  2130. if (err < 0) {
  2131. kfree(ice);
  2132. pci_disable_device(pci);
  2133. return err;
  2134. }
  2135. ice->port = pci_resource_start(pci, 0);
  2136. ice->profi_port = pci_resource_start(pci, 1);
  2137. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2138. IRQF_SHARED, "ICE1724", ice)) {
  2139. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2140. snd_vt1724_free(ice);
  2141. return -EIO;
  2142. }
  2143. ice->irq = pci->irq;
  2144. snd_vt1724_chip_reset(ice);
  2145. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2146. snd_vt1724_free(ice);
  2147. return -EIO;
  2148. }
  2149. if (snd_vt1724_chip_init(ice) < 0) {
  2150. snd_vt1724_free(ice);
  2151. return -EIO;
  2152. }
  2153. /* MPU_RX and TX irq masks are cleared later dynamically */
  2154. outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
  2155. /* don't handle FIFO overrun/underruns (just yet),
  2156. * since they cause machine lockups
  2157. */
  2158. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2159. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2160. if (err < 0) {
  2161. snd_vt1724_free(ice);
  2162. return err;
  2163. }
  2164. snd_card_set_dev(card, &pci->dev);
  2165. *r_ice1712 = ice;
  2166. return 0;
  2167. }
  2168. /*
  2169. *
  2170. * Registration
  2171. *
  2172. */
  2173. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2174. const struct pci_device_id *pci_id)
  2175. {
  2176. static int dev;
  2177. struct snd_card *card;
  2178. struct snd_ice1712 *ice;
  2179. int pcm_dev = 0, err;
  2180. struct snd_ice1712_card_info * const *tbl, *c;
  2181. if (dev >= SNDRV_CARDS)
  2182. return -ENODEV;
  2183. if (!enable[dev]) {
  2184. dev++;
  2185. return -ENOENT;
  2186. }
  2187. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2188. if (err < 0)
  2189. return err;
  2190. strcpy(card->driver, "ICE1724");
  2191. strcpy(card->shortname, "ICEnsemble ICE1724");
  2192. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2193. if (err < 0) {
  2194. snd_card_free(card);
  2195. return err;
  2196. }
  2197. for (tbl = card_tables; *tbl; tbl++) {
  2198. for (c = *tbl; c->subvendor; c++) {
  2199. if (c->subvendor == ice->eeprom.subvendor) {
  2200. strcpy(card->shortname, c->name);
  2201. if (c->driver) /* specific driver? */
  2202. strcpy(card->driver, c->driver);
  2203. if (c->chip_init) {
  2204. err = c->chip_init(ice);
  2205. if (err < 0) {
  2206. snd_card_free(card);
  2207. return err;
  2208. }
  2209. }
  2210. goto __found;
  2211. }
  2212. }
  2213. }
  2214. c = &no_matched;
  2215. __found:
  2216. /*
  2217. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2218. * ICE1712 has only one for both (mixed up).
  2219. *
  2220. * Confusingly the analog PCM is named "professional" here because it
  2221. * was called so in ice1712 driver, and vt1724 driver is derived from
  2222. * ice1712 driver.
  2223. */
  2224. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2225. if (!ice->is_spdif_master)
  2226. ice->is_spdif_master = stdclock_is_spdif_master;
  2227. if (!ice->get_rate)
  2228. ice->get_rate = stdclock_get_rate;
  2229. if (!ice->set_rate)
  2230. ice->set_rate = stdclock_set_rate;
  2231. if (!ice->set_mclk)
  2232. ice->set_mclk = stdclock_set_mclk;
  2233. if (!ice->set_spdif_clock)
  2234. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2235. if (!ice->hw_rates)
  2236. set_std_hw_rates(ice);
  2237. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2238. if (err < 0) {
  2239. snd_card_free(card);
  2240. return err;
  2241. }
  2242. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2243. if (err < 0) {
  2244. snd_card_free(card);
  2245. return err;
  2246. }
  2247. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2248. if (err < 0) {
  2249. snd_card_free(card);
  2250. return err;
  2251. }
  2252. err = snd_vt1724_ac97_mixer(ice);
  2253. if (err < 0) {
  2254. snd_card_free(card);
  2255. return err;
  2256. }
  2257. err = snd_vt1724_build_controls(ice);
  2258. if (err < 0) {
  2259. snd_card_free(card);
  2260. return err;
  2261. }
  2262. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2263. err = snd_vt1724_spdif_build_controls(ice);
  2264. if (err < 0) {
  2265. snd_card_free(card);
  2266. return err;
  2267. }
  2268. }
  2269. if (c->build_controls) {
  2270. err = c->build_controls(ice);
  2271. if (err < 0) {
  2272. snd_card_free(card);
  2273. return err;
  2274. }
  2275. }
  2276. if (!c->no_mpu401) {
  2277. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2278. struct snd_rawmidi *rmidi;
  2279. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2280. if (err < 0) {
  2281. snd_card_free(card);
  2282. return err;
  2283. }
  2284. ice->rmidi[0] = rmidi;
  2285. rmidi->private_data = ice;
  2286. strcpy(rmidi->name, "ICE1724 MIDI");
  2287. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2288. SNDRV_RAWMIDI_INFO_INPUT |
  2289. SNDRV_RAWMIDI_INFO_DUPLEX;
  2290. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2291. &vt1724_midi_output_ops);
  2292. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2293. &vt1724_midi_input_ops);
  2294. /* set watermarks */
  2295. outb(VT1724_MPU_RX_FIFO | 0x1,
  2296. ICEREG1724(ice, MPU_FIFO_WM));
  2297. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2298. /* set UART mode */
  2299. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2300. }
  2301. }
  2302. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2303. card->shortname, ice->port, ice->irq);
  2304. err = snd_card_register(card);
  2305. if (err < 0) {
  2306. snd_card_free(card);
  2307. return err;
  2308. }
  2309. pci_set_drvdata(pci, card);
  2310. dev++;
  2311. return 0;
  2312. }
  2313. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2314. {
  2315. snd_card_free(pci_get_drvdata(pci));
  2316. pci_set_drvdata(pci, NULL);
  2317. }
  2318. static struct pci_driver driver = {
  2319. .name = "ICE1724",
  2320. .id_table = snd_vt1724_ids,
  2321. .probe = snd_vt1724_probe,
  2322. .remove = __devexit_p(snd_vt1724_remove),
  2323. };
  2324. static int __init alsa_card_ice1724_init(void)
  2325. {
  2326. return pci_register_driver(&driver);
  2327. }
  2328. static void __exit alsa_card_ice1724_exit(void)
  2329. {
  2330. pci_unregister_driver(&driver);
  2331. }
  2332. module_init(alsa_card_ice1724_init)
  2333. module_exit(alsa_card_ice1724_exit)