atmel_lcdfb.c 31 KB

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  1. /*
  2. * Driver for AT91/AT32 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <mach/board.h>
  20. #include <mach/cpu.h>
  21. #include <mach/gpio.h>
  22. #include <video/atmel_lcdc.h>
  23. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  24. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  25. /* configurable parameters */
  26. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  27. #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
  28. #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
  29. #if defined(CONFIG_ARCH_AT91)
  30. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  31. | FBINFO_PARTIAL_PAN_OK \
  32. | FBINFO_HWACCEL_YPAN)
  33. static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  34. struct fb_var_screeninfo *var)
  35. {
  36. }
  37. #elif defined(CONFIG_AVR32)
  38. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  39. | FBINFO_PARTIAL_PAN_OK \
  40. | FBINFO_HWACCEL_XPAN \
  41. | FBINFO_HWACCEL_YPAN)
  42. static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  43. struct fb_var_screeninfo *var)
  44. {
  45. u32 dma2dcfg;
  46. u32 pixeloff;
  47. pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
  48. dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
  49. dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  50. lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  51. /* Update configuration */
  52. lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  53. lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  54. | ATMEL_LCDC_DMAUPDT);
  55. }
  56. #endif
  57. static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  58. | ATMEL_LCDC_POL_POSITIVE
  59. | ATMEL_LCDC_ENA_PWMENABLE;
  60. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  61. /* some bl->props field just changed */
  62. static int atmel_bl_update_status(struct backlight_device *bl)
  63. {
  64. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  65. int power = sinfo->bl_power;
  66. int brightness = bl->props.brightness;
  67. /* REVISIT there may be a meaningful difference between
  68. * fb_blank and power ... there seem to be some cases
  69. * this doesn't handle correctly.
  70. */
  71. if (bl->props.fb_blank != sinfo->bl_power)
  72. power = bl->props.fb_blank;
  73. else if (bl->props.power != sinfo->bl_power)
  74. power = bl->props.power;
  75. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  76. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  77. else if (power != FB_BLANK_UNBLANK)
  78. brightness = 0;
  79. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  80. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  81. brightness ? contrast_ctr : 0);
  82. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  83. return 0;
  84. }
  85. static int atmel_bl_get_brightness(struct backlight_device *bl)
  86. {
  87. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  88. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  89. }
  90. static struct backlight_ops atmel_lcdc_bl_ops = {
  91. .update_status = atmel_bl_update_status,
  92. .get_brightness = atmel_bl_get_brightness,
  93. };
  94. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  95. {
  96. struct backlight_device *bl;
  97. sinfo->bl_power = FB_BLANK_UNBLANK;
  98. if (sinfo->backlight)
  99. return;
  100. bl = backlight_device_register("backlight", &sinfo->pdev->dev,
  101. sinfo, &atmel_lcdc_bl_ops);
  102. if (IS_ERR(bl)) {
  103. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  104. PTR_ERR(bl));
  105. return;
  106. }
  107. sinfo->backlight = bl;
  108. bl->props.power = FB_BLANK_UNBLANK;
  109. bl->props.fb_blank = FB_BLANK_UNBLANK;
  110. bl->props.max_brightness = 0xff;
  111. bl->props.brightness = atmel_bl_get_brightness(bl);
  112. }
  113. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  114. {
  115. if (sinfo->backlight)
  116. backlight_device_unregister(sinfo->backlight);
  117. }
  118. #else
  119. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  120. {
  121. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  122. }
  123. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  124. {
  125. }
  126. #endif
  127. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  128. {
  129. /* have some default contrast/backlight settings */
  130. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  131. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  132. if (sinfo->lcdcon_is_backlight)
  133. init_backlight(sinfo);
  134. }
  135. static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
  136. .type = FB_TYPE_PACKED_PIXELS,
  137. .visual = FB_VISUAL_TRUECOLOR,
  138. .xpanstep = 0,
  139. .ypanstep = 1,
  140. .ywrapstep = 0,
  141. .accel = FB_ACCEL_NONE,
  142. };
  143. static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
  144. {
  145. unsigned long value;
  146. if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
  147. return xres;
  148. value = xres;
  149. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  150. /* STN display */
  151. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  152. value *= 3;
  153. }
  154. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  155. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  156. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  157. value = DIV_ROUND_UP(value, 4);
  158. else
  159. value = DIV_ROUND_UP(value, 8);
  160. }
  161. return value;
  162. }
  163. static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
  164. {
  165. /* Turn off the LCD controller and the DMA controller */
  166. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  167. sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  168. /* Wait for the LCDC core to become idle */
  169. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  170. msleep(10);
  171. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  172. }
  173. static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
  174. {
  175. atmel_lcdfb_stop_nowait(sinfo);
  176. /* Wait for DMA engine to become idle... */
  177. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  178. msleep(10);
  179. }
  180. static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
  181. {
  182. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
  183. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  184. (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
  185. | ATMEL_LCDC_PWR);
  186. }
  187. static void atmel_lcdfb_update_dma(struct fb_info *info,
  188. struct fb_var_screeninfo *var)
  189. {
  190. struct atmel_lcdfb_info *sinfo = info->par;
  191. struct fb_fix_screeninfo *fix = &info->fix;
  192. unsigned long dma_addr;
  193. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  194. + var->xoffset * var->bits_per_pixel / 8);
  195. dma_addr &= ~3UL;
  196. /* Set framebuffer DMA base address and pixel offset */
  197. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  198. atmel_lcdfb_update_dma2d(sinfo, var);
  199. }
  200. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  201. {
  202. struct fb_info *info = sinfo->info;
  203. dma_free_writecombine(info->device, info->fix.smem_len,
  204. info->screen_base, info->fix.smem_start);
  205. }
  206. /**
  207. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  208. * @sinfo: the frame buffer to allocate memory for
  209. */
  210. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  211. {
  212. struct fb_info *info = sinfo->info;
  213. struct fb_var_screeninfo *var = &info->var;
  214. unsigned int smem_len;
  215. smem_len = (var->xres_virtual * var->yres_virtual
  216. * ((var->bits_per_pixel + 7) / 8));
  217. info->fix.smem_len = max(smem_len, sinfo->smem_len);
  218. info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
  219. (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
  220. if (!info->screen_base) {
  221. return -ENOMEM;
  222. }
  223. memset(info->screen_base, 0, info->fix.smem_len);
  224. return 0;
  225. }
  226. static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
  227. struct fb_info *info)
  228. {
  229. struct fb_videomode varfbmode;
  230. const struct fb_videomode *fbmode = NULL;
  231. fb_var_to_videomode(&varfbmode, var);
  232. fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
  233. if (fbmode)
  234. fb_videomode_to_var(var, fbmode);
  235. return fbmode;
  236. }
  237. /**
  238. * atmel_lcdfb_check_var - Validates a var passed in.
  239. * @var: frame buffer variable screen structure
  240. * @info: frame buffer structure that represents a single frame buffer
  241. *
  242. * Checks to see if the hardware supports the state requested by
  243. * var passed in. This function does not alter the hardware
  244. * state!!! This means the data stored in struct fb_info and
  245. * struct atmel_lcdfb_info do not change. This includes the var
  246. * inside of struct fb_info. Do NOT change these. This function
  247. * can be called on its own if we intent to only test a mode and
  248. * not actually set it. The stuff in modedb.c is a example of
  249. * this. If the var passed in is slightly off by what the
  250. * hardware can support then we alter the var PASSED in to what
  251. * we can do. If the hardware doesn't support mode change a
  252. * -EINVAL will be returned by the upper layers. You don't need
  253. * to implement this function then. If you hardware doesn't
  254. * support changing the resolution then this function is not
  255. * needed. In this case the driver would just provide a var that
  256. * represents the static state the screen is in.
  257. *
  258. * Returns negative errno on error, or zero on success.
  259. */
  260. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  261. struct fb_info *info)
  262. {
  263. struct device *dev = info->device;
  264. struct atmel_lcdfb_info *sinfo = info->par;
  265. unsigned long clk_value_khz;
  266. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  267. dev_dbg(dev, "%s:\n", __func__);
  268. if (!(var->pixclock && var->bits_per_pixel)) {
  269. /* choose a suitable mode if possible */
  270. if (!atmel_lcdfb_choose_mode(var, info)) {
  271. dev_err(dev, "needed value not specified\n");
  272. return -EINVAL;
  273. }
  274. }
  275. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  276. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  277. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  278. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  279. if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
  280. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  281. return -EINVAL;
  282. }
  283. /* Do not allow to have real resoulution larger than virtual */
  284. if (var->xres > var->xres_virtual)
  285. var->xres_virtual = var->xres;
  286. if (var->yres > var->yres_virtual)
  287. var->yres_virtual = var->yres;
  288. /* Force same alignment for each line */
  289. var->xres = (var->xres + 3) & ~3UL;
  290. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  291. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  292. var->transp.msb_right = 0;
  293. var->transp.offset = var->transp.length = 0;
  294. var->xoffset = var->yoffset = 0;
  295. if (info->fix.smem_len) {
  296. unsigned int smem_len = (var->xres_virtual * var->yres_virtual
  297. * ((var->bits_per_pixel + 7) / 8));
  298. if (smem_len > info->fix.smem_len)
  299. return -EINVAL;
  300. }
  301. /* Saturate vertical and horizontal timings at maximum values */
  302. var->vsync_len = min_t(u32, var->vsync_len,
  303. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  304. var->upper_margin = min_t(u32, var->upper_margin,
  305. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  306. var->lower_margin = min_t(u32, var->lower_margin,
  307. ATMEL_LCDC_VFP);
  308. var->right_margin = min_t(u32, var->right_margin,
  309. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  310. var->hsync_len = min_t(u32, var->hsync_len,
  311. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  312. var->left_margin = min_t(u32, var->left_margin,
  313. ATMEL_LCDC_HBP + 1);
  314. /* Some parameters can't be zero */
  315. var->vsync_len = max_t(u32, var->vsync_len, 1);
  316. var->right_margin = max_t(u32, var->right_margin, 1);
  317. var->hsync_len = max_t(u32, var->hsync_len, 1);
  318. var->left_margin = max_t(u32, var->left_margin, 1);
  319. switch (var->bits_per_pixel) {
  320. case 1:
  321. case 2:
  322. case 4:
  323. case 8:
  324. var->red.offset = var->green.offset = var->blue.offset = 0;
  325. var->red.length = var->green.length = var->blue.length
  326. = var->bits_per_pixel;
  327. break;
  328. case 15:
  329. case 16:
  330. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  331. /* RGB:565 mode */
  332. var->red.offset = 11;
  333. var->blue.offset = 0;
  334. var->green.length = 6;
  335. } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
  336. var->red.offset = 10;
  337. var->blue.offset = 0;
  338. var->green.length = 5;
  339. } else {
  340. /* BGR:555 mode */
  341. var->red.offset = 0;
  342. var->blue.offset = 10;
  343. var->green.length = 5;
  344. }
  345. var->green.offset = 5;
  346. var->red.length = var->blue.length = 5;
  347. break;
  348. case 32:
  349. var->transp.offset = 24;
  350. var->transp.length = 8;
  351. /* fall through */
  352. case 24:
  353. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  354. /* RGB:888 mode */
  355. var->red.offset = 16;
  356. var->blue.offset = 0;
  357. } else {
  358. /* BGR:888 mode */
  359. var->red.offset = 0;
  360. var->blue.offset = 16;
  361. }
  362. var->green.offset = 8;
  363. var->red.length = var->green.length = var->blue.length = 8;
  364. break;
  365. default:
  366. dev_err(dev, "color depth %d not supported\n",
  367. var->bits_per_pixel);
  368. return -EINVAL;
  369. }
  370. return 0;
  371. }
  372. /*
  373. * LCD reset sequence
  374. */
  375. static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
  376. {
  377. might_sleep();
  378. atmel_lcdfb_stop(sinfo);
  379. atmel_lcdfb_start(sinfo);
  380. }
  381. /**
  382. * atmel_lcdfb_set_par - Alters the hardware state.
  383. * @info: frame buffer structure that represents a single frame buffer
  384. *
  385. * Using the fb_var_screeninfo in fb_info we set the resolution
  386. * of the this particular framebuffer. This function alters the
  387. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  388. * not alter var in fb_info since we are using that data. This
  389. * means we depend on the data in var inside fb_info to be
  390. * supported by the hardware. atmel_lcdfb_check_var is always called
  391. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  392. * change the resolution you don't need this function.
  393. *
  394. */
  395. static int atmel_lcdfb_set_par(struct fb_info *info)
  396. {
  397. struct atmel_lcdfb_info *sinfo = info->par;
  398. unsigned long hozval_linesz;
  399. unsigned long value;
  400. unsigned long clk_value_khz;
  401. unsigned long bits_per_line;
  402. might_sleep();
  403. dev_dbg(info->device, "%s:\n", __func__);
  404. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  405. info->var.xres, info->var.yres,
  406. info->var.xres_virtual, info->var.yres_virtual);
  407. atmel_lcdfb_stop_nowait(sinfo);
  408. if (info->var.bits_per_pixel == 1)
  409. info->fix.visual = FB_VISUAL_MONO01;
  410. else if (info->var.bits_per_pixel <= 8)
  411. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  412. else
  413. info->fix.visual = FB_VISUAL_TRUECOLOR;
  414. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  415. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  416. /* Re-initialize the DMA engine... */
  417. dev_dbg(info->device, " * update DMA engine\n");
  418. atmel_lcdfb_update_dma(info, &info->var);
  419. /* ...set frame size and burst length = 8 words (?) */
  420. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  421. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  422. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  423. /* Now, the LCDC core... */
  424. /* Set pixel clock */
  425. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  426. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  427. if (value < 2) {
  428. dev_notice(info->device, "Bypassing pixel clock divider\n");
  429. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  430. } else {
  431. value = (value / 2) - 1;
  432. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
  433. value);
  434. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
  435. value << ATMEL_LCDC_CLKVAL_OFFSET);
  436. info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
  437. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  438. PICOS2KHZ(info->var.pixclock));
  439. }
  440. /* Initialize control register 2 */
  441. value = sinfo->default_lcdcon2;
  442. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  443. value |= ATMEL_LCDC_INVLINE_INVERTED;
  444. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  445. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  446. switch (info->var.bits_per_pixel) {
  447. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  448. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  449. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  450. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  451. case 15: /* fall through */
  452. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  453. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  454. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  455. default: BUG(); break;
  456. }
  457. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  458. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  459. /* Vertical timing */
  460. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  461. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  462. value |= info->var.lower_margin;
  463. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  464. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  465. /* Horizontal timing */
  466. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  467. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  468. value |= (info->var.left_margin - 1);
  469. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  470. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  471. /* Horizontal value (aka line size) */
  472. hozval_linesz = compute_hozval(info->var.xres,
  473. lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
  474. /* Display size */
  475. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  476. value |= info->var.yres - 1;
  477. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  478. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  479. /* FIFO Threshold: Use formula from data sheet */
  480. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  481. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  482. /* Toggle LCD_MODE every frame */
  483. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  484. /* Disable all interrupts */
  485. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  486. /* Enable FIFO & DMA errors */
  487. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  488. /* ...wait for DMA engine to become idle... */
  489. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  490. msleep(10);
  491. atmel_lcdfb_start(sinfo);
  492. dev_dbg(info->device, " * DONE\n");
  493. return 0;
  494. }
  495. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  496. {
  497. chan &= 0xffff;
  498. chan >>= 16 - bf->length;
  499. return chan << bf->offset;
  500. }
  501. /**
  502. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  503. * @regno: Which register in the CLUT we are programming
  504. * @red: The red value which can be up to 16 bits wide
  505. * @green: The green value which can be up to 16 bits wide
  506. * @blue: The blue value which can be up to 16 bits wide.
  507. * @transp: If supported the alpha value which can be up to 16 bits wide.
  508. * @info: frame buffer info structure
  509. *
  510. * Set a single color register. The values supplied have a 16 bit
  511. * magnitude which needs to be scaled in this function for the hardware.
  512. * Things to take into consideration are how many color registers, if
  513. * any, are supported with the current color visual. With truecolor mode
  514. * no color palettes are supported. Here a psuedo palette is created
  515. * which we store the value in pseudo_palette in struct fb_info. For
  516. * pseudocolor mode we have a limited color palette. To deal with this
  517. * we can program what color is displayed for a particular pixel value.
  518. * DirectColor is similar in that we can program each color field. If
  519. * we have a static colormap we don't need to implement this function.
  520. *
  521. * Returns negative errno on error, or zero on success. In an
  522. * ideal world, this would have been the case, but as it turns
  523. * out, the other drivers return 1 on failure, so that's what
  524. * we're going to do.
  525. */
  526. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  527. unsigned int green, unsigned int blue,
  528. unsigned int transp, struct fb_info *info)
  529. {
  530. struct atmel_lcdfb_info *sinfo = info->par;
  531. unsigned int val;
  532. u32 *pal;
  533. int ret = 1;
  534. if (info->var.grayscale)
  535. red = green = blue = (19595 * red + 38470 * green
  536. + 7471 * blue) >> 16;
  537. switch (info->fix.visual) {
  538. case FB_VISUAL_TRUECOLOR:
  539. if (regno < 16) {
  540. pal = info->pseudo_palette;
  541. val = chan_to_field(red, &info->var.red);
  542. val |= chan_to_field(green, &info->var.green);
  543. val |= chan_to_field(blue, &info->var.blue);
  544. pal[regno] = val;
  545. ret = 0;
  546. }
  547. break;
  548. case FB_VISUAL_PSEUDOCOLOR:
  549. if (regno < 256) {
  550. val = ((red >> 11) & 0x001f);
  551. val |= ((green >> 6) & 0x03e0);
  552. val |= ((blue >> 1) & 0x7c00);
  553. /*
  554. * TODO: intensity bit. Maybe something like
  555. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  556. */
  557. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  558. ret = 0;
  559. }
  560. break;
  561. case FB_VISUAL_MONO01:
  562. if (regno < 2) {
  563. val = (regno == 0) ? 0x00 : 0x1F;
  564. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  565. ret = 0;
  566. }
  567. break;
  568. }
  569. return ret;
  570. }
  571. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  572. struct fb_info *info)
  573. {
  574. dev_dbg(info->device, "%s\n", __func__);
  575. atmel_lcdfb_update_dma(info, var);
  576. return 0;
  577. }
  578. static struct fb_ops atmel_lcdfb_ops = {
  579. .owner = THIS_MODULE,
  580. .fb_check_var = atmel_lcdfb_check_var,
  581. .fb_set_par = atmel_lcdfb_set_par,
  582. .fb_setcolreg = atmel_lcdfb_setcolreg,
  583. .fb_pan_display = atmel_lcdfb_pan_display,
  584. .fb_fillrect = cfb_fillrect,
  585. .fb_copyarea = cfb_copyarea,
  586. .fb_imageblit = cfb_imageblit,
  587. };
  588. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  589. {
  590. struct fb_info *info = dev_id;
  591. struct atmel_lcdfb_info *sinfo = info->par;
  592. u32 status;
  593. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  594. if (status & ATMEL_LCDC_UFLWI) {
  595. dev_warn(info->device, "FIFO underflow %#x\n", status);
  596. /* reset DMA and FIFO to avoid screen shifting */
  597. schedule_work(&sinfo->task);
  598. }
  599. lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
  600. return IRQ_HANDLED;
  601. }
  602. /*
  603. * LCD controller task (to reset the LCD)
  604. */
  605. static void atmel_lcdfb_task(struct work_struct *work)
  606. {
  607. struct atmel_lcdfb_info *sinfo =
  608. container_of(work, struct atmel_lcdfb_info, task);
  609. atmel_lcdfb_reset(sinfo);
  610. }
  611. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  612. {
  613. struct fb_info *info = sinfo->info;
  614. int ret = 0;
  615. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  616. dev_info(info->device,
  617. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  618. (unsigned long)info->fix.smem_len / 1024,
  619. (unsigned long)info->fix.smem_start,
  620. info->screen_base);
  621. /* Allocate colormap */
  622. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  623. if (ret < 0)
  624. dev_err(info->device, "Alloc color map failed\n");
  625. return ret;
  626. }
  627. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  628. {
  629. if (sinfo->bus_clk)
  630. clk_enable(sinfo->bus_clk);
  631. clk_enable(sinfo->lcdc_clk);
  632. }
  633. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  634. {
  635. if (sinfo->bus_clk)
  636. clk_disable(sinfo->bus_clk);
  637. clk_disable(sinfo->lcdc_clk);
  638. }
  639. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  640. {
  641. struct device *dev = &pdev->dev;
  642. struct fb_info *info;
  643. struct atmel_lcdfb_info *sinfo;
  644. struct atmel_lcdfb_info *pdata_sinfo;
  645. struct fb_videomode fbmode;
  646. struct resource *regs = NULL;
  647. struct resource *map = NULL;
  648. int ret;
  649. dev_dbg(dev, "%s BEGIN\n", __func__);
  650. ret = -ENOMEM;
  651. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  652. if (!info) {
  653. dev_err(dev, "cannot allocate memory\n");
  654. goto out;
  655. }
  656. sinfo = info->par;
  657. if (dev->platform_data) {
  658. pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
  659. sinfo->default_bpp = pdata_sinfo->default_bpp;
  660. sinfo->default_dmacon = pdata_sinfo->default_dmacon;
  661. sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
  662. sinfo->default_monspecs = pdata_sinfo->default_monspecs;
  663. sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
  664. sinfo->guard_time = pdata_sinfo->guard_time;
  665. sinfo->smem_len = pdata_sinfo->smem_len;
  666. sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
  667. sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
  668. } else {
  669. dev_err(dev, "cannot get default configuration\n");
  670. goto free_info;
  671. }
  672. sinfo->info = info;
  673. sinfo->pdev = pdev;
  674. strcpy(info->fix.id, sinfo->pdev->name);
  675. info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
  676. info->pseudo_palette = sinfo->pseudo_palette;
  677. info->fbops = &atmel_lcdfb_ops;
  678. memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
  679. info->fix = atmel_lcdfb_fix;
  680. /* Enable LCDC Clocks */
  681. if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
  682. sinfo->bus_clk = clk_get(dev, "hck1");
  683. if (IS_ERR(sinfo->bus_clk)) {
  684. ret = PTR_ERR(sinfo->bus_clk);
  685. goto free_info;
  686. }
  687. }
  688. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  689. if (IS_ERR(sinfo->lcdc_clk)) {
  690. ret = PTR_ERR(sinfo->lcdc_clk);
  691. goto put_bus_clk;
  692. }
  693. atmel_lcdfb_start_clock(sinfo);
  694. ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
  695. info->monspecs.modedb_len, info->monspecs.modedb,
  696. sinfo->default_bpp);
  697. if (!ret) {
  698. dev_err(dev, "no suitable video mode found\n");
  699. goto stop_clk;
  700. }
  701. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  702. if (!regs) {
  703. dev_err(dev, "resources unusable\n");
  704. ret = -ENXIO;
  705. goto stop_clk;
  706. }
  707. sinfo->irq_base = platform_get_irq(pdev, 0);
  708. if (sinfo->irq_base < 0) {
  709. dev_err(dev, "unable to get irq\n");
  710. ret = sinfo->irq_base;
  711. goto stop_clk;
  712. }
  713. /* Initialize video memory */
  714. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  715. if (map) {
  716. /* use a pre-allocated memory buffer */
  717. info->fix.smem_start = map->start;
  718. info->fix.smem_len = map->end - map->start + 1;
  719. if (!request_mem_region(info->fix.smem_start,
  720. info->fix.smem_len, pdev->name)) {
  721. ret = -EBUSY;
  722. goto stop_clk;
  723. }
  724. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  725. if (!info->screen_base)
  726. goto release_intmem;
  727. /*
  728. * Don't clear the framebuffer -- someone may have set
  729. * up a splash image.
  730. */
  731. } else {
  732. /* alocate memory buffer */
  733. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  734. if (ret < 0) {
  735. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  736. goto stop_clk;
  737. }
  738. }
  739. /* LCDC registers */
  740. info->fix.mmio_start = regs->start;
  741. info->fix.mmio_len = regs->end - regs->start + 1;
  742. if (!request_mem_region(info->fix.mmio_start,
  743. info->fix.mmio_len, pdev->name)) {
  744. ret = -EBUSY;
  745. goto free_fb;
  746. }
  747. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  748. if (!sinfo->mmio) {
  749. dev_err(dev, "cannot map LCDC registers\n");
  750. goto release_mem;
  751. }
  752. /* Initialize PWM for contrast or backlight ("off") */
  753. init_contrast(sinfo);
  754. /* interrupt */
  755. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  756. if (ret) {
  757. dev_err(dev, "request_irq failed: %d\n", ret);
  758. goto unmap_mmio;
  759. }
  760. /* Some operations on the LCDC might sleep and
  761. * require a preemptible task context */
  762. INIT_WORK(&sinfo->task, atmel_lcdfb_task);
  763. ret = atmel_lcdfb_init_fbinfo(sinfo);
  764. if (ret < 0) {
  765. dev_err(dev, "init fbinfo failed: %d\n", ret);
  766. goto unregister_irqs;
  767. }
  768. /*
  769. * This makes sure that our colour bitfield
  770. * descriptors are correctly initialised.
  771. */
  772. atmel_lcdfb_check_var(&info->var, info);
  773. ret = fb_set_var(info, &info->var);
  774. if (ret) {
  775. dev_warn(dev, "unable to set display parameters\n");
  776. goto free_cmap;
  777. }
  778. dev_set_drvdata(dev, info);
  779. /*
  780. * Tell the world that we're ready to go
  781. */
  782. ret = register_framebuffer(info);
  783. if (ret < 0) {
  784. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  785. goto reset_drvdata;
  786. }
  787. /* add selected videomode to modelist */
  788. fb_var_to_videomode(&fbmode, &info->var);
  789. fb_add_videomode(&fbmode, &info->modelist);
  790. /* Power up the LCDC screen */
  791. if (sinfo->atmel_lcdfb_power_control)
  792. sinfo->atmel_lcdfb_power_control(1);
  793. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
  794. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  795. return 0;
  796. reset_drvdata:
  797. dev_set_drvdata(dev, NULL);
  798. free_cmap:
  799. fb_dealloc_cmap(&info->cmap);
  800. unregister_irqs:
  801. cancel_work_sync(&sinfo->task);
  802. free_irq(sinfo->irq_base, info);
  803. unmap_mmio:
  804. exit_backlight(sinfo);
  805. iounmap(sinfo->mmio);
  806. release_mem:
  807. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  808. free_fb:
  809. if (map)
  810. iounmap(info->screen_base);
  811. else
  812. atmel_lcdfb_free_video_memory(sinfo);
  813. release_intmem:
  814. if (map)
  815. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  816. stop_clk:
  817. atmel_lcdfb_stop_clock(sinfo);
  818. clk_put(sinfo->lcdc_clk);
  819. put_bus_clk:
  820. if (sinfo->bus_clk)
  821. clk_put(sinfo->bus_clk);
  822. free_info:
  823. framebuffer_release(info);
  824. out:
  825. dev_dbg(dev, "%s FAILED\n", __func__);
  826. return ret;
  827. }
  828. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  829. {
  830. struct device *dev = &pdev->dev;
  831. struct fb_info *info = dev_get_drvdata(dev);
  832. struct atmel_lcdfb_info *sinfo;
  833. if (!info || !info->par)
  834. return 0;
  835. sinfo = info->par;
  836. cancel_work_sync(&sinfo->task);
  837. exit_backlight(sinfo);
  838. if (sinfo->atmel_lcdfb_power_control)
  839. sinfo->atmel_lcdfb_power_control(0);
  840. unregister_framebuffer(info);
  841. atmel_lcdfb_stop_clock(sinfo);
  842. clk_put(sinfo->lcdc_clk);
  843. if (sinfo->bus_clk)
  844. clk_put(sinfo->bus_clk);
  845. fb_dealloc_cmap(&info->cmap);
  846. free_irq(sinfo->irq_base, info);
  847. iounmap(sinfo->mmio);
  848. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  849. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  850. iounmap(info->screen_base);
  851. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  852. } else {
  853. atmel_lcdfb_free_video_memory(sinfo);
  854. }
  855. dev_set_drvdata(dev, NULL);
  856. framebuffer_release(info);
  857. return 0;
  858. }
  859. #ifdef CONFIG_PM
  860. static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
  861. {
  862. struct fb_info *info = platform_get_drvdata(pdev);
  863. struct atmel_lcdfb_info *sinfo = info->par;
  864. /*
  865. * We don't want to handle interrupts while the clock is
  866. * stopped. It may take forever.
  867. */
  868. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  869. sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  870. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
  871. if (sinfo->atmel_lcdfb_power_control)
  872. sinfo->atmel_lcdfb_power_control(0);
  873. atmel_lcdfb_stop(sinfo);
  874. atmel_lcdfb_stop_clock(sinfo);
  875. return 0;
  876. }
  877. static int atmel_lcdfb_resume(struct platform_device *pdev)
  878. {
  879. struct fb_info *info = platform_get_drvdata(pdev);
  880. struct atmel_lcdfb_info *sinfo = info->par;
  881. atmel_lcdfb_start_clock(sinfo);
  882. atmel_lcdfb_start(sinfo);
  883. if (sinfo->atmel_lcdfb_power_control)
  884. sinfo->atmel_lcdfb_power_control(1);
  885. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
  886. /* Enable FIFO & DMA errors */
  887. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
  888. | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  889. return 0;
  890. }
  891. #else
  892. #define atmel_lcdfb_suspend NULL
  893. #define atmel_lcdfb_resume NULL
  894. #endif
  895. static struct platform_driver atmel_lcdfb_driver = {
  896. .remove = __exit_p(atmel_lcdfb_remove),
  897. .suspend = atmel_lcdfb_suspend,
  898. .resume = atmel_lcdfb_resume,
  899. .driver = {
  900. .name = "atmel_lcdfb",
  901. .owner = THIS_MODULE,
  902. },
  903. };
  904. static int __init atmel_lcdfb_init(void)
  905. {
  906. return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
  907. }
  908. static void __exit atmel_lcdfb_exit(void)
  909. {
  910. platform_driver_unregister(&atmel_lcdfb_driver);
  911. }
  912. module_init(atmel_lcdfb_init);
  913. module_exit(atmel_lcdfb_exit);
  914. MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
  915. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  916. MODULE_LICENSE("GPL");