qla_init.c 121 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  50. {
  51. int rval;
  52. struct qla_hw_data *ha = vha->hw;
  53. struct req_que *req = ha->req_q_map[0];
  54. /* Clear adapter flags. */
  55. vha->flags.online = 0;
  56. ha->flags.chip_reset_done = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->isp_abort_cnt = 0;
  65. ha->beacon_blink_led = 0;
  66. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  67. set_bit(0, ha->req_qid_map);
  68. set_bit(0, ha->rsp_qid_map);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops->pci_config(vha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  73. vha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops->reset_chip(vha);
  77. rval = qla2xxx_get_flash_info(vha);
  78. if (rval) {
  79. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  80. vha->host_no));
  81. return (rval);
  82. }
  83. ha->isp_ops->get_flash_version(vha, req->ring);
  84. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  85. ha->isp_ops->nvram_config(vha);
  86. if (ha->flags.disable_serdes) {
  87. /* Mask HBA via NVRAM settings? */
  88. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  89. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  90. vha->port_name[0], vha->port_name[1],
  91. vha->port_name[2], vha->port_name[3],
  92. vha->port_name[4], vha->port_name[5],
  93. vha->port_name[6], vha->port_name[7]);
  94. return QLA_FUNCTION_FAILED;
  95. }
  96. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  97. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  98. rval = ha->isp_ops->chip_diag(vha);
  99. if (rval)
  100. return (rval);
  101. rval = qla2x00_setup_chip(vha);
  102. if (rval)
  103. return (rval);
  104. }
  105. if (IS_QLA84XX(ha)) {
  106. ha->cs84xx = qla84xx_get_chip(vha);
  107. if (!ha->cs84xx) {
  108. qla_printk(KERN_ERR, ha,
  109. "Unable to configure ISP84XX.\n");
  110. return QLA_FUNCTION_FAILED;
  111. }
  112. }
  113. rval = qla2x00_init_rings(vha);
  114. ha->flags.chip_reset_done = 1;
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. unsigned long flags = 0;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  425. uint32_t cnt, d2;
  426. uint16_t wd;
  427. spin_lock_irqsave(&ha->hardware_lock, flags);
  428. /* Reset RISC. */
  429. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. for (cnt = 0; cnt < 30000; cnt++) {
  431. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  432. break;
  433. udelay(10);
  434. }
  435. WRT_REG_DWORD(&reg->ctrl_status,
  436. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  437. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  438. udelay(100);
  439. /* Wait for firmware to complete NVRAM accesses. */
  440. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  441. for (cnt = 10000 ; cnt && d2; cnt--) {
  442. udelay(5);
  443. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  444. barrier();
  445. }
  446. /* Wait for soft-reset to complete. */
  447. d2 = RD_REG_DWORD(&reg->ctrl_status);
  448. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  449. udelay(5);
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. barrier();
  452. }
  453. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  454. RD_REG_DWORD(&reg->hccr);
  455. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  456. RD_REG_DWORD(&reg->hccr);
  457. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  458. RD_REG_DWORD(&reg->hccr);
  459. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  460. for (cnt = 6000000 ; cnt && d2; cnt--) {
  461. udelay(5);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. barrier();
  464. }
  465. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  466. if (IS_NOPOLLING_TYPE(ha))
  467. ha->isp_ops->enable_intrs(ha);
  468. }
  469. /**
  470. * qla24xx_reset_chip() - Reset ISP24xx chip.
  471. * @ha: HA context
  472. *
  473. * Returns 0 on success.
  474. */
  475. void
  476. qla24xx_reset_chip(scsi_qla_host_t *vha)
  477. {
  478. struct qla_hw_data *ha = vha->hw;
  479. ha->isp_ops->disable_intrs(ha);
  480. /* Perform RISC reset. */
  481. qla24xx_reset_risc(vha);
  482. }
  483. /**
  484. * qla2x00_chip_diag() - Test chip for proper operation.
  485. * @ha: HA context
  486. *
  487. * Returns 0 on success.
  488. */
  489. int
  490. qla2x00_chip_diag(scsi_qla_host_t *vha)
  491. {
  492. int rval;
  493. struct qla_hw_data *ha = vha->hw;
  494. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  495. unsigned long flags = 0;
  496. uint16_t data;
  497. uint32_t cnt;
  498. uint16_t mb[5];
  499. struct req_que *req = ha->req_q_map[0];
  500. /* Assume a failed state */
  501. rval = QLA_FUNCTION_FAILED;
  502. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  503. vha->host_no, (u_long)&reg->flash_address));
  504. spin_lock_irqsave(&ha->hardware_lock, flags);
  505. /* Reset ISP chip. */
  506. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  507. /*
  508. * We need to have a delay here since the card will not respond while
  509. * in reset causing an MCA on some architectures.
  510. */
  511. udelay(20);
  512. data = qla2x00_debounce_register(&reg->ctrl_status);
  513. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  514. udelay(5);
  515. data = RD_REG_WORD(&reg->ctrl_status);
  516. barrier();
  517. }
  518. if (!cnt)
  519. goto chip_diag_failed;
  520. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  521. vha->host_no));
  522. /* Reset RISC processor. */
  523. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  524. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  525. /* Workaround for QLA2312 PCI parity error */
  526. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  527. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  528. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  529. udelay(5);
  530. data = RD_MAILBOX_REG(ha, reg, 0);
  531. barrier();
  532. }
  533. } else
  534. udelay(10);
  535. if (!cnt)
  536. goto chip_diag_failed;
  537. /* Check product ID of chip */
  538. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  539. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  540. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  541. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  542. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  543. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  544. mb[3] != PROD_ID_3) {
  545. qla_printk(KERN_WARNING, ha,
  546. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  547. goto chip_diag_failed;
  548. }
  549. ha->product_id[0] = mb[1];
  550. ha->product_id[1] = mb[2];
  551. ha->product_id[2] = mb[3];
  552. ha->product_id[3] = mb[4];
  553. /* Adjust fw RISC transfer size */
  554. if (req->length > 1024)
  555. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  556. else
  557. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  558. req->length;
  559. if (IS_QLA2200(ha) &&
  560. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  561. /* Limit firmware transfer size with a 2200A */
  562. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  563. vha->host_no));
  564. ha->device_type |= DT_ISP2200A;
  565. ha->fw_transfer_size = 128;
  566. }
  567. /* Wrap Incoming Mailboxes Test. */
  568. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  569. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  570. rval = qla2x00_mbx_reg_test(vha);
  571. if (rval) {
  572. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  573. vha->host_no));
  574. qla_printk(KERN_WARNING, ha,
  575. "Failed mailbox send register test\n");
  576. }
  577. else {
  578. /* Flag a successful rval */
  579. rval = QLA_SUCCESS;
  580. }
  581. spin_lock_irqsave(&ha->hardware_lock, flags);
  582. chip_diag_failed:
  583. if (rval)
  584. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  585. "****\n", vha->host_no));
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. return (rval);
  588. }
  589. /**
  590. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. int
  596. qla24xx_chip_diag(scsi_qla_host_t *vha)
  597. {
  598. int rval;
  599. struct qla_hw_data *ha = vha->hw;
  600. struct req_que *req = ha->req_q_map[0];
  601. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  602. rval = qla2x00_mbx_reg_test(vha);
  603. if (rval) {
  604. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  605. vha->host_no));
  606. qla_printk(KERN_WARNING, ha,
  607. "Failed mailbox send register test\n");
  608. } else {
  609. /* Flag a successful rval */
  610. rval = QLA_SUCCESS;
  611. }
  612. return rval;
  613. }
  614. void
  615. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  616. {
  617. int rval;
  618. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  619. eft_size, fce_size, mq_size;
  620. dma_addr_t tc_dma;
  621. void *tc;
  622. struct qla_hw_data *ha = vha->hw;
  623. struct req_que *req = ha->req_q_map[0];
  624. struct rsp_que *rsp = ha->rsp_q_map[0];
  625. if (ha->fw_dump) {
  626. qla_printk(KERN_WARNING, ha,
  627. "Firmware dump previously allocated.\n");
  628. return;
  629. }
  630. ha->fw_dumped = 0;
  631. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  632. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  633. fixed_size = sizeof(struct qla2100_fw_dump);
  634. } else if (IS_QLA23XX(ha)) {
  635. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  636. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  637. sizeof(uint16_t);
  638. } else if (IS_FWI2_CAPABLE(ha)) {
  639. if (IS_QLA81XX(ha))
  640. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  641. else if (IS_QLA25XX(ha))
  642. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  643. else
  644. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  645. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  646. sizeof(uint32_t);
  647. if (ha->mqenable)
  648. mq_size = sizeof(struct qla2xxx_mq_chain);
  649. /* Allocate memory for Fibre Channel Event Buffer. */
  650. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  651. goto try_eft;
  652. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  653. GFP_KERNEL);
  654. if (!tc) {
  655. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  656. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  657. goto try_eft;
  658. }
  659. memset(tc, 0, FCE_SIZE);
  660. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  661. ha->fce_mb, &ha->fce_bufs);
  662. if (rval) {
  663. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  664. "FCE (%d).\n", rval);
  665. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  666. tc_dma);
  667. ha->flags.fce_enabled = 0;
  668. goto try_eft;
  669. }
  670. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  671. FCE_SIZE / 1024);
  672. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  673. ha->flags.fce_enabled = 1;
  674. ha->fce_dma = tc_dma;
  675. ha->fce = tc;
  676. try_eft:
  677. /* Allocate memory for Extended Trace Buffer. */
  678. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  679. GFP_KERNEL);
  680. if (!tc) {
  681. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  682. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  683. goto cont_alloc;
  684. }
  685. memset(tc, 0, EFT_SIZE);
  686. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  687. if (rval) {
  688. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  689. "EFT (%d).\n", rval);
  690. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  691. tc_dma);
  692. goto cont_alloc;
  693. }
  694. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  695. EFT_SIZE / 1024);
  696. eft_size = EFT_SIZE;
  697. ha->eft_dma = tc_dma;
  698. ha->eft = tc;
  699. }
  700. cont_alloc:
  701. req_q_size = req->length * sizeof(request_t);
  702. rsp_q_size = rsp->length * sizeof(response_t);
  703. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  704. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  705. ha->chain_offset = dump_size;
  706. dump_size += mq_size + fce_size;
  707. ha->fw_dump = vmalloc(dump_size);
  708. if (!ha->fw_dump) {
  709. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  710. "firmware dump!!!\n", dump_size / 1024);
  711. if (ha->eft) {
  712. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  713. ha->eft_dma);
  714. ha->eft = NULL;
  715. ha->eft_dma = 0;
  716. }
  717. return;
  718. }
  719. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  720. dump_size / 1024);
  721. ha->fw_dump_len = dump_size;
  722. ha->fw_dump->signature[0] = 'Q';
  723. ha->fw_dump->signature[1] = 'L';
  724. ha->fw_dump->signature[2] = 'G';
  725. ha->fw_dump->signature[3] = 'C';
  726. ha->fw_dump->version = __constant_htonl(1);
  727. ha->fw_dump->fixed_size = htonl(fixed_size);
  728. ha->fw_dump->mem_size = htonl(mem_size);
  729. ha->fw_dump->req_q_size = htonl(req_q_size);
  730. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  731. ha->fw_dump->eft_size = htonl(eft_size);
  732. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  733. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  734. ha->fw_dump->header_size =
  735. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  736. }
  737. static int
  738. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  739. {
  740. #define MPS_MASK 0xe0
  741. int rval;
  742. uint16_t dc;
  743. uint32_t dw;
  744. struct qla_hw_data *ha = vha->hw;
  745. if (!IS_QLA81XX(vha->hw))
  746. return QLA_SUCCESS;
  747. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  748. if (rval != QLA_SUCCESS) {
  749. DEBUG2(qla_printk(KERN_WARNING, ha,
  750. "Sync-MPI: Unable to acquire semaphore.\n"));
  751. goto done;
  752. }
  753. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  754. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  755. if (rval != QLA_SUCCESS) {
  756. DEBUG2(qla_printk(KERN_WARNING, ha,
  757. "Sync-MPI: Unable to read sync.\n"));
  758. goto done_release;
  759. }
  760. dc &= MPS_MASK;
  761. if (dc == (dw & MPS_MASK))
  762. goto done_release;
  763. dw &= ~MPS_MASK;
  764. dw |= dc;
  765. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  766. if (rval != QLA_SUCCESS) {
  767. DEBUG2(qla_printk(KERN_WARNING, ha,
  768. "Sync-MPI: Unable to gain sync.\n"));
  769. }
  770. done_release:
  771. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  772. if (rval != QLA_SUCCESS) {
  773. DEBUG2(qla_printk(KERN_WARNING, ha,
  774. "Sync-MPI: Unable to release semaphore.\n"));
  775. }
  776. done:
  777. return rval;
  778. }
  779. /**
  780. * qla2x00_setup_chip() - Load and start RISC firmware.
  781. * @ha: HA context
  782. *
  783. * Returns 0 on success.
  784. */
  785. static int
  786. qla2x00_setup_chip(scsi_qla_host_t *vha)
  787. {
  788. int rval;
  789. uint32_t srisc_address = 0;
  790. struct qla_hw_data *ha = vha->hw;
  791. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  792. unsigned long flags;
  793. uint16_t fw_major_version;
  794. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  795. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  796. spin_lock_irqsave(&ha->hardware_lock, flags);
  797. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  798. RD_REG_WORD(&reg->hccr);
  799. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  800. }
  801. qla81xx_mpi_sync(vha);
  802. /* Load firmware sequences */
  803. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  804. if (rval == QLA_SUCCESS) {
  805. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  806. "code.\n", vha->host_no));
  807. rval = qla2x00_verify_checksum(vha, srisc_address);
  808. if (rval == QLA_SUCCESS) {
  809. /* Start firmware execution. */
  810. DEBUG(printk("scsi(%ld): Checksum OK, start "
  811. "firmware.\n", vha->host_no));
  812. rval = qla2x00_execute_fw(vha, srisc_address);
  813. /* Retrieve firmware information. */
  814. if (rval == QLA_SUCCESS) {
  815. fw_major_version = ha->fw_major_version;
  816. rval = qla2x00_get_fw_version(vha,
  817. &ha->fw_major_version,
  818. &ha->fw_minor_version,
  819. &ha->fw_subminor_version,
  820. &ha->fw_attributes, &ha->fw_memory_size,
  821. ha->mpi_version, &ha->mpi_capabilities,
  822. ha->phy_version);
  823. if (rval != QLA_SUCCESS)
  824. goto failed;
  825. ha->flags.npiv_supported = 0;
  826. if (IS_QLA2XXX_MIDTYPE(ha) &&
  827. (ha->fw_attributes & BIT_2)) {
  828. ha->flags.npiv_supported = 1;
  829. if ((!ha->max_npiv_vports) ||
  830. ((ha->max_npiv_vports + 1) %
  831. MIN_MULTI_ID_FABRIC))
  832. ha->max_npiv_vports =
  833. MIN_MULTI_ID_FABRIC - 1;
  834. }
  835. qla2x00_get_resource_cnts(vha, NULL,
  836. &ha->fw_xcb_count, NULL, NULL,
  837. &ha->max_npiv_vports);
  838. if (!fw_major_version && ql2xallocfwdump)
  839. qla2x00_alloc_fw_dump(vha);
  840. }
  841. } else {
  842. DEBUG2(printk(KERN_INFO
  843. "scsi(%ld): ISP Firmware failed checksum.\n",
  844. vha->host_no));
  845. }
  846. }
  847. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  848. /* Enable proper parity. */
  849. spin_lock_irqsave(&ha->hardware_lock, flags);
  850. if (IS_QLA2300(ha))
  851. /* SRAM parity */
  852. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  853. else
  854. /* SRAM, Instruction RAM and GP RAM parity */
  855. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  856. RD_REG_WORD(&reg->hccr);
  857. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  858. }
  859. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  860. uint32_t size;
  861. rval = qla81xx_fac_get_sector_size(vha, &size);
  862. if (rval == QLA_SUCCESS) {
  863. ha->flags.fac_supported = 1;
  864. ha->fdt_block_size = size << 2;
  865. } else {
  866. qla_printk(KERN_ERR, ha,
  867. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  868. ha->fw_major_version, ha->fw_minor_version,
  869. ha->fw_subminor_version);
  870. }
  871. }
  872. failed:
  873. if (rval) {
  874. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  875. vha->host_no));
  876. }
  877. return (rval);
  878. }
  879. /**
  880. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  881. * @ha: HA context
  882. *
  883. * Beginning of request ring has initialization control block already built
  884. * by nvram config routine.
  885. *
  886. * Returns 0 on success.
  887. */
  888. void
  889. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  890. {
  891. uint16_t cnt;
  892. response_t *pkt;
  893. rsp->ring_ptr = rsp->ring;
  894. rsp->ring_index = 0;
  895. rsp->status_srb = NULL;
  896. pkt = rsp->ring_ptr;
  897. for (cnt = 0; cnt < rsp->length; cnt++) {
  898. pkt->signature = RESPONSE_PROCESSED;
  899. pkt++;
  900. }
  901. }
  902. /**
  903. * qla2x00_update_fw_options() - Read and process firmware options.
  904. * @ha: HA context
  905. *
  906. * Returns 0 on success.
  907. */
  908. void
  909. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  910. {
  911. uint16_t swing, emphasis, tx_sens, rx_sens;
  912. struct qla_hw_data *ha = vha->hw;
  913. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  914. qla2x00_get_fw_options(vha, ha->fw_options);
  915. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  916. return;
  917. /* Serial Link options. */
  918. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  919. vha->host_no));
  920. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  921. sizeof(ha->fw_seriallink_options)));
  922. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  923. if (ha->fw_seriallink_options[3] & BIT_2) {
  924. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  925. /* 1G settings */
  926. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  927. emphasis = (ha->fw_seriallink_options[2] &
  928. (BIT_4 | BIT_3)) >> 3;
  929. tx_sens = ha->fw_seriallink_options[0] &
  930. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  931. rx_sens = (ha->fw_seriallink_options[0] &
  932. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  933. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  934. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  935. if (rx_sens == 0x0)
  936. rx_sens = 0x3;
  937. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  938. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  939. ha->fw_options[10] |= BIT_5 |
  940. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  941. (tx_sens & (BIT_1 | BIT_0));
  942. /* 2G settings */
  943. swing = (ha->fw_seriallink_options[2] &
  944. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  945. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  946. tx_sens = ha->fw_seriallink_options[1] &
  947. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  948. rx_sens = (ha->fw_seriallink_options[1] &
  949. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  950. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  951. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  952. if (rx_sens == 0x0)
  953. rx_sens = 0x3;
  954. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  955. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  956. ha->fw_options[11] |= BIT_5 |
  957. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  958. (tx_sens & (BIT_1 | BIT_0));
  959. }
  960. /* FCP2 options. */
  961. /* Return command IOCBs without waiting for an ABTS to complete. */
  962. ha->fw_options[3] |= BIT_13;
  963. /* LED scheme. */
  964. if (ha->flags.enable_led_scheme)
  965. ha->fw_options[2] |= BIT_12;
  966. /* Detect ISP6312. */
  967. if (IS_QLA6312(ha))
  968. ha->fw_options[2] |= BIT_13;
  969. /* Update firmware options. */
  970. qla2x00_set_fw_options(vha, ha->fw_options);
  971. }
  972. void
  973. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  974. {
  975. int rval;
  976. struct qla_hw_data *ha = vha->hw;
  977. /* Update Serial Link options. */
  978. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  979. return;
  980. rval = qla2x00_set_serdes_params(vha,
  981. le16_to_cpu(ha->fw_seriallink_options24[1]),
  982. le16_to_cpu(ha->fw_seriallink_options24[2]),
  983. le16_to_cpu(ha->fw_seriallink_options24[3]));
  984. if (rval != QLA_SUCCESS) {
  985. qla_printk(KERN_WARNING, ha,
  986. "Unable to update Serial Link options (%x).\n", rval);
  987. }
  988. }
  989. void
  990. qla2x00_config_rings(struct scsi_qla_host *vha)
  991. {
  992. struct qla_hw_data *ha = vha->hw;
  993. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  994. struct req_que *req = ha->req_q_map[0];
  995. struct rsp_que *rsp = ha->rsp_q_map[0];
  996. /* Setup ring parameters in initialization control block. */
  997. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  998. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  999. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1000. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1001. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1002. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1003. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1004. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1005. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1006. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1007. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1008. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1009. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1010. }
  1011. void
  1012. qla24xx_config_rings(struct scsi_qla_host *vha)
  1013. {
  1014. struct qla_hw_data *ha = vha->hw;
  1015. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1016. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1017. struct qla_msix_entry *msix;
  1018. struct init_cb_24xx *icb;
  1019. uint16_t rid = 0;
  1020. struct req_que *req = ha->req_q_map[0];
  1021. struct rsp_que *rsp = ha->rsp_q_map[0];
  1022. /* Setup ring parameters in initialization control block. */
  1023. icb = (struct init_cb_24xx *)ha->init_cb;
  1024. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1025. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1026. icb->request_q_length = cpu_to_le16(req->length);
  1027. icb->response_q_length = cpu_to_le16(rsp->length);
  1028. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1029. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1030. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1031. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1032. if (ha->mqenable) {
  1033. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1034. icb->rid = __constant_cpu_to_le16(rid);
  1035. if (ha->flags.msix_enabled) {
  1036. msix = &ha->msix_entries[1];
  1037. DEBUG2_17(printk(KERN_INFO
  1038. "Registering vector 0x%x for base que\n", msix->entry));
  1039. icb->msix = cpu_to_le16(msix->entry);
  1040. }
  1041. /* Use alternate PCI bus number */
  1042. if (MSB(rid))
  1043. icb->firmware_options_2 |=
  1044. __constant_cpu_to_le32(BIT_19);
  1045. /* Use alternate PCI devfn */
  1046. if (LSB(rid))
  1047. icb->firmware_options_2 |=
  1048. __constant_cpu_to_le32(BIT_18);
  1049. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1050. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1051. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1052. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1053. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1054. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1055. } else {
  1056. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1057. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1058. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1059. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1060. }
  1061. /* PCI posting */
  1062. RD_REG_DWORD(&ioreg->hccr);
  1063. }
  1064. /**
  1065. * qla2x00_init_rings() - Initializes firmware.
  1066. * @ha: HA context
  1067. *
  1068. * Beginning of request ring has initialization control block already built
  1069. * by nvram config routine.
  1070. *
  1071. * Returns 0 on success.
  1072. */
  1073. static int
  1074. qla2x00_init_rings(scsi_qla_host_t *vha)
  1075. {
  1076. int rval;
  1077. unsigned long flags = 0;
  1078. int cnt, que;
  1079. struct qla_hw_data *ha = vha->hw;
  1080. struct req_que *req;
  1081. struct rsp_que *rsp;
  1082. struct scsi_qla_host *vp;
  1083. struct mid_init_cb_24xx *mid_init_cb =
  1084. (struct mid_init_cb_24xx *) ha->init_cb;
  1085. spin_lock_irqsave(&ha->hardware_lock, flags);
  1086. /* Clear outstanding commands array. */
  1087. for (que = 0; que < ha->max_req_queues; que++) {
  1088. req = ha->req_q_map[que];
  1089. if (!req)
  1090. continue;
  1091. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1092. req->outstanding_cmds[cnt] = NULL;
  1093. req->current_outstanding_cmd = 1;
  1094. /* Initialize firmware. */
  1095. req->ring_ptr = req->ring;
  1096. req->ring_index = 0;
  1097. req->cnt = req->length;
  1098. }
  1099. for (que = 0; que < ha->max_rsp_queues; que++) {
  1100. rsp = ha->rsp_q_map[que];
  1101. if (!rsp)
  1102. continue;
  1103. /* Initialize response queue entries */
  1104. qla2x00_init_response_q_entries(rsp);
  1105. }
  1106. /* Clear RSCN queue. */
  1107. list_for_each_entry(vp, &ha->vp_list, list) {
  1108. vp->rscn_in_ptr = 0;
  1109. vp->rscn_out_ptr = 0;
  1110. }
  1111. ha->isp_ops->config_rings(vha);
  1112. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1113. /* Update any ISP specific firmware options before initialization. */
  1114. ha->isp_ops->update_fw_options(vha);
  1115. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1116. if (ha->flags.npiv_supported) {
  1117. if (ha->operating_mode == LOOP)
  1118. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1119. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1120. }
  1121. if (IS_FWI2_CAPABLE(ha)) {
  1122. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1123. mid_init_cb->init_cb.execution_throttle =
  1124. cpu_to_le16(ha->fw_xcb_count);
  1125. }
  1126. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1127. if (rval) {
  1128. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1129. vha->host_no));
  1130. } else {
  1131. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1132. vha->host_no));
  1133. }
  1134. return (rval);
  1135. }
  1136. /**
  1137. * qla2x00_fw_ready() - Waits for firmware ready.
  1138. * @ha: HA context
  1139. *
  1140. * Returns 0 on success.
  1141. */
  1142. static int
  1143. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1144. {
  1145. int rval;
  1146. unsigned long wtime, mtime, cs84xx_time;
  1147. uint16_t min_wait; /* Minimum wait time if loop is down */
  1148. uint16_t wait_time; /* Wait time if loop is coming ready */
  1149. uint16_t state[5];
  1150. struct qla_hw_data *ha = vha->hw;
  1151. rval = QLA_SUCCESS;
  1152. /* 20 seconds for loop down. */
  1153. min_wait = 20;
  1154. /*
  1155. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1156. * our own processing.
  1157. */
  1158. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1159. wait_time = min_wait;
  1160. }
  1161. /* Min wait time if loop down */
  1162. mtime = jiffies + (min_wait * HZ);
  1163. /* wait time before firmware ready */
  1164. wtime = jiffies + (wait_time * HZ);
  1165. /* Wait for ISP to finish LIP */
  1166. if (!vha->flags.init_done)
  1167. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1168. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1169. vha->host_no));
  1170. do {
  1171. rval = qla2x00_get_firmware_state(vha, state);
  1172. if (rval == QLA_SUCCESS) {
  1173. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1174. vha->device_flags &= ~DFLG_NO_CABLE;
  1175. }
  1176. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1177. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1178. "84xx=%x.\n", vha->host_no, state[0],
  1179. state[2]));
  1180. if ((state[2] & FSTATE_LOGGED_IN) &&
  1181. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1182. DEBUG16(printk("scsi(%ld): Sending "
  1183. "verify iocb.\n", vha->host_no));
  1184. cs84xx_time = jiffies;
  1185. rval = qla84xx_init_chip(vha);
  1186. if (rval != QLA_SUCCESS)
  1187. break;
  1188. /* Add time taken to initialize. */
  1189. cs84xx_time = jiffies - cs84xx_time;
  1190. wtime += cs84xx_time;
  1191. mtime += cs84xx_time;
  1192. DEBUG16(printk("scsi(%ld): Increasing "
  1193. "wait time by %ld. New time %ld\n",
  1194. vha->host_no, cs84xx_time, wtime));
  1195. }
  1196. } else if (state[0] == FSTATE_READY) {
  1197. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1198. vha->host_no));
  1199. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1200. &ha->login_timeout, &ha->r_a_tov);
  1201. rval = QLA_SUCCESS;
  1202. break;
  1203. }
  1204. rval = QLA_FUNCTION_FAILED;
  1205. if (atomic_read(&vha->loop_down_timer) &&
  1206. state[0] != FSTATE_READY) {
  1207. /* Loop down. Timeout on min_wait for states
  1208. * other than Wait for Login.
  1209. */
  1210. if (time_after_eq(jiffies, mtime)) {
  1211. qla_printk(KERN_INFO, ha,
  1212. "Cable is unplugged...\n");
  1213. vha->device_flags |= DFLG_NO_CABLE;
  1214. break;
  1215. }
  1216. }
  1217. } else {
  1218. /* Mailbox cmd failed. Timeout on min_wait. */
  1219. if (time_after_eq(jiffies, mtime))
  1220. break;
  1221. }
  1222. if (time_after_eq(jiffies, wtime))
  1223. break;
  1224. /* Delay for a while */
  1225. msleep(500);
  1226. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1227. vha->host_no, state[0], jiffies));
  1228. } while (1);
  1229. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1230. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1231. jiffies));
  1232. if (rval) {
  1233. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1234. vha->host_no));
  1235. }
  1236. return (rval);
  1237. }
  1238. /*
  1239. * qla2x00_configure_hba
  1240. * Setup adapter context.
  1241. *
  1242. * Input:
  1243. * ha = adapter state pointer.
  1244. *
  1245. * Returns:
  1246. * 0 = success
  1247. *
  1248. * Context:
  1249. * Kernel context.
  1250. */
  1251. static int
  1252. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1253. {
  1254. int rval;
  1255. uint16_t loop_id;
  1256. uint16_t topo;
  1257. uint16_t sw_cap;
  1258. uint8_t al_pa;
  1259. uint8_t area;
  1260. uint8_t domain;
  1261. char connect_type[22];
  1262. struct qla_hw_data *ha = vha->hw;
  1263. /* Get host addresses. */
  1264. rval = qla2x00_get_adapter_id(vha,
  1265. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1266. if (rval != QLA_SUCCESS) {
  1267. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1268. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1269. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1270. __func__, vha->host_no));
  1271. } else {
  1272. qla_printk(KERN_WARNING, ha,
  1273. "ERROR -- Unable to get host loop ID.\n");
  1274. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1275. }
  1276. return (rval);
  1277. }
  1278. if (topo == 4) {
  1279. qla_printk(KERN_INFO, ha,
  1280. "Cannot get topology - retrying.\n");
  1281. return (QLA_FUNCTION_FAILED);
  1282. }
  1283. vha->loop_id = loop_id;
  1284. /* initialize */
  1285. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1286. ha->operating_mode = LOOP;
  1287. ha->switch_cap = 0;
  1288. switch (topo) {
  1289. case 0:
  1290. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1291. vha->host_no));
  1292. ha->current_topology = ISP_CFG_NL;
  1293. strcpy(connect_type, "(Loop)");
  1294. break;
  1295. case 1:
  1296. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1297. vha->host_no));
  1298. ha->switch_cap = sw_cap;
  1299. ha->current_topology = ISP_CFG_FL;
  1300. strcpy(connect_type, "(FL_Port)");
  1301. break;
  1302. case 2:
  1303. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1304. vha->host_no));
  1305. ha->operating_mode = P2P;
  1306. ha->current_topology = ISP_CFG_N;
  1307. strcpy(connect_type, "(N_Port-to-N_Port)");
  1308. break;
  1309. case 3:
  1310. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1311. vha->host_no));
  1312. ha->switch_cap = sw_cap;
  1313. ha->operating_mode = P2P;
  1314. ha->current_topology = ISP_CFG_F;
  1315. strcpy(connect_type, "(F_Port)");
  1316. break;
  1317. default:
  1318. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1319. "Using NL.\n",
  1320. vha->host_no, topo));
  1321. ha->current_topology = ISP_CFG_NL;
  1322. strcpy(connect_type, "(Loop)");
  1323. break;
  1324. }
  1325. /* Save Host port and loop ID. */
  1326. /* byte order - Big Endian */
  1327. vha->d_id.b.domain = domain;
  1328. vha->d_id.b.area = area;
  1329. vha->d_id.b.al_pa = al_pa;
  1330. if (!vha->flags.init_done)
  1331. qla_printk(KERN_INFO, ha,
  1332. "Topology - %s, Host Loop address 0x%x\n",
  1333. connect_type, vha->loop_id);
  1334. if (rval) {
  1335. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1336. } else {
  1337. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1338. }
  1339. return(rval);
  1340. }
  1341. static inline void
  1342. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1343. char *def)
  1344. {
  1345. char *st, *en;
  1346. uint16_t index;
  1347. struct qla_hw_data *ha = vha->hw;
  1348. int use_tbl = !IS_QLA25XX(ha) && !IS_QLA81XX(ha);
  1349. if (memcmp(model, BINZERO, len) != 0) {
  1350. strncpy(ha->model_number, model, len);
  1351. st = en = ha->model_number;
  1352. en += len - 1;
  1353. while (en > st) {
  1354. if (*en != 0x20 && *en != 0x00)
  1355. break;
  1356. *en-- = '\0';
  1357. }
  1358. index = (ha->pdev->subsystem_device & 0xff);
  1359. if (use_tbl &&
  1360. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1361. index < QLA_MODEL_NAMES)
  1362. strncpy(ha->model_desc,
  1363. qla2x00_model_name[index * 2 + 1],
  1364. sizeof(ha->model_desc) - 1);
  1365. } else {
  1366. index = (ha->pdev->subsystem_device & 0xff);
  1367. if (use_tbl &&
  1368. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1369. index < QLA_MODEL_NAMES) {
  1370. strcpy(ha->model_number,
  1371. qla2x00_model_name[index * 2]);
  1372. strncpy(ha->model_desc,
  1373. qla2x00_model_name[index * 2 + 1],
  1374. sizeof(ha->model_desc) - 1);
  1375. } else {
  1376. strcpy(ha->model_number, def);
  1377. }
  1378. }
  1379. if (IS_FWI2_CAPABLE(ha))
  1380. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1381. sizeof(ha->model_desc));
  1382. }
  1383. /* On sparc systems, obtain port and node WWN from firmware
  1384. * properties.
  1385. */
  1386. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1387. {
  1388. #ifdef CONFIG_SPARC
  1389. struct qla_hw_data *ha = vha->hw;
  1390. struct pci_dev *pdev = ha->pdev;
  1391. struct device_node *dp = pci_device_to_OF_node(pdev);
  1392. const u8 *val;
  1393. int len;
  1394. val = of_get_property(dp, "port-wwn", &len);
  1395. if (val && len >= WWN_SIZE)
  1396. memcpy(nv->port_name, val, WWN_SIZE);
  1397. val = of_get_property(dp, "node-wwn", &len);
  1398. if (val && len >= WWN_SIZE)
  1399. memcpy(nv->node_name, val, WWN_SIZE);
  1400. #endif
  1401. }
  1402. /*
  1403. * NVRAM configuration for ISP 2xxx
  1404. *
  1405. * Input:
  1406. * ha = adapter block pointer.
  1407. *
  1408. * Output:
  1409. * initialization control block in response_ring
  1410. * host adapters parameters in host adapter block
  1411. *
  1412. * Returns:
  1413. * 0 = success.
  1414. */
  1415. int
  1416. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1417. {
  1418. int rval;
  1419. uint8_t chksum = 0;
  1420. uint16_t cnt;
  1421. uint8_t *dptr1, *dptr2;
  1422. struct qla_hw_data *ha = vha->hw;
  1423. init_cb_t *icb = ha->init_cb;
  1424. nvram_t *nv = ha->nvram;
  1425. uint8_t *ptr = ha->nvram;
  1426. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1427. rval = QLA_SUCCESS;
  1428. /* Determine NVRAM starting address. */
  1429. ha->nvram_size = sizeof(nvram_t);
  1430. ha->nvram_base = 0;
  1431. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1432. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1433. ha->nvram_base = 0x80;
  1434. /* Get NVRAM data and calculate checksum. */
  1435. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1436. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1437. chksum += *ptr++;
  1438. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1439. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1440. /* Bad NVRAM data, set defaults parameters. */
  1441. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1442. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1443. /* Reset NVRAM data. */
  1444. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1445. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1446. nv->nvram_version);
  1447. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1448. "invalid -- WWPN) defaults.\n");
  1449. /*
  1450. * Set default initialization control block.
  1451. */
  1452. memset(nv, 0, ha->nvram_size);
  1453. nv->parameter_block_version = ICB_VERSION;
  1454. if (IS_QLA23XX(ha)) {
  1455. nv->firmware_options[0] = BIT_2 | BIT_1;
  1456. nv->firmware_options[1] = BIT_7 | BIT_5;
  1457. nv->add_firmware_options[0] = BIT_5;
  1458. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1459. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1460. nv->special_options[1] = BIT_7;
  1461. } else if (IS_QLA2200(ha)) {
  1462. nv->firmware_options[0] = BIT_2 | BIT_1;
  1463. nv->firmware_options[1] = BIT_7 | BIT_5;
  1464. nv->add_firmware_options[0] = BIT_5;
  1465. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1466. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1467. } else if (IS_QLA2100(ha)) {
  1468. nv->firmware_options[0] = BIT_3 | BIT_1;
  1469. nv->firmware_options[1] = BIT_5;
  1470. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1471. }
  1472. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1473. nv->execution_throttle = __constant_cpu_to_le16(16);
  1474. nv->retry_count = 8;
  1475. nv->retry_delay = 1;
  1476. nv->port_name[0] = 33;
  1477. nv->port_name[3] = 224;
  1478. nv->port_name[4] = 139;
  1479. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1480. nv->login_timeout = 4;
  1481. /*
  1482. * Set default host adapter parameters
  1483. */
  1484. nv->host_p[1] = BIT_2;
  1485. nv->reset_delay = 5;
  1486. nv->port_down_retry_count = 8;
  1487. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1488. nv->link_down_timeout = 60;
  1489. rval = 1;
  1490. }
  1491. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1492. /*
  1493. * The SN2 does not provide BIOS emulation which means you can't change
  1494. * potentially bogus BIOS settings. Force the use of default settings
  1495. * for link rate and frame size. Hope that the rest of the settings
  1496. * are valid.
  1497. */
  1498. if (ia64_platform_is("sn2")) {
  1499. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1500. if (IS_QLA23XX(ha))
  1501. nv->special_options[1] = BIT_7;
  1502. }
  1503. #endif
  1504. /* Reset Initialization control block */
  1505. memset(icb, 0, ha->init_cb_size);
  1506. /*
  1507. * Setup driver NVRAM options.
  1508. */
  1509. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1510. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1511. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1512. nv->firmware_options[1] &= ~BIT_4;
  1513. if (IS_QLA23XX(ha)) {
  1514. nv->firmware_options[0] |= BIT_2;
  1515. nv->firmware_options[0] &= ~BIT_3;
  1516. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1517. if (IS_QLA2300(ha)) {
  1518. if (ha->fb_rev == FPM_2310) {
  1519. strcpy(ha->model_number, "QLA2310");
  1520. } else {
  1521. strcpy(ha->model_number, "QLA2300");
  1522. }
  1523. } else {
  1524. qla2x00_set_model_info(vha, nv->model_number,
  1525. sizeof(nv->model_number), "QLA23xx");
  1526. }
  1527. } else if (IS_QLA2200(ha)) {
  1528. nv->firmware_options[0] |= BIT_2;
  1529. /*
  1530. * 'Point-to-point preferred, else loop' is not a safe
  1531. * connection mode setting.
  1532. */
  1533. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1534. (BIT_5 | BIT_4)) {
  1535. /* Force 'loop preferred, else point-to-point'. */
  1536. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1537. nv->add_firmware_options[0] |= BIT_5;
  1538. }
  1539. strcpy(ha->model_number, "QLA22xx");
  1540. } else /*if (IS_QLA2100(ha))*/ {
  1541. strcpy(ha->model_number, "QLA2100");
  1542. }
  1543. /*
  1544. * Copy over NVRAM RISC parameter block to initialization control block.
  1545. */
  1546. dptr1 = (uint8_t *)icb;
  1547. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1548. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1549. while (cnt--)
  1550. *dptr1++ = *dptr2++;
  1551. /* Copy 2nd half. */
  1552. dptr1 = (uint8_t *)icb->add_firmware_options;
  1553. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1554. while (cnt--)
  1555. *dptr1++ = *dptr2++;
  1556. /* Use alternate WWN? */
  1557. if (nv->host_p[1] & BIT_7) {
  1558. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1559. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1560. }
  1561. /* Prepare nodename */
  1562. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1563. /*
  1564. * Firmware will apply the following mask if the nodename was
  1565. * not provided.
  1566. */
  1567. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1568. icb->node_name[0] &= 0xF0;
  1569. }
  1570. /*
  1571. * Set host adapter parameters.
  1572. */
  1573. if (nv->host_p[0] & BIT_7)
  1574. ql2xextended_error_logging = 1;
  1575. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1576. /* Always load RISC code on non ISP2[12]00 chips. */
  1577. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1578. ha->flags.disable_risc_code_load = 0;
  1579. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1580. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1581. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1582. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1583. ha->flags.disable_serdes = 0;
  1584. ha->operating_mode =
  1585. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1586. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1587. sizeof(ha->fw_seriallink_options));
  1588. /* save HBA serial number */
  1589. ha->serial0 = icb->port_name[5];
  1590. ha->serial1 = icb->port_name[6];
  1591. ha->serial2 = icb->port_name[7];
  1592. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1593. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1594. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1595. ha->retry_count = nv->retry_count;
  1596. /* Set minimum login_timeout to 4 seconds. */
  1597. if (nv->login_timeout < ql2xlogintimeout)
  1598. nv->login_timeout = ql2xlogintimeout;
  1599. if (nv->login_timeout < 4)
  1600. nv->login_timeout = 4;
  1601. ha->login_timeout = nv->login_timeout;
  1602. icb->login_timeout = nv->login_timeout;
  1603. /* Set minimum RATOV to 100 tenths of a second. */
  1604. ha->r_a_tov = 100;
  1605. ha->loop_reset_delay = nv->reset_delay;
  1606. /* Link Down Timeout = 0:
  1607. *
  1608. * When Port Down timer expires we will start returning
  1609. * I/O's to OS with "DID_NO_CONNECT".
  1610. *
  1611. * Link Down Timeout != 0:
  1612. *
  1613. * The driver waits for the link to come up after link down
  1614. * before returning I/Os to OS with "DID_NO_CONNECT".
  1615. */
  1616. if (nv->link_down_timeout == 0) {
  1617. ha->loop_down_abort_time =
  1618. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1619. } else {
  1620. ha->link_down_timeout = nv->link_down_timeout;
  1621. ha->loop_down_abort_time =
  1622. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1623. }
  1624. /*
  1625. * Need enough time to try and get the port back.
  1626. */
  1627. ha->port_down_retry_count = nv->port_down_retry_count;
  1628. if (qlport_down_retry)
  1629. ha->port_down_retry_count = qlport_down_retry;
  1630. /* Set login_retry_count */
  1631. ha->login_retry_count = nv->retry_count;
  1632. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1633. ha->port_down_retry_count > 3)
  1634. ha->login_retry_count = ha->port_down_retry_count;
  1635. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1636. ha->login_retry_count = ha->port_down_retry_count;
  1637. if (ql2xloginretrycount)
  1638. ha->login_retry_count = ql2xloginretrycount;
  1639. icb->lun_enables = __constant_cpu_to_le16(0);
  1640. icb->command_resource_count = 0;
  1641. icb->immediate_notify_resource_count = 0;
  1642. icb->timeout = __constant_cpu_to_le16(0);
  1643. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1644. /* Enable RIO */
  1645. icb->firmware_options[0] &= ~BIT_3;
  1646. icb->add_firmware_options[0] &=
  1647. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1648. icb->add_firmware_options[0] |= BIT_2;
  1649. icb->response_accumulation_timer = 3;
  1650. icb->interrupt_delay_timer = 5;
  1651. vha->flags.process_response_queue = 1;
  1652. } else {
  1653. /* Enable ZIO. */
  1654. if (!vha->flags.init_done) {
  1655. ha->zio_mode = icb->add_firmware_options[0] &
  1656. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1657. ha->zio_timer = icb->interrupt_delay_timer ?
  1658. icb->interrupt_delay_timer: 2;
  1659. }
  1660. icb->add_firmware_options[0] &=
  1661. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1662. vha->flags.process_response_queue = 0;
  1663. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1664. ha->zio_mode = QLA_ZIO_MODE_6;
  1665. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1666. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1667. ha->zio_timer * 100));
  1668. qla_printk(KERN_INFO, ha,
  1669. "ZIO mode %d enabled; timer delay (%d us).\n",
  1670. ha->zio_mode, ha->zio_timer * 100);
  1671. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1672. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1673. vha->flags.process_response_queue = 1;
  1674. }
  1675. }
  1676. if (rval) {
  1677. DEBUG2_3(printk(KERN_WARNING
  1678. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1679. }
  1680. return (rval);
  1681. }
  1682. static void
  1683. qla2x00_rport_del(void *data)
  1684. {
  1685. fc_port_t *fcport = data;
  1686. struct fc_rport *rport;
  1687. spin_lock_irq(fcport->vha->host->host_lock);
  1688. rport = fcport->drport;
  1689. fcport->drport = NULL;
  1690. spin_unlock_irq(fcport->vha->host->host_lock);
  1691. if (rport)
  1692. fc_remote_port_delete(rport);
  1693. }
  1694. /**
  1695. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1696. * @ha: HA context
  1697. * @flags: allocation flags
  1698. *
  1699. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1700. */
  1701. static fc_port_t *
  1702. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1703. {
  1704. fc_port_t *fcport;
  1705. fcport = kzalloc(sizeof(fc_port_t), flags);
  1706. if (!fcport)
  1707. return NULL;
  1708. /* Setup fcport template structure. */
  1709. fcport->vha = vha;
  1710. fcport->vp_idx = vha->vp_idx;
  1711. fcport->port_type = FCT_UNKNOWN;
  1712. fcport->loop_id = FC_NO_LOOP_ID;
  1713. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1714. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1715. return fcport;
  1716. }
  1717. /*
  1718. * qla2x00_configure_loop
  1719. * Updates Fibre Channel Device Database with what is actually on loop.
  1720. *
  1721. * Input:
  1722. * ha = adapter block pointer.
  1723. *
  1724. * Returns:
  1725. * 0 = success.
  1726. * 1 = error.
  1727. * 2 = database was full and device was not configured.
  1728. */
  1729. static int
  1730. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1731. {
  1732. int rval;
  1733. unsigned long flags, save_flags;
  1734. struct qla_hw_data *ha = vha->hw;
  1735. rval = QLA_SUCCESS;
  1736. /* Get Initiator ID */
  1737. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1738. rval = qla2x00_configure_hba(vha);
  1739. if (rval != QLA_SUCCESS) {
  1740. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1741. vha->host_no));
  1742. return (rval);
  1743. }
  1744. }
  1745. save_flags = flags = vha->dpc_flags;
  1746. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1747. vha->host_no, flags));
  1748. /*
  1749. * If we have both an RSCN and PORT UPDATE pending then handle them
  1750. * both at the same time.
  1751. */
  1752. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1753. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1754. /* Determine what we need to do */
  1755. if (ha->current_topology == ISP_CFG_FL &&
  1756. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1757. vha->flags.rscn_queue_overflow = 1;
  1758. set_bit(RSCN_UPDATE, &flags);
  1759. } else if (ha->current_topology == ISP_CFG_F &&
  1760. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1761. vha->flags.rscn_queue_overflow = 1;
  1762. set_bit(RSCN_UPDATE, &flags);
  1763. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1764. } else if (ha->current_topology == ISP_CFG_N) {
  1765. clear_bit(RSCN_UPDATE, &flags);
  1766. } else if (!vha->flags.online ||
  1767. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1768. vha->flags.rscn_queue_overflow = 1;
  1769. set_bit(RSCN_UPDATE, &flags);
  1770. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1771. }
  1772. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1773. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1774. rval = QLA_FUNCTION_FAILED;
  1775. else
  1776. rval = qla2x00_configure_local_loop(vha);
  1777. }
  1778. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1779. if (LOOP_TRANSITION(vha))
  1780. rval = QLA_FUNCTION_FAILED;
  1781. else
  1782. rval = qla2x00_configure_fabric(vha);
  1783. }
  1784. if (rval == QLA_SUCCESS) {
  1785. if (atomic_read(&vha->loop_down_timer) ||
  1786. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1787. rval = QLA_FUNCTION_FAILED;
  1788. } else {
  1789. atomic_set(&vha->loop_state, LOOP_READY);
  1790. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1791. }
  1792. }
  1793. if (rval) {
  1794. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1795. __func__, vha->host_no));
  1796. } else {
  1797. DEBUG3(printk("%s: exiting normally\n", __func__));
  1798. }
  1799. /* Restore state if a resync event occurred during processing */
  1800. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1801. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1802. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1803. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1804. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1805. vha->flags.rscn_queue_overflow = 1;
  1806. }
  1807. }
  1808. return (rval);
  1809. }
  1810. /*
  1811. * qla2x00_configure_local_loop
  1812. * Updates Fibre Channel Device Database with local loop devices.
  1813. *
  1814. * Input:
  1815. * ha = adapter block pointer.
  1816. *
  1817. * Returns:
  1818. * 0 = success.
  1819. */
  1820. static int
  1821. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1822. {
  1823. int rval, rval2;
  1824. int found_devs;
  1825. int found;
  1826. fc_port_t *fcport, *new_fcport;
  1827. uint16_t index;
  1828. uint16_t entries;
  1829. char *id_iter;
  1830. uint16_t loop_id;
  1831. uint8_t domain, area, al_pa;
  1832. struct qla_hw_data *ha = vha->hw;
  1833. found_devs = 0;
  1834. new_fcport = NULL;
  1835. entries = MAX_FIBRE_DEVICES;
  1836. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1837. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1838. /* Get list of logged in devices. */
  1839. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1840. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1841. &entries);
  1842. if (rval != QLA_SUCCESS)
  1843. goto cleanup_allocation;
  1844. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1845. vha->host_no, entries));
  1846. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1847. entries * sizeof(struct gid_list_info)));
  1848. /* Allocate temporary fcport for any new fcports discovered. */
  1849. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1850. if (new_fcport == NULL) {
  1851. rval = QLA_MEMORY_ALLOC_FAILED;
  1852. goto cleanup_allocation;
  1853. }
  1854. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1855. /*
  1856. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1857. */
  1858. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1859. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1860. fcport->port_type != FCT_BROADCAST &&
  1861. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1862. DEBUG(printk("scsi(%ld): Marking port lost, "
  1863. "loop_id=0x%04x\n",
  1864. vha->host_no, fcport->loop_id));
  1865. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1866. }
  1867. }
  1868. /* Add devices to port list. */
  1869. id_iter = (char *)ha->gid_list;
  1870. for (index = 0; index < entries; index++) {
  1871. domain = ((struct gid_list_info *)id_iter)->domain;
  1872. area = ((struct gid_list_info *)id_iter)->area;
  1873. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1874. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1875. loop_id = (uint16_t)
  1876. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1877. else
  1878. loop_id = le16_to_cpu(
  1879. ((struct gid_list_info *)id_iter)->loop_id);
  1880. id_iter += ha->gid_list_info_size;
  1881. /* Bypass reserved domain fields. */
  1882. if ((domain & 0xf0) == 0xf0)
  1883. continue;
  1884. /* Bypass if not same domain and area of adapter. */
  1885. if (area && domain &&
  1886. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1887. continue;
  1888. /* Bypass invalid local loop ID. */
  1889. if (loop_id > LAST_LOCAL_LOOP_ID)
  1890. continue;
  1891. /* Fill in member data. */
  1892. new_fcport->d_id.b.domain = domain;
  1893. new_fcport->d_id.b.area = area;
  1894. new_fcport->d_id.b.al_pa = al_pa;
  1895. new_fcport->loop_id = loop_id;
  1896. new_fcport->vp_idx = vha->vp_idx;
  1897. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1898. if (rval2 != QLA_SUCCESS) {
  1899. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1900. "information -- get_port_database=%x, "
  1901. "loop_id=0x%04x\n",
  1902. vha->host_no, rval2, new_fcport->loop_id));
  1903. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1904. vha->host_no));
  1905. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1906. continue;
  1907. }
  1908. /* Check for matching device in port list. */
  1909. found = 0;
  1910. fcport = NULL;
  1911. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1912. if (memcmp(new_fcport->port_name, fcport->port_name,
  1913. WWN_SIZE))
  1914. continue;
  1915. fcport->flags &= ~FCF_FABRIC_DEVICE;
  1916. fcport->loop_id = new_fcport->loop_id;
  1917. fcport->port_type = new_fcport->port_type;
  1918. fcport->d_id.b24 = new_fcport->d_id.b24;
  1919. memcpy(fcport->node_name, new_fcport->node_name,
  1920. WWN_SIZE);
  1921. found++;
  1922. break;
  1923. }
  1924. if (!found) {
  1925. /* New device, add to fcports list. */
  1926. if (vha->vp_idx) {
  1927. new_fcport->vha = vha;
  1928. new_fcport->vp_idx = vha->vp_idx;
  1929. }
  1930. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1931. /* Allocate a new replacement fcport. */
  1932. fcport = new_fcport;
  1933. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1934. if (new_fcport == NULL) {
  1935. rval = QLA_MEMORY_ALLOC_FAILED;
  1936. goto cleanup_allocation;
  1937. }
  1938. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1939. }
  1940. /* Base iIDMA settings on HBA port speed. */
  1941. fcport->fp_speed = ha->link_data_rate;
  1942. qla2x00_update_fcport(vha, fcport);
  1943. found_devs++;
  1944. }
  1945. cleanup_allocation:
  1946. kfree(new_fcport);
  1947. if (rval != QLA_SUCCESS) {
  1948. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1949. "rval=%x\n", vha->host_no, rval));
  1950. }
  1951. return (rval);
  1952. }
  1953. static void
  1954. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1955. {
  1956. #define LS_UNKNOWN 2
  1957. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  1958. char *link_speed;
  1959. int rval;
  1960. uint16_t mb[6];
  1961. struct qla_hw_data *ha = vha->hw;
  1962. if (!IS_IIDMA_CAPABLE(ha))
  1963. return;
  1964. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1965. fcport->fp_speed > ha->link_data_rate)
  1966. return;
  1967. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1968. mb);
  1969. if (rval != QLA_SUCCESS) {
  1970. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1971. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1972. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1973. fcport->port_name[2], fcport->port_name[3],
  1974. fcport->port_name[4], fcport->port_name[5],
  1975. fcport->port_name[6], fcport->port_name[7], rval,
  1976. fcport->fp_speed, mb[0], mb[1]));
  1977. } else {
  1978. link_speed = link_speeds[LS_UNKNOWN];
  1979. if (fcport->fp_speed < 5)
  1980. link_speed = link_speeds[fcport->fp_speed];
  1981. else if (fcport->fp_speed == 0x13)
  1982. link_speed = link_speeds[5];
  1983. DEBUG2(qla_printk(KERN_INFO, ha,
  1984. "iIDMA adjusted to %s GB/s on "
  1985. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1986. link_speed, fcport->port_name[0],
  1987. fcport->port_name[1], fcport->port_name[2],
  1988. fcport->port_name[3], fcport->port_name[4],
  1989. fcport->port_name[5], fcport->port_name[6],
  1990. fcport->port_name[7]));
  1991. }
  1992. }
  1993. static void
  1994. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1995. {
  1996. struct fc_rport_identifiers rport_ids;
  1997. struct fc_rport *rport;
  1998. struct qla_hw_data *ha = vha->hw;
  1999. if (fcport->drport)
  2000. qla2x00_rport_del(fcport);
  2001. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2002. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2003. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2004. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2005. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2006. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2007. if (!rport) {
  2008. qla_printk(KERN_WARNING, ha,
  2009. "Unable to allocate fc remote port!\n");
  2010. return;
  2011. }
  2012. spin_lock_irq(fcport->vha->host->host_lock);
  2013. *((fc_port_t **)rport->dd_data) = fcport;
  2014. spin_unlock_irq(fcport->vha->host->host_lock);
  2015. rport->supported_classes = fcport->supported_classes;
  2016. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2017. if (fcport->port_type == FCT_INITIATOR)
  2018. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2019. if (fcport->port_type == FCT_TARGET)
  2020. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2021. fc_remote_port_rolechg(rport, rport_ids.roles);
  2022. }
  2023. /*
  2024. * qla2x00_update_fcport
  2025. * Updates device on list.
  2026. *
  2027. * Input:
  2028. * ha = adapter block pointer.
  2029. * fcport = port structure pointer.
  2030. *
  2031. * Return:
  2032. * 0 - Success
  2033. * BIT_0 - error
  2034. *
  2035. * Context:
  2036. * Kernel context.
  2037. */
  2038. void
  2039. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2040. {
  2041. struct qla_hw_data *ha = vha->hw;
  2042. fcport->vha = vha;
  2043. fcport->login_retry = 0;
  2044. fcport->port_login_retry_count = ha->port_down_retry_count *
  2045. PORT_RETRY_TIME;
  2046. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2047. PORT_RETRY_TIME);
  2048. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2049. qla2x00_iidma_fcport(vha, fcport);
  2050. atomic_set(&fcport->state, FCS_ONLINE);
  2051. qla2x00_reg_remote_port(vha, fcport);
  2052. }
  2053. /*
  2054. * qla2x00_configure_fabric
  2055. * Setup SNS devices with loop ID's.
  2056. *
  2057. * Input:
  2058. * ha = adapter block pointer.
  2059. *
  2060. * Returns:
  2061. * 0 = success.
  2062. * BIT_0 = error
  2063. */
  2064. static int
  2065. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2066. {
  2067. int rval, rval2;
  2068. fc_port_t *fcport, *fcptemp;
  2069. uint16_t next_loopid;
  2070. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2071. uint16_t loop_id;
  2072. LIST_HEAD(new_fcports);
  2073. struct qla_hw_data *ha = vha->hw;
  2074. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2075. /* If FL port exists, then SNS is present */
  2076. if (IS_FWI2_CAPABLE(ha))
  2077. loop_id = NPH_F_PORT;
  2078. else
  2079. loop_id = SNS_FL_PORT;
  2080. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2081. if (rval != QLA_SUCCESS) {
  2082. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2083. "Port\n", vha->host_no));
  2084. vha->device_flags &= ~SWITCH_FOUND;
  2085. return (QLA_SUCCESS);
  2086. }
  2087. vha->device_flags |= SWITCH_FOUND;
  2088. /* Mark devices that need re-synchronization. */
  2089. rval2 = qla2x00_device_resync(vha);
  2090. if (rval2 == QLA_RSCNS_HANDLED) {
  2091. /* No point doing the scan, just continue. */
  2092. return (QLA_SUCCESS);
  2093. }
  2094. do {
  2095. /* FDMI support. */
  2096. if (ql2xfdmienable &&
  2097. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2098. qla2x00_fdmi_register(vha);
  2099. /* Ensure we are logged into the SNS. */
  2100. if (IS_FWI2_CAPABLE(ha))
  2101. loop_id = NPH_SNS;
  2102. else
  2103. loop_id = SIMPLE_NAME_SERVER;
  2104. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2105. 0xfc, mb, BIT_1 | BIT_0);
  2106. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2107. DEBUG2(qla_printk(KERN_INFO, ha,
  2108. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2109. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2110. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2111. return (QLA_SUCCESS);
  2112. }
  2113. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2114. if (qla2x00_rft_id(vha)) {
  2115. /* EMPTY */
  2116. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2117. "TYPE failed.\n", vha->host_no));
  2118. }
  2119. if (qla2x00_rff_id(vha)) {
  2120. /* EMPTY */
  2121. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2122. "Features failed.\n", vha->host_no));
  2123. }
  2124. if (qla2x00_rnn_id(vha)) {
  2125. /* EMPTY */
  2126. DEBUG2(printk("scsi(%ld): Register Node Name "
  2127. "failed.\n", vha->host_no));
  2128. } else if (qla2x00_rsnn_nn(vha)) {
  2129. /* EMPTY */
  2130. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2131. "Node Name failed.\n", vha->host_no));
  2132. }
  2133. }
  2134. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2135. if (rval != QLA_SUCCESS)
  2136. break;
  2137. /*
  2138. * Logout all previous fabric devices marked lost, except
  2139. * tape devices.
  2140. */
  2141. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2142. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2143. break;
  2144. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2145. continue;
  2146. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2147. qla2x00_mark_device_lost(vha, fcport,
  2148. ql2xplogiabsentdevice, 0);
  2149. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2150. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2151. fcport->port_type != FCT_INITIATOR &&
  2152. fcport->port_type != FCT_BROADCAST) {
  2153. ha->isp_ops->fabric_logout(vha,
  2154. fcport->loop_id,
  2155. fcport->d_id.b.domain,
  2156. fcport->d_id.b.area,
  2157. fcport->d_id.b.al_pa);
  2158. fcport->loop_id = FC_NO_LOOP_ID;
  2159. }
  2160. }
  2161. }
  2162. /* Starting free loop ID. */
  2163. next_loopid = ha->min_external_loopid;
  2164. /*
  2165. * Scan through our port list and login entries that need to be
  2166. * logged in.
  2167. */
  2168. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2169. if (atomic_read(&vha->loop_down_timer) ||
  2170. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2171. break;
  2172. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2173. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2174. continue;
  2175. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2176. fcport->loop_id = next_loopid;
  2177. rval = qla2x00_find_new_loop_id(
  2178. base_vha, fcport);
  2179. if (rval != QLA_SUCCESS) {
  2180. /* Ran out of IDs to use */
  2181. break;
  2182. }
  2183. }
  2184. /* Login and update database */
  2185. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2186. }
  2187. /* Exit if out of loop IDs. */
  2188. if (rval != QLA_SUCCESS) {
  2189. break;
  2190. }
  2191. /*
  2192. * Login and add the new devices to our port list.
  2193. */
  2194. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2195. if (atomic_read(&vha->loop_down_timer) ||
  2196. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2197. break;
  2198. /* Find a new loop ID to use. */
  2199. fcport->loop_id = next_loopid;
  2200. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2201. if (rval != QLA_SUCCESS) {
  2202. /* Ran out of IDs to use */
  2203. break;
  2204. }
  2205. /* Login and update database */
  2206. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2207. if (vha->vp_idx) {
  2208. fcport->vha = vha;
  2209. fcport->vp_idx = vha->vp_idx;
  2210. }
  2211. list_move_tail(&fcport->list, &vha->vp_fcports);
  2212. }
  2213. } while (0);
  2214. /* Free all new device structures not processed. */
  2215. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2216. list_del(&fcport->list);
  2217. kfree(fcport);
  2218. }
  2219. if (rval) {
  2220. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2221. "rval=%d\n", vha->host_no, rval));
  2222. }
  2223. return (rval);
  2224. }
  2225. /*
  2226. * qla2x00_find_all_fabric_devs
  2227. *
  2228. * Input:
  2229. * ha = adapter block pointer.
  2230. * dev = database device entry pointer.
  2231. *
  2232. * Returns:
  2233. * 0 = success.
  2234. *
  2235. * Context:
  2236. * Kernel context.
  2237. */
  2238. static int
  2239. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2240. struct list_head *new_fcports)
  2241. {
  2242. int rval;
  2243. uint16_t loop_id;
  2244. fc_port_t *fcport, *new_fcport, *fcptemp;
  2245. int found;
  2246. sw_info_t *swl;
  2247. int swl_idx;
  2248. int first_dev, last_dev;
  2249. port_id_t wrap, nxt_d_id;
  2250. struct qla_hw_data *ha = vha->hw;
  2251. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2252. struct scsi_qla_host *tvp;
  2253. rval = QLA_SUCCESS;
  2254. /* Try GID_PT to get device list, else GAN. */
  2255. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2256. if (!swl) {
  2257. /*EMPTY*/
  2258. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2259. "on GA_NXT\n", vha->host_no));
  2260. } else {
  2261. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2262. kfree(swl);
  2263. swl = NULL;
  2264. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2265. kfree(swl);
  2266. swl = NULL;
  2267. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2268. kfree(swl);
  2269. swl = NULL;
  2270. } else if (ql2xiidmaenable &&
  2271. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2272. qla2x00_gpsc(vha, swl);
  2273. }
  2274. }
  2275. swl_idx = 0;
  2276. /* Allocate temporary fcport for any new fcports discovered. */
  2277. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2278. if (new_fcport == NULL) {
  2279. kfree(swl);
  2280. return (QLA_MEMORY_ALLOC_FAILED);
  2281. }
  2282. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2283. /* Set start port ID scan at adapter ID. */
  2284. first_dev = 1;
  2285. last_dev = 0;
  2286. /* Starting free loop ID. */
  2287. loop_id = ha->min_external_loopid;
  2288. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2289. if (qla2x00_is_reserved_id(vha, loop_id))
  2290. continue;
  2291. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2292. break;
  2293. if (swl != NULL) {
  2294. if (last_dev) {
  2295. wrap.b24 = new_fcport->d_id.b24;
  2296. } else {
  2297. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2298. memcpy(new_fcport->node_name,
  2299. swl[swl_idx].node_name, WWN_SIZE);
  2300. memcpy(new_fcport->port_name,
  2301. swl[swl_idx].port_name, WWN_SIZE);
  2302. memcpy(new_fcport->fabric_port_name,
  2303. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2304. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2305. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2306. last_dev = 1;
  2307. }
  2308. swl_idx++;
  2309. }
  2310. } else {
  2311. /* Send GA_NXT to the switch */
  2312. rval = qla2x00_ga_nxt(vha, new_fcport);
  2313. if (rval != QLA_SUCCESS) {
  2314. qla_printk(KERN_WARNING, ha,
  2315. "SNS scan failed -- assuming zero-entry "
  2316. "result...\n");
  2317. list_for_each_entry_safe(fcport, fcptemp,
  2318. new_fcports, list) {
  2319. list_del(&fcport->list);
  2320. kfree(fcport);
  2321. }
  2322. rval = QLA_SUCCESS;
  2323. break;
  2324. }
  2325. }
  2326. /* If wrap on switch device list, exit. */
  2327. if (first_dev) {
  2328. wrap.b24 = new_fcport->d_id.b24;
  2329. first_dev = 0;
  2330. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2331. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2332. vha->host_no, new_fcport->d_id.b.domain,
  2333. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2334. break;
  2335. }
  2336. /* Bypass if same physical adapter. */
  2337. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2338. continue;
  2339. /* Bypass virtual ports of the same host. */
  2340. found = 0;
  2341. if (ha->num_vhosts) {
  2342. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2343. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2344. found = 1;
  2345. break;
  2346. }
  2347. }
  2348. if (found)
  2349. continue;
  2350. }
  2351. /* Bypass if same domain and area of adapter. */
  2352. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2353. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2354. ISP_CFG_FL)
  2355. continue;
  2356. /* Bypass reserved domain fields. */
  2357. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2358. continue;
  2359. /* Locate matching device in database. */
  2360. found = 0;
  2361. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2362. if (memcmp(new_fcport->port_name, fcport->port_name,
  2363. WWN_SIZE))
  2364. continue;
  2365. found++;
  2366. /* Update port state. */
  2367. memcpy(fcport->fabric_port_name,
  2368. new_fcport->fabric_port_name, WWN_SIZE);
  2369. fcport->fp_speed = new_fcport->fp_speed;
  2370. /*
  2371. * If address the same and state FCS_ONLINE, nothing
  2372. * changed.
  2373. */
  2374. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2375. atomic_read(&fcport->state) == FCS_ONLINE) {
  2376. break;
  2377. }
  2378. /*
  2379. * If device was not a fabric device before.
  2380. */
  2381. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2382. fcport->d_id.b24 = new_fcport->d_id.b24;
  2383. fcport->loop_id = FC_NO_LOOP_ID;
  2384. fcport->flags |= (FCF_FABRIC_DEVICE |
  2385. FCF_LOGIN_NEEDED);
  2386. break;
  2387. }
  2388. /*
  2389. * Port ID changed or device was marked to be updated;
  2390. * Log it out if still logged in and mark it for
  2391. * relogin later.
  2392. */
  2393. fcport->d_id.b24 = new_fcport->d_id.b24;
  2394. fcport->flags |= FCF_LOGIN_NEEDED;
  2395. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2396. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2397. fcport->port_type != FCT_INITIATOR &&
  2398. fcport->port_type != FCT_BROADCAST) {
  2399. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2400. fcport->d_id.b.domain, fcport->d_id.b.area,
  2401. fcport->d_id.b.al_pa);
  2402. fcport->loop_id = FC_NO_LOOP_ID;
  2403. }
  2404. break;
  2405. }
  2406. if (found)
  2407. continue;
  2408. /* If device was not in our fcports list, then add it. */
  2409. list_add_tail(&new_fcport->list, new_fcports);
  2410. /* Allocate a new replacement fcport. */
  2411. nxt_d_id.b24 = new_fcport->d_id.b24;
  2412. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2413. if (new_fcport == NULL) {
  2414. kfree(swl);
  2415. return (QLA_MEMORY_ALLOC_FAILED);
  2416. }
  2417. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2418. new_fcport->d_id.b24 = nxt_d_id.b24;
  2419. }
  2420. kfree(swl);
  2421. kfree(new_fcport);
  2422. return (rval);
  2423. }
  2424. /*
  2425. * qla2x00_find_new_loop_id
  2426. * Scan through our port list and find a new usable loop ID.
  2427. *
  2428. * Input:
  2429. * ha: adapter state pointer.
  2430. * dev: port structure pointer.
  2431. *
  2432. * Returns:
  2433. * qla2x00 local function return status code.
  2434. *
  2435. * Context:
  2436. * Kernel context.
  2437. */
  2438. static int
  2439. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2440. {
  2441. int rval;
  2442. int found;
  2443. fc_port_t *fcport;
  2444. uint16_t first_loop_id;
  2445. struct qla_hw_data *ha = vha->hw;
  2446. struct scsi_qla_host *vp;
  2447. struct scsi_qla_host *tvp;
  2448. rval = QLA_SUCCESS;
  2449. /* Save starting loop ID. */
  2450. first_loop_id = dev->loop_id;
  2451. for (;;) {
  2452. /* Skip loop ID if already used by adapter. */
  2453. if (dev->loop_id == vha->loop_id)
  2454. dev->loop_id++;
  2455. /* Skip reserved loop IDs. */
  2456. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2457. dev->loop_id++;
  2458. /* Reset loop ID if passed the end. */
  2459. if (dev->loop_id > ha->max_loop_id) {
  2460. /* first loop ID. */
  2461. dev->loop_id = ha->min_external_loopid;
  2462. }
  2463. /* Check for loop ID being already in use. */
  2464. found = 0;
  2465. fcport = NULL;
  2466. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2467. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2468. if (fcport->loop_id == dev->loop_id &&
  2469. fcport != dev) {
  2470. /* ID possibly in use */
  2471. found++;
  2472. break;
  2473. }
  2474. }
  2475. if (found)
  2476. break;
  2477. }
  2478. /* If not in use then it is free to use. */
  2479. if (!found) {
  2480. break;
  2481. }
  2482. /* ID in use. Try next value. */
  2483. dev->loop_id++;
  2484. /* If wrap around. No free ID to use. */
  2485. if (dev->loop_id == first_loop_id) {
  2486. dev->loop_id = FC_NO_LOOP_ID;
  2487. rval = QLA_FUNCTION_FAILED;
  2488. break;
  2489. }
  2490. }
  2491. return (rval);
  2492. }
  2493. /*
  2494. * qla2x00_device_resync
  2495. * Marks devices in the database that needs resynchronization.
  2496. *
  2497. * Input:
  2498. * ha = adapter block pointer.
  2499. *
  2500. * Context:
  2501. * Kernel context.
  2502. */
  2503. static int
  2504. qla2x00_device_resync(scsi_qla_host_t *vha)
  2505. {
  2506. int rval;
  2507. uint32_t mask;
  2508. fc_port_t *fcport;
  2509. uint32_t rscn_entry;
  2510. uint8_t rscn_out_iter;
  2511. uint8_t format;
  2512. port_id_t d_id;
  2513. rval = QLA_RSCNS_HANDLED;
  2514. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2515. vha->flags.rscn_queue_overflow) {
  2516. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2517. format = MSB(MSW(rscn_entry));
  2518. d_id.b.domain = LSB(MSW(rscn_entry));
  2519. d_id.b.area = MSB(LSW(rscn_entry));
  2520. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2521. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2522. "[%02x/%02x%02x%02x].\n",
  2523. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2524. d_id.b.area, d_id.b.al_pa));
  2525. vha->rscn_out_ptr++;
  2526. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2527. vha->rscn_out_ptr = 0;
  2528. /* Skip duplicate entries. */
  2529. for (rscn_out_iter = vha->rscn_out_ptr;
  2530. !vha->flags.rscn_queue_overflow &&
  2531. rscn_out_iter != vha->rscn_in_ptr;
  2532. rscn_out_iter = (rscn_out_iter ==
  2533. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2534. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2535. break;
  2536. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2537. "entry found at [%d].\n", vha->host_no,
  2538. rscn_out_iter));
  2539. vha->rscn_out_ptr = rscn_out_iter;
  2540. }
  2541. /* Queue overflow, set switch default case. */
  2542. if (vha->flags.rscn_queue_overflow) {
  2543. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2544. "overflow.\n", vha->host_no));
  2545. format = 3;
  2546. vha->flags.rscn_queue_overflow = 0;
  2547. }
  2548. switch (format) {
  2549. case 0:
  2550. mask = 0xffffff;
  2551. break;
  2552. case 1:
  2553. mask = 0xffff00;
  2554. break;
  2555. case 2:
  2556. mask = 0xff0000;
  2557. break;
  2558. default:
  2559. mask = 0x0;
  2560. d_id.b24 = 0;
  2561. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2562. break;
  2563. }
  2564. rval = QLA_SUCCESS;
  2565. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2566. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2567. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2568. fcport->port_type == FCT_BROADCAST)
  2569. continue;
  2570. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2571. if (format != 3 ||
  2572. fcport->port_type != FCT_INITIATOR) {
  2573. qla2x00_mark_device_lost(vha, fcport,
  2574. 0, 0);
  2575. }
  2576. }
  2577. }
  2578. }
  2579. return (rval);
  2580. }
  2581. /*
  2582. * qla2x00_fabric_dev_login
  2583. * Login fabric target device and update FC port database.
  2584. *
  2585. * Input:
  2586. * ha: adapter state pointer.
  2587. * fcport: port structure list pointer.
  2588. * next_loopid: contains value of a new loop ID that can be used
  2589. * by the next login attempt.
  2590. *
  2591. * Returns:
  2592. * qla2x00 local function return status code.
  2593. *
  2594. * Context:
  2595. * Kernel context.
  2596. */
  2597. static int
  2598. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2599. uint16_t *next_loopid)
  2600. {
  2601. int rval;
  2602. int retry;
  2603. uint8_t opts;
  2604. struct qla_hw_data *ha = vha->hw;
  2605. rval = QLA_SUCCESS;
  2606. retry = 0;
  2607. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2608. if (rval == QLA_SUCCESS) {
  2609. /* Send an ADISC to tape devices.*/
  2610. opts = 0;
  2611. if (fcport->flags & FCF_TAPE_PRESENT)
  2612. opts |= BIT_1;
  2613. rval = qla2x00_get_port_database(vha, fcport, opts);
  2614. if (rval != QLA_SUCCESS) {
  2615. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2616. fcport->d_id.b.domain, fcport->d_id.b.area,
  2617. fcport->d_id.b.al_pa);
  2618. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2619. } else {
  2620. qla2x00_update_fcport(vha, fcport);
  2621. }
  2622. }
  2623. return (rval);
  2624. }
  2625. /*
  2626. * qla2x00_fabric_login
  2627. * Issue fabric login command.
  2628. *
  2629. * Input:
  2630. * ha = adapter block pointer.
  2631. * device = pointer to FC device type structure.
  2632. *
  2633. * Returns:
  2634. * 0 - Login successfully
  2635. * 1 - Login failed
  2636. * 2 - Initiator device
  2637. * 3 - Fatal error
  2638. */
  2639. int
  2640. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2641. uint16_t *next_loopid)
  2642. {
  2643. int rval;
  2644. int retry;
  2645. uint16_t tmp_loopid;
  2646. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2647. struct qla_hw_data *ha = vha->hw;
  2648. retry = 0;
  2649. tmp_loopid = 0;
  2650. for (;;) {
  2651. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2652. "for port %02x%02x%02x.\n",
  2653. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2654. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2655. /* Login fcport on switch. */
  2656. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2657. fcport->d_id.b.domain, fcport->d_id.b.area,
  2658. fcport->d_id.b.al_pa, mb, BIT_0);
  2659. if (mb[0] == MBS_PORT_ID_USED) {
  2660. /*
  2661. * Device has another loop ID. The firmware team
  2662. * recommends the driver perform an implicit login with
  2663. * the specified ID again. The ID we just used is save
  2664. * here so we return with an ID that can be tried by
  2665. * the next login.
  2666. */
  2667. retry++;
  2668. tmp_loopid = fcport->loop_id;
  2669. fcport->loop_id = mb[1];
  2670. DEBUG(printk("Fabric Login: port in use - next "
  2671. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2672. fcport->loop_id, fcport->d_id.b.domain,
  2673. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2674. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2675. /*
  2676. * Login succeeded.
  2677. */
  2678. if (retry) {
  2679. /* A retry occurred before. */
  2680. *next_loopid = tmp_loopid;
  2681. } else {
  2682. /*
  2683. * No retry occurred before. Just increment the
  2684. * ID value for next login.
  2685. */
  2686. *next_loopid = (fcport->loop_id + 1);
  2687. }
  2688. if (mb[1] & BIT_0) {
  2689. fcport->port_type = FCT_INITIATOR;
  2690. } else {
  2691. fcport->port_type = FCT_TARGET;
  2692. if (mb[1] & BIT_1) {
  2693. fcport->flags |= FCF_TAPE_PRESENT;
  2694. }
  2695. }
  2696. if (mb[10] & BIT_0)
  2697. fcport->supported_classes |= FC_COS_CLASS2;
  2698. if (mb[10] & BIT_1)
  2699. fcport->supported_classes |= FC_COS_CLASS3;
  2700. rval = QLA_SUCCESS;
  2701. break;
  2702. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2703. /*
  2704. * Loop ID already used, try next loop ID.
  2705. */
  2706. fcport->loop_id++;
  2707. rval = qla2x00_find_new_loop_id(vha, fcport);
  2708. if (rval != QLA_SUCCESS) {
  2709. /* Ran out of loop IDs to use */
  2710. break;
  2711. }
  2712. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2713. /*
  2714. * Firmware possibly timed out during login. If NO
  2715. * retries are left to do then the device is declared
  2716. * dead.
  2717. */
  2718. *next_loopid = fcport->loop_id;
  2719. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2720. fcport->d_id.b.domain, fcport->d_id.b.area,
  2721. fcport->d_id.b.al_pa);
  2722. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2723. rval = 1;
  2724. break;
  2725. } else {
  2726. /*
  2727. * unrecoverable / not handled error
  2728. */
  2729. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2730. "loop_id=%x jiffies=%lx.\n",
  2731. __func__, vha->host_no, mb[0],
  2732. fcport->d_id.b.domain, fcport->d_id.b.area,
  2733. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2734. *next_loopid = fcport->loop_id;
  2735. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2736. fcport->d_id.b.domain, fcport->d_id.b.area,
  2737. fcport->d_id.b.al_pa);
  2738. fcport->loop_id = FC_NO_LOOP_ID;
  2739. fcport->login_retry = 0;
  2740. rval = 3;
  2741. break;
  2742. }
  2743. }
  2744. return (rval);
  2745. }
  2746. /*
  2747. * qla2x00_local_device_login
  2748. * Issue local device login command.
  2749. *
  2750. * Input:
  2751. * ha = adapter block pointer.
  2752. * loop_id = loop id of device to login to.
  2753. *
  2754. * Returns (Where's the #define!!!!):
  2755. * 0 - Login successfully
  2756. * 1 - Login failed
  2757. * 3 - Fatal error
  2758. */
  2759. int
  2760. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2761. {
  2762. int rval;
  2763. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2764. memset(mb, 0, sizeof(mb));
  2765. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2766. if (rval == QLA_SUCCESS) {
  2767. /* Interrogate mailbox registers for any errors */
  2768. if (mb[0] == MBS_COMMAND_ERROR)
  2769. rval = 1;
  2770. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2771. /* device not in PCB table */
  2772. rval = 3;
  2773. }
  2774. return (rval);
  2775. }
  2776. /*
  2777. * qla2x00_loop_resync
  2778. * Resync with fibre channel devices.
  2779. *
  2780. * Input:
  2781. * ha = adapter block pointer.
  2782. *
  2783. * Returns:
  2784. * 0 = success
  2785. */
  2786. int
  2787. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2788. {
  2789. int rval = QLA_SUCCESS;
  2790. uint32_t wait_time;
  2791. struct req_que *req;
  2792. struct rsp_que *rsp;
  2793. if (ql2xmultique_tag)
  2794. req = vha->hw->req_q_map[0];
  2795. else
  2796. req = vha->req;
  2797. rsp = req->rsp;
  2798. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2799. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2800. if (vha->flags.online) {
  2801. if (!(rval = qla2x00_fw_ready(vha))) {
  2802. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2803. wait_time = 256;
  2804. do {
  2805. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2806. /* Issue a marker after FW becomes ready. */
  2807. qla2x00_marker(vha, req, rsp, 0, 0,
  2808. MK_SYNC_ALL);
  2809. vha->marker_needed = 0;
  2810. /* Remap devices on Loop. */
  2811. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2812. qla2x00_configure_loop(vha);
  2813. wait_time--;
  2814. } while (!atomic_read(&vha->loop_down_timer) &&
  2815. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2816. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2817. &vha->dpc_flags)));
  2818. }
  2819. }
  2820. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2821. return (QLA_FUNCTION_FAILED);
  2822. if (rval)
  2823. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2824. return (rval);
  2825. }
  2826. void
  2827. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2828. {
  2829. fc_port_t *fcport;
  2830. /* Go with deferred removal of rport references. */
  2831. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2832. if (fcport && fcport->drport &&
  2833. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2834. qla2x00_rport_del(fcport);
  2835. }
  2836. /*
  2837. * qla2x00_abort_isp
  2838. * Resets ISP and aborts all outstanding commands.
  2839. *
  2840. * Input:
  2841. * ha = adapter block pointer.
  2842. *
  2843. * Returns:
  2844. * 0 = success
  2845. */
  2846. int
  2847. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2848. {
  2849. int rval;
  2850. uint8_t status = 0;
  2851. struct qla_hw_data *ha = vha->hw;
  2852. struct scsi_qla_host *vp;
  2853. struct scsi_qla_host *tvp;
  2854. struct req_que *req = ha->req_q_map[0];
  2855. if (vha->flags.online) {
  2856. vha->flags.online = 0;
  2857. ha->flags.chip_reset_done = 0;
  2858. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2859. ha->qla_stats.total_isp_aborts++;
  2860. qla_printk(KERN_INFO, ha,
  2861. "Performing ISP error recovery - ha= %p.\n", ha);
  2862. ha->isp_ops->reset_chip(vha);
  2863. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2864. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2865. atomic_set(&vha->loop_state, LOOP_DOWN);
  2866. qla2x00_mark_all_devices_lost(vha, 0);
  2867. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2868. qla2x00_mark_all_devices_lost(vp, 0);
  2869. } else {
  2870. if (!atomic_read(&vha->loop_down_timer))
  2871. atomic_set(&vha->loop_down_timer,
  2872. LOOP_DOWN_TIME);
  2873. }
  2874. /* Requeue all commands in outstanding command list. */
  2875. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2876. ha->isp_ops->get_flash_version(vha, req->ring);
  2877. ha->isp_ops->nvram_config(vha);
  2878. if (!qla2x00_restart_isp(vha)) {
  2879. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2880. if (!atomic_read(&vha->loop_down_timer)) {
  2881. /*
  2882. * Issue marker command only when we are going
  2883. * to start the I/O .
  2884. */
  2885. vha->marker_needed = 1;
  2886. }
  2887. vha->flags.online = 1;
  2888. ha->isp_ops->enable_intrs(ha);
  2889. ha->isp_abort_cnt = 0;
  2890. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2891. if (ha->fce) {
  2892. ha->flags.fce_enabled = 1;
  2893. memset(ha->fce, 0,
  2894. fce_calc_size(ha->fce_bufs));
  2895. rval = qla2x00_enable_fce_trace(vha,
  2896. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2897. &ha->fce_bufs);
  2898. if (rval) {
  2899. qla_printk(KERN_WARNING, ha,
  2900. "Unable to reinitialize FCE "
  2901. "(%d).\n", rval);
  2902. ha->flags.fce_enabled = 0;
  2903. }
  2904. }
  2905. if (ha->eft) {
  2906. memset(ha->eft, 0, EFT_SIZE);
  2907. rval = qla2x00_enable_eft_trace(vha,
  2908. ha->eft_dma, EFT_NUM_BUFFERS);
  2909. if (rval) {
  2910. qla_printk(KERN_WARNING, ha,
  2911. "Unable to reinitialize EFT "
  2912. "(%d).\n", rval);
  2913. }
  2914. }
  2915. } else { /* failed the ISP abort */
  2916. vha->flags.online = 1;
  2917. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2918. if (ha->isp_abort_cnt == 0) {
  2919. qla_printk(KERN_WARNING, ha,
  2920. "ISP error recovery failed - "
  2921. "board disabled\n");
  2922. /*
  2923. * The next call disables the board
  2924. * completely.
  2925. */
  2926. ha->isp_ops->reset_adapter(vha);
  2927. vha->flags.online = 0;
  2928. clear_bit(ISP_ABORT_RETRY,
  2929. &vha->dpc_flags);
  2930. status = 0;
  2931. } else { /* schedule another ISP abort */
  2932. ha->isp_abort_cnt--;
  2933. DEBUG(printk("qla%ld: ISP abort - "
  2934. "retry remaining %d\n",
  2935. vha->host_no, ha->isp_abort_cnt));
  2936. status = 1;
  2937. }
  2938. } else {
  2939. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2940. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2941. "- retrying (%d) more times\n",
  2942. vha->host_no, ha->isp_abort_cnt));
  2943. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2944. status = 1;
  2945. }
  2946. }
  2947. }
  2948. if (!status) {
  2949. DEBUG(printk(KERN_INFO
  2950. "qla2x00_abort_isp(%ld): succeeded.\n",
  2951. vha->host_no));
  2952. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2953. if (vp->vp_idx)
  2954. qla2x00_vp_abort_isp(vp);
  2955. }
  2956. } else {
  2957. qla_printk(KERN_INFO, ha,
  2958. "qla2x00_abort_isp: **** FAILED ****\n");
  2959. }
  2960. return(status);
  2961. }
  2962. /*
  2963. * qla2x00_restart_isp
  2964. * restarts the ISP after a reset
  2965. *
  2966. * Input:
  2967. * ha = adapter block pointer.
  2968. *
  2969. * Returns:
  2970. * 0 = success
  2971. */
  2972. static int
  2973. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2974. {
  2975. int status = 0;
  2976. uint32_t wait_time;
  2977. struct qla_hw_data *ha = vha->hw;
  2978. struct req_que *req = ha->req_q_map[0];
  2979. struct rsp_que *rsp = ha->rsp_q_map[0];
  2980. /* If firmware needs to be loaded */
  2981. if (qla2x00_isp_firmware(vha)) {
  2982. vha->flags.online = 0;
  2983. status = ha->isp_ops->chip_diag(vha);
  2984. if (!status)
  2985. status = qla2x00_setup_chip(vha);
  2986. }
  2987. if (!status && !(status = qla2x00_init_rings(vha))) {
  2988. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2989. ha->flags.chip_reset_done = 1;
  2990. /* Initialize the queues in use */
  2991. qla25xx_init_queues(ha);
  2992. status = qla2x00_fw_ready(vha);
  2993. if (!status) {
  2994. DEBUG(printk("%s(): Start configure loop, "
  2995. "status = %d\n", __func__, status));
  2996. /* Issue a marker after FW becomes ready. */
  2997. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2998. vha->flags.online = 1;
  2999. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3000. wait_time = 256;
  3001. do {
  3002. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3003. qla2x00_configure_loop(vha);
  3004. wait_time--;
  3005. } while (!atomic_read(&vha->loop_down_timer) &&
  3006. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3007. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3008. &vha->dpc_flags)));
  3009. }
  3010. /* if no cable then assume it's good */
  3011. if ((vha->device_flags & DFLG_NO_CABLE))
  3012. status = 0;
  3013. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3014. __func__,
  3015. status));
  3016. }
  3017. return (status);
  3018. }
  3019. static int
  3020. qla25xx_init_queues(struct qla_hw_data *ha)
  3021. {
  3022. struct rsp_que *rsp = NULL;
  3023. struct req_que *req = NULL;
  3024. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3025. int ret = -1;
  3026. int i;
  3027. for (i = 1; i < ha->max_rsp_queues; i++) {
  3028. rsp = ha->rsp_q_map[i];
  3029. if (rsp) {
  3030. rsp->options &= ~BIT_0;
  3031. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3032. if (ret != QLA_SUCCESS)
  3033. DEBUG2_17(printk(KERN_WARNING
  3034. "%s Rsp que:%d init failed\n", __func__,
  3035. rsp->id));
  3036. else
  3037. DEBUG2_17(printk(KERN_INFO
  3038. "%s Rsp que:%d inited\n", __func__,
  3039. rsp->id));
  3040. }
  3041. }
  3042. for (i = 1; i < ha->max_req_queues; i++) {
  3043. req = ha->req_q_map[i];
  3044. if (req) {
  3045. /* Clear outstanding commands array. */
  3046. req->options &= ~BIT_0;
  3047. ret = qla25xx_init_req_que(base_vha, req);
  3048. if (ret != QLA_SUCCESS)
  3049. DEBUG2_17(printk(KERN_WARNING
  3050. "%s Req que:%d init failed\n", __func__,
  3051. req->id));
  3052. else
  3053. DEBUG2_17(printk(KERN_WARNING
  3054. "%s Req que:%d inited\n", __func__,
  3055. req->id));
  3056. }
  3057. }
  3058. return ret;
  3059. }
  3060. /*
  3061. * qla2x00_reset_adapter
  3062. * Reset adapter.
  3063. *
  3064. * Input:
  3065. * ha = adapter block pointer.
  3066. */
  3067. void
  3068. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3069. {
  3070. unsigned long flags = 0;
  3071. struct qla_hw_data *ha = vha->hw;
  3072. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3073. vha->flags.online = 0;
  3074. ha->isp_ops->disable_intrs(ha);
  3075. spin_lock_irqsave(&ha->hardware_lock, flags);
  3076. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3077. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3078. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3079. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3080. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3081. }
  3082. void
  3083. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3084. {
  3085. unsigned long flags = 0;
  3086. struct qla_hw_data *ha = vha->hw;
  3087. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3088. vha->flags.online = 0;
  3089. ha->isp_ops->disable_intrs(ha);
  3090. spin_lock_irqsave(&ha->hardware_lock, flags);
  3091. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3092. RD_REG_DWORD(&reg->hccr);
  3093. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3094. RD_REG_DWORD(&reg->hccr);
  3095. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3096. if (IS_NOPOLLING_TYPE(ha))
  3097. ha->isp_ops->enable_intrs(ha);
  3098. }
  3099. /* On sparc systems, obtain port and node WWN from firmware
  3100. * properties.
  3101. */
  3102. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3103. struct nvram_24xx *nv)
  3104. {
  3105. #ifdef CONFIG_SPARC
  3106. struct qla_hw_data *ha = vha->hw;
  3107. struct pci_dev *pdev = ha->pdev;
  3108. struct device_node *dp = pci_device_to_OF_node(pdev);
  3109. const u8 *val;
  3110. int len;
  3111. val = of_get_property(dp, "port-wwn", &len);
  3112. if (val && len >= WWN_SIZE)
  3113. memcpy(nv->port_name, val, WWN_SIZE);
  3114. val = of_get_property(dp, "node-wwn", &len);
  3115. if (val && len >= WWN_SIZE)
  3116. memcpy(nv->node_name, val, WWN_SIZE);
  3117. #endif
  3118. }
  3119. int
  3120. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3121. {
  3122. int rval;
  3123. struct init_cb_24xx *icb;
  3124. struct nvram_24xx *nv;
  3125. uint32_t *dptr;
  3126. uint8_t *dptr1, *dptr2;
  3127. uint32_t chksum;
  3128. uint16_t cnt;
  3129. struct qla_hw_data *ha = vha->hw;
  3130. rval = QLA_SUCCESS;
  3131. icb = (struct init_cb_24xx *)ha->init_cb;
  3132. nv = ha->nvram;
  3133. /* Determine NVRAM starting address. */
  3134. if (ha->flags.port0) {
  3135. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3136. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3137. } else {
  3138. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3139. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3140. }
  3141. ha->nvram_size = sizeof(struct nvram_24xx);
  3142. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3143. /* Get VPD data into cache */
  3144. ha->vpd = ha->nvram + VPD_OFFSET;
  3145. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3146. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3147. /* Get NVRAM data into cache and calculate checksum. */
  3148. dptr = (uint32_t *)nv;
  3149. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3150. ha->nvram_size);
  3151. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3152. chksum += le32_to_cpu(*dptr++);
  3153. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3154. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3155. /* Bad NVRAM data, set defaults parameters. */
  3156. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3157. || nv->id[3] != ' ' ||
  3158. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3159. /* Reset NVRAM data. */
  3160. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3161. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3162. le16_to_cpu(nv->nvram_version));
  3163. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3164. "invalid -- WWPN) defaults.\n");
  3165. /*
  3166. * Set default initialization control block.
  3167. */
  3168. memset(nv, 0, ha->nvram_size);
  3169. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3170. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3171. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3172. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3173. nv->exchange_count = __constant_cpu_to_le16(0);
  3174. nv->hard_address = __constant_cpu_to_le16(124);
  3175. nv->port_name[0] = 0x21;
  3176. nv->port_name[1] = 0x00 + ha->port_no;
  3177. nv->port_name[2] = 0x00;
  3178. nv->port_name[3] = 0xe0;
  3179. nv->port_name[4] = 0x8b;
  3180. nv->port_name[5] = 0x1c;
  3181. nv->port_name[6] = 0x55;
  3182. nv->port_name[7] = 0x86;
  3183. nv->node_name[0] = 0x20;
  3184. nv->node_name[1] = 0x00;
  3185. nv->node_name[2] = 0x00;
  3186. nv->node_name[3] = 0xe0;
  3187. nv->node_name[4] = 0x8b;
  3188. nv->node_name[5] = 0x1c;
  3189. nv->node_name[6] = 0x55;
  3190. nv->node_name[7] = 0x86;
  3191. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3192. nv->login_retry_count = __constant_cpu_to_le16(8);
  3193. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3194. nv->login_timeout = __constant_cpu_to_le16(0);
  3195. nv->firmware_options_1 =
  3196. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3197. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3198. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3199. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3200. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3201. nv->efi_parameters = __constant_cpu_to_le32(0);
  3202. nv->reset_delay = 5;
  3203. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3204. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3205. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3206. rval = 1;
  3207. }
  3208. /* Reset Initialization control block */
  3209. memset(icb, 0, ha->init_cb_size);
  3210. /* Copy 1st segment. */
  3211. dptr1 = (uint8_t *)icb;
  3212. dptr2 = (uint8_t *)&nv->version;
  3213. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3214. while (cnt--)
  3215. *dptr1++ = *dptr2++;
  3216. icb->login_retry_count = nv->login_retry_count;
  3217. icb->link_down_on_nos = nv->link_down_on_nos;
  3218. /* Copy 2nd segment. */
  3219. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3220. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3221. cnt = (uint8_t *)&icb->reserved_3 -
  3222. (uint8_t *)&icb->interrupt_delay_timer;
  3223. while (cnt--)
  3224. *dptr1++ = *dptr2++;
  3225. /*
  3226. * Setup driver NVRAM options.
  3227. */
  3228. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3229. "QLA2462");
  3230. /* Use alternate WWN? */
  3231. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3232. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3233. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3234. }
  3235. /* Prepare nodename */
  3236. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3237. /*
  3238. * Firmware will apply the following mask if the nodename was
  3239. * not provided.
  3240. */
  3241. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3242. icb->node_name[0] &= 0xF0;
  3243. }
  3244. /* Set host adapter parameters. */
  3245. ha->flags.disable_risc_code_load = 0;
  3246. ha->flags.enable_lip_reset = 0;
  3247. ha->flags.enable_lip_full_login =
  3248. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3249. ha->flags.enable_target_reset =
  3250. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3251. ha->flags.enable_led_scheme = 0;
  3252. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3253. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3254. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3255. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3256. sizeof(ha->fw_seriallink_options24));
  3257. /* save HBA serial number */
  3258. ha->serial0 = icb->port_name[5];
  3259. ha->serial1 = icb->port_name[6];
  3260. ha->serial2 = icb->port_name[7];
  3261. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3262. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3263. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3264. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3265. /* Set minimum login_timeout to 4 seconds. */
  3266. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3267. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3268. if (le16_to_cpu(nv->login_timeout) < 4)
  3269. nv->login_timeout = __constant_cpu_to_le16(4);
  3270. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3271. icb->login_timeout = nv->login_timeout;
  3272. /* Set minimum RATOV to 100 tenths of a second. */
  3273. ha->r_a_tov = 100;
  3274. ha->loop_reset_delay = nv->reset_delay;
  3275. /* Link Down Timeout = 0:
  3276. *
  3277. * When Port Down timer expires we will start returning
  3278. * I/O's to OS with "DID_NO_CONNECT".
  3279. *
  3280. * Link Down Timeout != 0:
  3281. *
  3282. * The driver waits for the link to come up after link down
  3283. * before returning I/Os to OS with "DID_NO_CONNECT".
  3284. */
  3285. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3286. ha->loop_down_abort_time =
  3287. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3288. } else {
  3289. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3290. ha->loop_down_abort_time =
  3291. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3292. }
  3293. /* Need enough time to try and get the port back. */
  3294. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3295. if (qlport_down_retry)
  3296. ha->port_down_retry_count = qlport_down_retry;
  3297. /* Set login_retry_count */
  3298. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3299. if (ha->port_down_retry_count ==
  3300. le16_to_cpu(nv->port_down_retry_count) &&
  3301. ha->port_down_retry_count > 3)
  3302. ha->login_retry_count = ha->port_down_retry_count;
  3303. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3304. ha->login_retry_count = ha->port_down_retry_count;
  3305. if (ql2xloginretrycount)
  3306. ha->login_retry_count = ql2xloginretrycount;
  3307. /* Enable ZIO. */
  3308. if (!vha->flags.init_done) {
  3309. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3310. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3311. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3312. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3313. }
  3314. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3315. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3316. vha->flags.process_response_queue = 0;
  3317. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3318. ha->zio_mode = QLA_ZIO_MODE_6;
  3319. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3320. "(%d us).\n", vha->host_no, ha->zio_mode,
  3321. ha->zio_timer * 100));
  3322. qla_printk(KERN_INFO, ha,
  3323. "ZIO mode %d enabled; timer delay (%d us).\n",
  3324. ha->zio_mode, ha->zio_timer * 100);
  3325. icb->firmware_options_2 |= cpu_to_le32(
  3326. (uint32_t)ha->zio_mode);
  3327. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3328. vha->flags.process_response_queue = 1;
  3329. }
  3330. if (rval) {
  3331. DEBUG2_3(printk(KERN_WARNING
  3332. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3333. }
  3334. return (rval);
  3335. }
  3336. static int
  3337. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3338. uint32_t faddr)
  3339. {
  3340. int rval = QLA_SUCCESS;
  3341. int segments, fragment;
  3342. uint32_t *dcode, dlen;
  3343. uint32_t risc_addr;
  3344. uint32_t risc_size;
  3345. uint32_t i;
  3346. struct qla_hw_data *ha = vha->hw;
  3347. struct req_que *req = ha->req_q_map[0];
  3348. qla_printk(KERN_INFO, ha,
  3349. "FW: Loading from flash (%x)...\n", faddr);
  3350. rval = QLA_SUCCESS;
  3351. segments = FA_RISC_CODE_SEGMENTS;
  3352. dcode = (uint32_t *)req->ring;
  3353. *srisc_addr = 0;
  3354. /* Validate firmware image by checking version. */
  3355. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3356. for (i = 0; i < 4; i++)
  3357. dcode[i] = be32_to_cpu(dcode[i]);
  3358. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3359. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3360. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3361. dcode[3] == 0)) {
  3362. qla_printk(KERN_WARNING, ha,
  3363. "Unable to verify integrity of flash firmware image!\n");
  3364. qla_printk(KERN_WARNING, ha,
  3365. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3366. dcode[1], dcode[2], dcode[3]);
  3367. return QLA_FUNCTION_FAILED;
  3368. }
  3369. while (segments && rval == QLA_SUCCESS) {
  3370. /* Read segment's load information. */
  3371. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3372. risc_addr = be32_to_cpu(dcode[2]);
  3373. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3374. risc_size = be32_to_cpu(dcode[3]);
  3375. fragment = 0;
  3376. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3377. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3378. if (dlen > risc_size)
  3379. dlen = risc_size;
  3380. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3381. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3382. vha->host_no, risc_addr, dlen, faddr));
  3383. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3384. for (i = 0; i < dlen; i++)
  3385. dcode[i] = swab32(dcode[i]);
  3386. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3387. dlen);
  3388. if (rval) {
  3389. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3390. "segment %d of firmware\n", vha->host_no,
  3391. fragment));
  3392. qla_printk(KERN_WARNING, ha,
  3393. "[ERROR] Failed to load segment %d of "
  3394. "firmware\n", fragment);
  3395. break;
  3396. }
  3397. faddr += dlen;
  3398. risc_addr += dlen;
  3399. risc_size -= dlen;
  3400. fragment++;
  3401. }
  3402. /* Next segment. */
  3403. segments--;
  3404. }
  3405. return rval;
  3406. }
  3407. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3408. int
  3409. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3410. {
  3411. int rval;
  3412. int i, fragment;
  3413. uint16_t *wcode, *fwcode;
  3414. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3415. struct fw_blob *blob;
  3416. struct qla_hw_data *ha = vha->hw;
  3417. struct req_que *req = ha->req_q_map[0];
  3418. /* Load firmware blob. */
  3419. blob = qla2x00_request_firmware(vha);
  3420. if (!blob) {
  3421. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3422. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3423. "from: " QLA_FW_URL ".\n");
  3424. return QLA_FUNCTION_FAILED;
  3425. }
  3426. rval = QLA_SUCCESS;
  3427. wcode = (uint16_t *)req->ring;
  3428. *srisc_addr = 0;
  3429. fwcode = (uint16_t *)blob->fw->data;
  3430. fwclen = 0;
  3431. /* Validate firmware image by checking version. */
  3432. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3433. qla_printk(KERN_WARNING, ha,
  3434. "Unable to verify integrity of firmware image (%Zd)!\n",
  3435. blob->fw->size);
  3436. goto fail_fw_integrity;
  3437. }
  3438. for (i = 0; i < 4; i++)
  3439. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3440. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3441. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3442. wcode[2] == 0 && wcode[3] == 0)) {
  3443. qla_printk(KERN_WARNING, ha,
  3444. "Unable to verify integrity of firmware image!\n");
  3445. qla_printk(KERN_WARNING, ha,
  3446. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3447. wcode[1], wcode[2], wcode[3]);
  3448. goto fail_fw_integrity;
  3449. }
  3450. seg = blob->segs;
  3451. while (*seg && rval == QLA_SUCCESS) {
  3452. risc_addr = *seg;
  3453. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3454. risc_size = be16_to_cpu(fwcode[3]);
  3455. /* Validate firmware image size. */
  3456. fwclen += risc_size * sizeof(uint16_t);
  3457. if (blob->fw->size < fwclen) {
  3458. qla_printk(KERN_WARNING, ha,
  3459. "Unable to verify integrity of firmware image "
  3460. "(%Zd)!\n", blob->fw->size);
  3461. goto fail_fw_integrity;
  3462. }
  3463. fragment = 0;
  3464. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3465. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3466. if (wlen > risc_size)
  3467. wlen = risc_size;
  3468. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3469. "addr %x, number of words 0x%x.\n", vha->host_no,
  3470. risc_addr, wlen));
  3471. for (i = 0; i < wlen; i++)
  3472. wcode[i] = swab16(fwcode[i]);
  3473. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3474. wlen);
  3475. if (rval) {
  3476. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3477. "segment %d of firmware\n", vha->host_no,
  3478. fragment));
  3479. qla_printk(KERN_WARNING, ha,
  3480. "[ERROR] Failed to load segment %d of "
  3481. "firmware\n", fragment);
  3482. break;
  3483. }
  3484. fwcode += wlen;
  3485. risc_addr += wlen;
  3486. risc_size -= wlen;
  3487. fragment++;
  3488. }
  3489. /* Next segment. */
  3490. seg++;
  3491. }
  3492. return rval;
  3493. fail_fw_integrity:
  3494. return QLA_FUNCTION_FAILED;
  3495. }
  3496. static int
  3497. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3498. {
  3499. int rval;
  3500. int segments, fragment;
  3501. uint32_t *dcode, dlen;
  3502. uint32_t risc_addr;
  3503. uint32_t risc_size;
  3504. uint32_t i;
  3505. struct fw_blob *blob;
  3506. uint32_t *fwcode, fwclen;
  3507. struct qla_hw_data *ha = vha->hw;
  3508. struct req_que *req = ha->req_q_map[0];
  3509. /* Load firmware blob. */
  3510. blob = qla2x00_request_firmware(vha);
  3511. if (!blob) {
  3512. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3513. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3514. "from: " QLA_FW_URL ".\n");
  3515. return QLA_FUNCTION_FAILED;
  3516. }
  3517. qla_printk(KERN_INFO, ha,
  3518. "FW: Loading via request-firmware...\n");
  3519. rval = QLA_SUCCESS;
  3520. segments = FA_RISC_CODE_SEGMENTS;
  3521. dcode = (uint32_t *)req->ring;
  3522. *srisc_addr = 0;
  3523. fwcode = (uint32_t *)blob->fw->data;
  3524. fwclen = 0;
  3525. /* Validate firmware image by checking version. */
  3526. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3527. qla_printk(KERN_WARNING, ha,
  3528. "Unable to verify integrity of firmware image (%Zd)!\n",
  3529. blob->fw->size);
  3530. goto fail_fw_integrity;
  3531. }
  3532. for (i = 0; i < 4; i++)
  3533. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3534. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3535. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3536. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3537. dcode[3] == 0)) {
  3538. qla_printk(KERN_WARNING, ha,
  3539. "Unable to verify integrity of firmware image!\n");
  3540. qla_printk(KERN_WARNING, ha,
  3541. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3542. dcode[1], dcode[2], dcode[3]);
  3543. goto fail_fw_integrity;
  3544. }
  3545. while (segments && rval == QLA_SUCCESS) {
  3546. risc_addr = be32_to_cpu(fwcode[2]);
  3547. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3548. risc_size = be32_to_cpu(fwcode[3]);
  3549. /* Validate firmware image size. */
  3550. fwclen += risc_size * sizeof(uint32_t);
  3551. if (blob->fw->size < fwclen) {
  3552. qla_printk(KERN_WARNING, ha,
  3553. "Unable to verify integrity of firmware image "
  3554. "(%Zd)!\n", blob->fw->size);
  3555. goto fail_fw_integrity;
  3556. }
  3557. fragment = 0;
  3558. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3559. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3560. if (dlen > risc_size)
  3561. dlen = risc_size;
  3562. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3563. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3564. risc_addr, dlen));
  3565. for (i = 0; i < dlen; i++)
  3566. dcode[i] = swab32(fwcode[i]);
  3567. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3568. dlen);
  3569. if (rval) {
  3570. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3571. "segment %d of firmware\n", vha->host_no,
  3572. fragment));
  3573. qla_printk(KERN_WARNING, ha,
  3574. "[ERROR] Failed to load segment %d of "
  3575. "firmware\n", fragment);
  3576. break;
  3577. }
  3578. fwcode += dlen;
  3579. risc_addr += dlen;
  3580. risc_size -= dlen;
  3581. fragment++;
  3582. }
  3583. /* Next segment. */
  3584. segments--;
  3585. }
  3586. return rval;
  3587. fail_fw_integrity:
  3588. return QLA_FUNCTION_FAILED;
  3589. }
  3590. int
  3591. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3592. {
  3593. int rval;
  3594. if (ql2xfwloadbin == 1)
  3595. return qla81xx_load_risc(vha, srisc_addr);
  3596. /*
  3597. * FW Load priority:
  3598. * 1) Firmware via request-firmware interface (.bin file).
  3599. * 2) Firmware residing in flash.
  3600. */
  3601. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3602. if (rval == QLA_SUCCESS)
  3603. return rval;
  3604. return qla24xx_load_risc_flash(vha, srisc_addr,
  3605. vha->hw->flt_region_fw);
  3606. }
  3607. int
  3608. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3609. {
  3610. int rval;
  3611. struct qla_hw_data *ha = vha->hw;
  3612. if (ql2xfwloadbin == 2)
  3613. goto try_blob_fw;
  3614. /*
  3615. * FW Load priority:
  3616. * 1) Firmware residing in flash.
  3617. * 2) Firmware via request-firmware interface (.bin file).
  3618. * 3) Golden-Firmware residing in flash -- limited operation.
  3619. */
  3620. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3621. if (rval == QLA_SUCCESS)
  3622. return rval;
  3623. try_blob_fw:
  3624. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3625. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3626. return rval;
  3627. qla_printk(KERN_ERR, ha,
  3628. "FW: Attempting to fallback to golden firmware...\n");
  3629. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3630. if (rval != QLA_SUCCESS)
  3631. return rval;
  3632. qla_printk(KERN_ERR, ha,
  3633. "FW: Please update operational firmware...\n");
  3634. ha->flags.running_gold_fw = 1;
  3635. return rval;
  3636. }
  3637. void
  3638. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3639. {
  3640. int ret, retries;
  3641. struct qla_hw_data *ha = vha->hw;
  3642. if (!IS_FWI2_CAPABLE(ha))
  3643. return;
  3644. if (!ha->fw_major_version)
  3645. return;
  3646. ret = qla2x00_stop_firmware(vha);
  3647. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3648. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3649. ha->isp_ops->reset_chip(vha);
  3650. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3651. continue;
  3652. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3653. continue;
  3654. qla_printk(KERN_INFO, ha,
  3655. "Attempting retry of stop-firmware command...\n");
  3656. ret = qla2x00_stop_firmware(vha);
  3657. }
  3658. }
  3659. int
  3660. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3661. {
  3662. int rval = QLA_SUCCESS;
  3663. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3664. struct qla_hw_data *ha = vha->hw;
  3665. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3666. struct req_que *req;
  3667. struct rsp_que *rsp;
  3668. if (!vha->vp_idx)
  3669. return -EINVAL;
  3670. rval = qla2x00_fw_ready(base_vha);
  3671. if (ql2xmultique_tag)
  3672. req = ha->req_q_map[0];
  3673. else
  3674. req = vha->req;
  3675. rsp = req->rsp;
  3676. if (rval == QLA_SUCCESS) {
  3677. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3678. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3679. }
  3680. vha->flags.management_server_logged_in = 0;
  3681. /* Login to SNS first */
  3682. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3683. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3684. DEBUG15(qla_printk(KERN_INFO, ha,
  3685. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3686. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3687. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3688. return (QLA_FUNCTION_FAILED);
  3689. }
  3690. atomic_set(&vha->loop_down_timer, 0);
  3691. atomic_set(&vha->loop_state, LOOP_UP);
  3692. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3693. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3694. rval = qla2x00_loop_resync(base_vha);
  3695. return rval;
  3696. }
  3697. /* 84XX Support **************************************************************/
  3698. static LIST_HEAD(qla_cs84xx_list);
  3699. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3700. static struct qla_chip_state_84xx *
  3701. qla84xx_get_chip(struct scsi_qla_host *vha)
  3702. {
  3703. struct qla_chip_state_84xx *cs84xx;
  3704. struct qla_hw_data *ha = vha->hw;
  3705. mutex_lock(&qla_cs84xx_mutex);
  3706. /* Find any shared 84xx chip. */
  3707. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3708. if (cs84xx->bus == ha->pdev->bus) {
  3709. kref_get(&cs84xx->kref);
  3710. goto done;
  3711. }
  3712. }
  3713. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3714. if (!cs84xx)
  3715. goto done;
  3716. kref_init(&cs84xx->kref);
  3717. spin_lock_init(&cs84xx->access_lock);
  3718. mutex_init(&cs84xx->fw_update_mutex);
  3719. cs84xx->bus = ha->pdev->bus;
  3720. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3721. done:
  3722. mutex_unlock(&qla_cs84xx_mutex);
  3723. return cs84xx;
  3724. }
  3725. static void
  3726. __qla84xx_chip_release(struct kref *kref)
  3727. {
  3728. struct qla_chip_state_84xx *cs84xx =
  3729. container_of(kref, struct qla_chip_state_84xx, kref);
  3730. mutex_lock(&qla_cs84xx_mutex);
  3731. list_del(&cs84xx->list);
  3732. mutex_unlock(&qla_cs84xx_mutex);
  3733. kfree(cs84xx);
  3734. }
  3735. void
  3736. qla84xx_put_chip(struct scsi_qla_host *vha)
  3737. {
  3738. struct qla_hw_data *ha = vha->hw;
  3739. if (ha->cs84xx)
  3740. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3741. }
  3742. static int
  3743. qla84xx_init_chip(scsi_qla_host_t *vha)
  3744. {
  3745. int rval;
  3746. uint16_t status[2];
  3747. struct qla_hw_data *ha = vha->hw;
  3748. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3749. rval = qla84xx_verify_chip(vha, status);
  3750. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3751. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3752. QLA_SUCCESS;
  3753. }
  3754. /* 81XX Support **************************************************************/
  3755. int
  3756. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3757. {
  3758. int rval;
  3759. struct init_cb_81xx *icb;
  3760. struct nvram_81xx *nv;
  3761. uint32_t *dptr;
  3762. uint8_t *dptr1, *dptr2;
  3763. uint32_t chksum;
  3764. uint16_t cnt;
  3765. struct qla_hw_data *ha = vha->hw;
  3766. rval = QLA_SUCCESS;
  3767. icb = (struct init_cb_81xx *)ha->init_cb;
  3768. nv = ha->nvram;
  3769. /* Determine NVRAM starting address. */
  3770. ha->nvram_size = sizeof(struct nvram_81xx);
  3771. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3772. /* Get VPD data into cache */
  3773. ha->vpd = ha->nvram + VPD_OFFSET;
  3774. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3775. ha->vpd_size);
  3776. /* Get NVRAM data into cache and calculate checksum. */
  3777. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3778. ha->nvram_size);
  3779. dptr = (uint32_t *)nv;
  3780. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3781. chksum += le32_to_cpu(*dptr++);
  3782. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3783. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3784. /* Bad NVRAM data, set defaults parameters. */
  3785. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3786. || nv->id[3] != ' ' ||
  3787. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3788. /* Reset NVRAM data. */
  3789. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3790. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3791. le16_to_cpu(nv->nvram_version));
  3792. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3793. "invalid -- WWPN) defaults.\n");
  3794. /*
  3795. * Set default initialization control block.
  3796. */
  3797. memset(nv, 0, ha->nvram_size);
  3798. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3799. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3800. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3801. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3802. nv->exchange_count = __constant_cpu_to_le16(0);
  3803. nv->port_name[0] = 0x21;
  3804. nv->port_name[1] = 0x00 + ha->port_no;
  3805. nv->port_name[2] = 0x00;
  3806. nv->port_name[3] = 0xe0;
  3807. nv->port_name[4] = 0x8b;
  3808. nv->port_name[5] = 0x1c;
  3809. nv->port_name[6] = 0x55;
  3810. nv->port_name[7] = 0x86;
  3811. nv->node_name[0] = 0x20;
  3812. nv->node_name[1] = 0x00;
  3813. nv->node_name[2] = 0x00;
  3814. nv->node_name[3] = 0xe0;
  3815. nv->node_name[4] = 0x8b;
  3816. nv->node_name[5] = 0x1c;
  3817. nv->node_name[6] = 0x55;
  3818. nv->node_name[7] = 0x86;
  3819. nv->login_retry_count = __constant_cpu_to_le16(8);
  3820. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3821. nv->login_timeout = __constant_cpu_to_le16(0);
  3822. nv->firmware_options_1 =
  3823. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3824. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3825. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3826. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3827. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3828. nv->efi_parameters = __constant_cpu_to_le32(0);
  3829. nv->reset_delay = 5;
  3830. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3831. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3832. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3833. nv->enode_mac[0] = 0x00;
  3834. nv->enode_mac[1] = 0x02;
  3835. nv->enode_mac[2] = 0x03;
  3836. nv->enode_mac[3] = 0x04;
  3837. nv->enode_mac[4] = 0x05;
  3838. nv->enode_mac[5] = 0x06 + ha->port_no;
  3839. rval = 1;
  3840. }
  3841. /* Reset Initialization control block */
  3842. memset(icb, 0, sizeof(struct init_cb_81xx));
  3843. /* Copy 1st segment. */
  3844. dptr1 = (uint8_t *)icb;
  3845. dptr2 = (uint8_t *)&nv->version;
  3846. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3847. while (cnt--)
  3848. *dptr1++ = *dptr2++;
  3849. icb->login_retry_count = nv->login_retry_count;
  3850. /* Copy 2nd segment. */
  3851. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3852. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3853. cnt = (uint8_t *)&icb->reserved_5 -
  3854. (uint8_t *)&icb->interrupt_delay_timer;
  3855. while (cnt--)
  3856. *dptr1++ = *dptr2++;
  3857. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3858. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3859. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3860. icb->enode_mac[0] = 0x01;
  3861. icb->enode_mac[1] = 0x02;
  3862. icb->enode_mac[2] = 0x03;
  3863. icb->enode_mac[3] = 0x04;
  3864. icb->enode_mac[4] = 0x05;
  3865. icb->enode_mac[5] = 0x06 + ha->port_no;
  3866. }
  3867. /* Use extended-initialization control block. */
  3868. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3869. /*
  3870. * Setup driver NVRAM options.
  3871. */
  3872. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3873. "QLE81XX");
  3874. /* Use alternate WWN? */
  3875. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3876. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3877. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3878. }
  3879. /* Prepare nodename */
  3880. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3881. /*
  3882. * Firmware will apply the following mask if the nodename was
  3883. * not provided.
  3884. */
  3885. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3886. icb->node_name[0] &= 0xF0;
  3887. }
  3888. /* Set host adapter parameters. */
  3889. ha->flags.disable_risc_code_load = 0;
  3890. ha->flags.enable_lip_reset = 0;
  3891. ha->flags.enable_lip_full_login =
  3892. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3893. ha->flags.enable_target_reset =
  3894. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3895. ha->flags.enable_led_scheme = 0;
  3896. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3897. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3898. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3899. /* save HBA serial number */
  3900. ha->serial0 = icb->port_name[5];
  3901. ha->serial1 = icb->port_name[6];
  3902. ha->serial2 = icb->port_name[7];
  3903. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3904. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3905. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3906. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3907. /* Set minimum login_timeout to 4 seconds. */
  3908. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3909. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3910. if (le16_to_cpu(nv->login_timeout) < 4)
  3911. nv->login_timeout = __constant_cpu_to_le16(4);
  3912. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3913. icb->login_timeout = nv->login_timeout;
  3914. /* Set minimum RATOV to 100 tenths of a second. */
  3915. ha->r_a_tov = 100;
  3916. ha->loop_reset_delay = nv->reset_delay;
  3917. /* Link Down Timeout = 0:
  3918. *
  3919. * When Port Down timer expires we will start returning
  3920. * I/O's to OS with "DID_NO_CONNECT".
  3921. *
  3922. * Link Down Timeout != 0:
  3923. *
  3924. * The driver waits for the link to come up after link down
  3925. * before returning I/Os to OS with "DID_NO_CONNECT".
  3926. */
  3927. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3928. ha->loop_down_abort_time =
  3929. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3930. } else {
  3931. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3932. ha->loop_down_abort_time =
  3933. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3934. }
  3935. /* Need enough time to try and get the port back. */
  3936. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3937. if (qlport_down_retry)
  3938. ha->port_down_retry_count = qlport_down_retry;
  3939. /* Set login_retry_count */
  3940. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3941. if (ha->port_down_retry_count ==
  3942. le16_to_cpu(nv->port_down_retry_count) &&
  3943. ha->port_down_retry_count > 3)
  3944. ha->login_retry_count = ha->port_down_retry_count;
  3945. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3946. ha->login_retry_count = ha->port_down_retry_count;
  3947. if (ql2xloginretrycount)
  3948. ha->login_retry_count = ql2xloginretrycount;
  3949. /* Enable ZIO. */
  3950. if (!vha->flags.init_done) {
  3951. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3952. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3953. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3954. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3955. }
  3956. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3957. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3958. vha->flags.process_response_queue = 0;
  3959. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3960. ha->zio_mode = QLA_ZIO_MODE_6;
  3961. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3962. "(%d us).\n", vha->host_no, ha->zio_mode,
  3963. ha->zio_timer * 100));
  3964. qla_printk(KERN_INFO, ha,
  3965. "ZIO mode %d enabled; timer delay (%d us).\n",
  3966. ha->zio_mode, ha->zio_timer * 100);
  3967. icb->firmware_options_2 |= cpu_to_le32(
  3968. (uint32_t)ha->zio_mode);
  3969. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3970. vha->flags.process_response_queue = 1;
  3971. }
  3972. if (rval) {
  3973. DEBUG2_3(printk(KERN_WARNING
  3974. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3975. }
  3976. return (rval);
  3977. }
  3978. void
  3979. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3980. {
  3981. }