dm1105.c 21 KB

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  1. /*
  2. * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
  3. *
  4. * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/i2c.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/proc_fs.h>
  26. #include <linux/pci.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/input.h>
  29. #include <media/ir-common.h>
  30. #include "demux.h"
  31. #include "dmxdev.h"
  32. #include "dvb_demux.h"
  33. #include "dvb_frontend.h"
  34. #include "dvb_net.h"
  35. #include "dvbdev.h"
  36. #include "dvb-pll.h"
  37. #include "stv0299.h"
  38. #include "stv0288.h"
  39. #include "stb6000.h"
  40. #include "si21xx.h"
  41. #include "cx24116.h"
  42. #include "z0194a.h"
  43. /* ----------------------------------------------- */
  44. /*
  45. * PCI ID's
  46. */
  47. #ifndef PCI_VENDOR_ID_TRIGEM
  48. #define PCI_VENDOR_ID_TRIGEM 0x109f
  49. #endif
  50. #ifndef PCI_DEVICE_ID_DM1105
  51. #define PCI_DEVICE_ID_DM1105 0x036f
  52. #endif
  53. #ifndef PCI_DEVICE_ID_DW2002
  54. #define PCI_DEVICE_ID_DW2002 0x2002
  55. #endif
  56. #ifndef PCI_DEVICE_ID_DW2004
  57. #define PCI_DEVICE_ID_DW2004 0x2004
  58. #endif
  59. /* ----------------------------------------------- */
  60. /* sdmc dm1105 registers */
  61. /* TS Control */
  62. #define DM1105_TSCTR 0x00
  63. #define DM1105_DTALENTH 0x04
  64. /* GPIO Interface */
  65. #define DM1105_GPIOVAL 0x08
  66. #define DM1105_GPIOCTR 0x0c
  67. /* PID serial number */
  68. #define DM1105_PIDN 0x10
  69. /* Odd-even secret key select */
  70. #define DM1105_CWSEL 0x14
  71. /* Host Command Interface */
  72. #define DM1105_HOST_CTR 0x18
  73. #define DM1105_HOST_AD 0x1c
  74. /* PCI Interface */
  75. #define DM1105_CR 0x30
  76. #define DM1105_RST 0x34
  77. #define DM1105_STADR 0x38
  78. #define DM1105_RLEN 0x3c
  79. #define DM1105_WRP 0x40
  80. #define DM1105_INTCNT 0x44
  81. #define DM1105_INTMAK 0x48
  82. #define DM1105_INTSTS 0x4c
  83. /* CW Value */
  84. #define DM1105_ODD 0x50
  85. #define DM1105_EVEN 0x58
  86. /* PID Value */
  87. #define DM1105_PID 0x60
  88. /* IR Control */
  89. #define DM1105_IRCTR 0x64
  90. #define DM1105_IRMODE 0x68
  91. #define DM1105_SYSTEMCODE 0x6c
  92. #define DM1105_IRCODE 0x70
  93. /* Unknown Values */
  94. #define DM1105_ENCRYPT 0x74
  95. #define DM1105_VER 0x7c
  96. /* I2C Interface */
  97. #define DM1105_I2CCTR 0x80
  98. #define DM1105_I2CSTS 0x81
  99. #define DM1105_I2CDAT 0x82
  100. #define DM1105_I2C_RA 0x83
  101. /* ----------------------------------------------- */
  102. /* Interrupt Mask Bits */
  103. #define INTMAK_TSIRQM 0x01
  104. #define INTMAK_HIRQM 0x04
  105. #define INTMAK_IRM 0x08
  106. #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
  107. INTMAK_HIRQM | \
  108. INTMAK_IRM)
  109. #define INTMAK_NONEMASK 0x00
  110. /* Interrupt Status Bits */
  111. #define INTSTS_TSIRQ 0x01
  112. #define INTSTS_HIRQ 0x04
  113. #define INTSTS_IR 0x08
  114. /* IR Control Bits */
  115. #define DM1105_IR_EN 0x01
  116. #define DM1105_SYS_CHK 0x02
  117. #define DM1105_REP_FLG 0x08
  118. /* EEPROM addr */
  119. #define IIC_24C01_addr 0xa0
  120. /* Max board count */
  121. #define DM1105_MAX 0x04
  122. #define DRIVER_NAME "dm1105"
  123. #define DM1105_DMA_PACKETS 47
  124. #define DM1105_DMA_PACKET_LENGTH (128*4)
  125. #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
  126. /* GPIO's for LNB power control */
  127. #define DM1105_LNB_MASK 0x00000000
  128. #define DM1105_LNB_13V 0x00010100
  129. #define DM1105_LNB_18V 0x00000100
  130. static int ir_debug;
  131. module_param(ir_debug, int, 0644);
  132. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  133. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  134. /* infrared remote control */
  135. struct infrared {
  136. struct input_dev *input_dev;
  137. struct ir_input_state ir;
  138. char input_phys[32];
  139. struct work_struct work;
  140. u32 ir_command;
  141. };
  142. struct dm1105dvb {
  143. /* pci */
  144. struct pci_dev *pdev;
  145. u8 __iomem *io_mem;
  146. /* ir */
  147. struct infrared ir;
  148. /* dvb */
  149. struct dmx_frontend hw_frontend;
  150. struct dmx_frontend mem_frontend;
  151. struct dmxdev dmxdev;
  152. struct dvb_adapter dvb_adapter;
  153. struct dvb_demux demux;
  154. struct dvb_frontend *fe;
  155. struct dvb_net dvbnet;
  156. unsigned int full_ts_users;
  157. /* i2c */
  158. struct i2c_adapter i2c_adap;
  159. /* irq */
  160. struct work_struct work;
  161. /* dma */
  162. dma_addr_t dma_addr;
  163. unsigned char *ts_buf;
  164. u32 wrp;
  165. u32 nextwrp;
  166. u32 buffer_size;
  167. unsigned int PacketErrorCount;
  168. unsigned int dmarst;
  169. spinlock_t lock;
  170. };
  171. #define dm_io_mem(reg) ((unsigned long)(&dm1105dvb->io_mem[reg]))
  172. static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
  173. struct i2c_msg *msgs, int num)
  174. {
  175. struct dm1105dvb *dm1105dvb ;
  176. int addr, rc, i, j, k, len, byte, data;
  177. u8 status;
  178. dm1105dvb = i2c_adap->algo_data;
  179. for (i = 0; i < num; i++) {
  180. outb(0x00, dm_io_mem(DM1105_I2CCTR));
  181. if (msgs[i].flags & I2C_M_RD) {
  182. /* read bytes */
  183. addr = msgs[i].addr << 1;
  184. addr |= 1;
  185. outb(addr, dm_io_mem(DM1105_I2CDAT));
  186. for (byte = 0; byte < msgs[i].len; byte++)
  187. outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1));
  188. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  189. for (j = 0; j < 55; j++) {
  190. mdelay(10);
  191. status = inb(dm_io_mem(DM1105_I2CSTS));
  192. if ((status & 0xc0) == 0x40)
  193. break;
  194. }
  195. if (j >= 55)
  196. return -1;
  197. for (byte = 0; byte < msgs[i].len; byte++) {
  198. rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1));
  199. if (rc < 0)
  200. goto err;
  201. msgs[i].buf[byte] = rc;
  202. }
  203. } else {
  204. if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
  205. /* prepaired for cx24116 firmware */
  206. /* Write in small blocks */
  207. len = msgs[i].len - 1;
  208. k = 1;
  209. do {
  210. outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT));
  211. outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1));
  212. for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
  213. data = msgs[i].buf[k+byte];
  214. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2));
  215. }
  216. outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR));
  217. for (j = 0; j < 25; j++) {
  218. mdelay(10);
  219. status = inb(dm_io_mem(DM1105_I2CSTS));
  220. if ((status & 0xc0) == 0x40)
  221. break;
  222. }
  223. if (j >= 25)
  224. return -1;
  225. k += 48;
  226. len -= 48;
  227. } while (len > 0);
  228. } else {
  229. /* write bytes */
  230. outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT));
  231. for (byte = 0; byte < msgs[i].len; byte++) {
  232. data = msgs[i].buf[byte];
  233. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1));
  234. }
  235. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  236. for (j = 0; j < 25; j++) {
  237. mdelay(10);
  238. status = inb(dm_io_mem(DM1105_I2CSTS));
  239. if ((status & 0xc0) == 0x40)
  240. break;
  241. }
  242. if (j >= 25)
  243. return -1;
  244. }
  245. }
  246. }
  247. return num;
  248. err:
  249. return rc;
  250. }
  251. static u32 functionality(struct i2c_adapter *adap)
  252. {
  253. return I2C_FUNC_I2C;
  254. }
  255. static struct i2c_algorithm dm1105_algo = {
  256. .master_xfer = dm1105_i2c_xfer,
  257. .functionality = functionality,
  258. };
  259. static inline struct dm1105dvb *feed_to_dm1105dvb(struct dvb_demux_feed *feed)
  260. {
  261. return container_of(feed->demux, struct dm1105dvb, demux);
  262. }
  263. static inline struct dm1105dvb *frontend_to_dm1105dvb(struct dvb_frontend *fe)
  264. {
  265. return container_of(fe->dvb, struct dm1105dvb, dvb_adapter);
  266. }
  267. static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  268. {
  269. struct dm1105dvb *dm1105dvb = frontend_to_dm1105dvb(fe);
  270. if (voltage == SEC_VOLTAGE_18) {
  271. outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
  272. outl(DM1105_LNB_18V, dm_io_mem(DM1105_GPIOVAL));
  273. } else {
  274. /*LNB ON-13V by default!*/
  275. outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
  276. outl(DM1105_LNB_13V, dm_io_mem(DM1105_GPIOVAL));
  277. }
  278. return 0;
  279. }
  280. static void dm1105dvb_set_dma_addr(struct dm1105dvb *dm1105dvb)
  281. {
  282. outl(cpu_to_le32(dm1105dvb->dma_addr), dm_io_mem(DM1105_STADR));
  283. }
  284. static int __devinit dm1105dvb_dma_map(struct dm1105dvb *dm1105dvb)
  285. {
  286. dm1105dvb->ts_buf = pci_alloc_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, &dm1105dvb->dma_addr);
  287. return !dm1105dvb->ts_buf;
  288. }
  289. static void dm1105dvb_dma_unmap(struct dm1105dvb *dm1105dvb)
  290. {
  291. pci_free_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, dm1105dvb->ts_buf, dm1105dvb->dma_addr);
  292. }
  293. static void dm1105dvb_enable_irqs(struct dm1105dvb *dm1105dvb)
  294. {
  295. outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK));
  296. outb(1, dm_io_mem(DM1105_CR));
  297. }
  298. static void dm1105dvb_disable_irqs(struct dm1105dvb *dm1105dvb)
  299. {
  300. outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK));
  301. outb(0, dm_io_mem(DM1105_CR));
  302. }
  303. static int dm1105dvb_start_feed(struct dvb_demux_feed *f)
  304. {
  305. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  306. if (dm1105dvb->full_ts_users++ == 0)
  307. dm1105dvb_enable_irqs(dm1105dvb);
  308. return 0;
  309. }
  310. static int dm1105dvb_stop_feed(struct dvb_demux_feed *f)
  311. {
  312. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  313. if (--dm1105dvb->full_ts_users == 0)
  314. dm1105dvb_disable_irqs(dm1105dvb);
  315. return 0;
  316. }
  317. /* ir work handler */
  318. static void dm1105_emit_key(struct work_struct *work)
  319. {
  320. struct infrared *ir = container_of(work, struct infrared, work);
  321. u32 ircom = ir->ir_command;
  322. u8 data;
  323. if (ir_debug)
  324. printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
  325. data = (ircom >> 8) & 0x7f;
  326. ir_input_keydown(ir->input_dev, &ir->ir, data, data);
  327. ir_input_nokey(ir->input_dev, &ir->ir);
  328. }
  329. /* work handler */
  330. static void dm1105_dmx_buffer(struct work_struct *work)
  331. {
  332. struct dm1105dvb *dm1105dvb =
  333. container_of(work, struct dm1105dvb, work);
  334. unsigned int nbpackets;
  335. u32 oldwrp = dm1105dvb->wrp;
  336. u32 nextwrp = dm1105dvb->nextwrp;
  337. if (!((dm1105dvb->ts_buf[oldwrp] == 0x47) &&
  338. (dm1105dvb->ts_buf[oldwrp + 188] == 0x47) &&
  339. (dm1105dvb->ts_buf[oldwrp + 188 * 2] == 0x47))) {
  340. dm1105dvb->PacketErrorCount++;
  341. /* bad packet found */
  342. if ((dm1105dvb->PacketErrorCount >= 2) &&
  343. (dm1105dvb->dmarst == 0)) {
  344. outb(1, dm_io_mem(DM1105_RST));
  345. dm1105dvb->wrp = 0;
  346. dm1105dvb->PacketErrorCount = 0;
  347. dm1105dvb->dmarst = 0;
  348. return;
  349. }
  350. }
  351. if (nextwrp < oldwrp) {
  352. memcpy(dm1105dvb->ts_buf + dm1105dvb->buffer_size,
  353. dm1105dvb->ts_buf, nextwrp);
  354. nbpackets = ((dm1105dvb->buffer_size - oldwrp) + nextwrp) / 188;
  355. } else
  356. nbpackets = (nextwrp - oldwrp) / 188;
  357. dm1105dvb->wrp = nextwrp;
  358. dvb_dmx_swfilter_packets(&dm1105dvb->demux,
  359. &dm1105dvb->ts_buf[oldwrp], nbpackets);
  360. }
  361. static irqreturn_t dm1105dvb_irq(int irq, void *dev_id)
  362. {
  363. struct dm1105dvb *dm1105dvb = dev_id;
  364. /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
  365. unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS));
  366. outb(intsts, dm_io_mem(DM1105_INTSTS));
  367. switch (intsts) {
  368. case INTSTS_TSIRQ:
  369. case (INTSTS_TSIRQ | INTSTS_IR):
  370. dm1105dvb->nextwrp = inl(dm_io_mem(DM1105_WRP)) -
  371. inl(dm_io_mem(DM1105_STADR));
  372. schedule_work(&dm1105dvb->work);
  373. break;
  374. case INTSTS_IR:
  375. dm1105dvb->ir.ir_command = inl(dm_io_mem(DM1105_IRCODE));
  376. schedule_work(&dm1105dvb->ir.work);
  377. break;
  378. }
  379. return IRQ_HANDLED;
  380. }
  381. int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
  382. {
  383. struct input_dev *input_dev;
  384. IR_KEYTAB_TYPE *ir_codes = ir_codes_dm1105_nec;
  385. int ir_type = IR_TYPE_OTHER;
  386. int err = -ENOMEM;
  387. input_dev = input_allocate_device();
  388. if (!input_dev)
  389. return -ENOMEM;
  390. dm1105->ir.input_dev = input_dev;
  391. snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
  392. "pci-%s/ir0", pci_name(dm1105->pdev));
  393. ir_input_init(input_dev, &dm1105->ir.ir, ir_type, ir_codes);
  394. input_dev->name = "DVB on-card IR receiver";
  395. input_dev->phys = dm1105->ir.input_phys;
  396. input_dev->id.bustype = BUS_PCI;
  397. input_dev->id.version = 1;
  398. if (dm1105->pdev->subsystem_vendor) {
  399. input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
  400. input_dev->id.product = dm1105->pdev->subsystem_device;
  401. } else {
  402. input_dev->id.vendor = dm1105->pdev->vendor;
  403. input_dev->id.product = dm1105->pdev->device;
  404. }
  405. input_dev->dev.parent = &dm1105->pdev->dev;
  406. INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
  407. err = input_register_device(input_dev);
  408. if (err) {
  409. input_free_device(input_dev);
  410. return err;
  411. }
  412. return 0;
  413. }
  414. void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105)
  415. {
  416. input_unregister_device(dm1105->ir.input_dev);
  417. }
  418. static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb)
  419. {
  420. dm1105dvb_disable_irqs(dm1105dvb);
  421. outb(0, dm_io_mem(DM1105_HOST_CTR));
  422. /*DATALEN 188,*/
  423. outb(188, dm_io_mem(DM1105_DTALENTH));
  424. /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
  425. outw(0xc10a, dm_io_mem(DM1105_TSCTR));
  426. /* map DMA and set address */
  427. dm1105dvb_dma_map(dm1105dvb);
  428. dm1105dvb_set_dma_addr(dm1105dvb);
  429. /* big buffer */
  430. outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN));
  431. outb(47, dm_io_mem(DM1105_INTCNT));
  432. /* IR NEC mode enable */
  433. outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR));
  434. outb(0, dm_io_mem(DM1105_IRMODE));
  435. outw(0, dm_io_mem(DM1105_SYSTEMCODE));
  436. return 0;
  437. }
  438. static void dm1105dvb_hw_exit(struct dm1105dvb *dm1105dvb)
  439. {
  440. dm1105dvb_disable_irqs(dm1105dvb);
  441. /* IR disable */
  442. outb(0, dm_io_mem(DM1105_IRCTR));
  443. outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK));
  444. dm1105dvb_dma_unmap(dm1105dvb);
  445. }
  446. static struct stv0299_config sharp_z0194a_config = {
  447. .demod_address = 0x68,
  448. .inittab = sharp_z0194a_inittab,
  449. .mclk = 88000000UL,
  450. .invert = 1,
  451. .skip_reinit = 0,
  452. .lock_output = STV0299_LOCKOUTPUT_1,
  453. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  454. .min_delay_ms = 100,
  455. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  456. };
  457. static struct stv0288_config earda_config = {
  458. .demod_address = 0x68,
  459. .min_delay_ms = 100,
  460. };
  461. static struct si21xx_config serit_config = {
  462. .demod_address = 0x68,
  463. .min_delay_ms = 100,
  464. };
  465. static struct cx24116_config serit_sp2633_config = {
  466. .demod_address = 0x55,
  467. };
  468. static int __devinit frontend_init(struct dm1105dvb *dm1105dvb)
  469. {
  470. int ret;
  471. switch (dm1105dvb->pdev->subsystem_device) {
  472. case PCI_DEVICE_ID_DW2002:
  473. dm1105dvb->fe = dvb_attach(
  474. stv0299_attach, &sharp_z0194a_config,
  475. &dm1105dvb->i2c_adap);
  476. if (dm1105dvb->fe) {
  477. dm1105dvb->fe->ops.set_voltage =
  478. dm1105dvb_set_voltage;
  479. dvb_attach(dvb_pll_attach, dm1105dvb->fe, 0x60,
  480. &dm1105dvb->i2c_adap, DVB_PLL_OPERA1);
  481. }
  482. if (!dm1105dvb->fe) {
  483. dm1105dvb->fe = dvb_attach(
  484. stv0288_attach, &earda_config,
  485. &dm1105dvb->i2c_adap);
  486. if (dm1105dvb->fe) {
  487. dm1105dvb->fe->ops.set_voltage =
  488. dm1105dvb_set_voltage;
  489. dvb_attach(stb6000_attach, dm1105dvb->fe, 0x61,
  490. &dm1105dvb->i2c_adap);
  491. }
  492. }
  493. if (!dm1105dvb->fe) {
  494. dm1105dvb->fe = dvb_attach(
  495. si21xx_attach, &serit_config,
  496. &dm1105dvb->i2c_adap);
  497. if (dm1105dvb->fe)
  498. dm1105dvb->fe->ops.set_voltage =
  499. dm1105dvb_set_voltage;
  500. }
  501. break;
  502. case PCI_DEVICE_ID_DW2004:
  503. dm1105dvb->fe = dvb_attach(
  504. cx24116_attach, &serit_sp2633_config,
  505. &dm1105dvb->i2c_adap);
  506. if (dm1105dvb->fe)
  507. dm1105dvb->fe->ops.set_voltage = dm1105dvb_set_voltage;
  508. break;
  509. }
  510. if (!dm1105dvb->fe) {
  511. dev_err(&dm1105dvb->pdev->dev, "could not attach frontend\n");
  512. return -ENODEV;
  513. }
  514. ret = dvb_register_frontend(&dm1105dvb->dvb_adapter, dm1105dvb->fe);
  515. if (ret < 0) {
  516. if (dm1105dvb->fe->ops.release)
  517. dm1105dvb->fe->ops.release(dm1105dvb->fe);
  518. dm1105dvb->fe = NULL;
  519. return ret;
  520. }
  521. return 0;
  522. }
  523. static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac)
  524. {
  525. static u8 command[1] = { 0x28 };
  526. struct i2c_msg msg[] = {
  527. { .addr = IIC_24C01_addr >> 1, .flags = 0,
  528. .buf = command, .len = 1 },
  529. { .addr = IIC_24C01_addr >> 1, .flags = I2C_M_RD,
  530. .buf = mac, .len = 6 },
  531. };
  532. dm1105_i2c_xfer(&dm1105dvb->i2c_adap, msg , 2);
  533. dev_info(&dm1105dvb->pdev->dev, "MAC %pM\n", mac);
  534. }
  535. static int __devinit dm1105_probe(struct pci_dev *pdev,
  536. const struct pci_device_id *ent)
  537. {
  538. struct dm1105dvb *dm1105dvb;
  539. struct dvb_adapter *dvb_adapter;
  540. struct dvb_demux *dvbdemux;
  541. struct dmx_demux *dmx;
  542. int ret = -ENOMEM;
  543. dm1105dvb = kzalloc(sizeof(struct dm1105dvb), GFP_KERNEL);
  544. if (!dm1105dvb)
  545. return -ENOMEM;
  546. dm1105dvb->pdev = pdev;
  547. dm1105dvb->buffer_size = 5 * DM1105_DMA_BYTES;
  548. dm1105dvb->PacketErrorCount = 0;
  549. dm1105dvb->dmarst = 0;
  550. ret = pci_enable_device(pdev);
  551. if (ret < 0)
  552. goto err_kfree;
  553. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  554. if (ret < 0)
  555. goto err_pci_disable_device;
  556. pci_set_master(pdev);
  557. ret = pci_request_regions(pdev, DRIVER_NAME);
  558. if (ret < 0)
  559. goto err_pci_disable_device;
  560. dm1105dvb->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
  561. if (!dm1105dvb->io_mem) {
  562. ret = -EIO;
  563. goto err_pci_release_regions;
  564. }
  565. spin_lock_init(&dm1105dvb->lock);
  566. pci_set_drvdata(pdev, dm1105dvb);
  567. ret = dm1105dvb_hw_init(dm1105dvb);
  568. if (ret < 0)
  569. goto err_pci_iounmap;
  570. /* i2c */
  571. i2c_set_adapdata(&dm1105dvb->i2c_adap, dm1105dvb);
  572. strcpy(dm1105dvb->i2c_adap.name, DRIVER_NAME);
  573. dm1105dvb->i2c_adap.owner = THIS_MODULE;
  574. dm1105dvb->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  575. dm1105dvb->i2c_adap.dev.parent = &pdev->dev;
  576. dm1105dvb->i2c_adap.algo = &dm1105_algo;
  577. dm1105dvb->i2c_adap.algo_data = dm1105dvb;
  578. ret = i2c_add_adapter(&dm1105dvb->i2c_adap);
  579. if (ret < 0)
  580. goto err_dm1105dvb_hw_exit;
  581. /* dvb */
  582. ret = dvb_register_adapter(&dm1105dvb->dvb_adapter, DRIVER_NAME,
  583. THIS_MODULE, &pdev->dev, adapter_nr);
  584. if (ret < 0)
  585. goto err_i2c_del_adapter;
  586. dvb_adapter = &dm1105dvb->dvb_adapter;
  587. dm1105dvb_read_mac(dm1105dvb, dvb_adapter->proposed_mac);
  588. dvbdemux = &dm1105dvb->demux;
  589. dvbdemux->filternum = 256;
  590. dvbdemux->feednum = 256;
  591. dvbdemux->start_feed = dm1105dvb_start_feed;
  592. dvbdemux->stop_feed = dm1105dvb_stop_feed;
  593. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  594. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  595. ret = dvb_dmx_init(dvbdemux);
  596. if (ret < 0)
  597. goto err_dvb_unregister_adapter;
  598. dmx = &dvbdemux->dmx;
  599. dm1105dvb->dmxdev.filternum = 256;
  600. dm1105dvb->dmxdev.demux = dmx;
  601. dm1105dvb->dmxdev.capabilities = 0;
  602. ret = dvb_dmxdev_init(&dm1105dvb->dmxdev, dvb_adapter);
  603. if (ret < 0)
  604. goto err_dvb_dmx_release;
  605. dm1105dvb->hw_frontend.source = DMX_FRONTEND_0;
  606. ret = dmx->add_frontend(dmx, &dm1105dvb->hw_frontend);
  607. if (ret < 0)
  608. goto err_dvb_dmxdev_release;
  609. dm1105dvb->mem_frontend.source = DMX_MEMORY_FE;
  610. ret = dmx->add_frontend(dmx, &dm1105dvb->mem_frontend);
  611. if (ret < 0)
  612. goto err_remove_hw_frontend;
  613. ret = dmx->connect_frontend(dmx, &dm1105dvb->hw_frontend);
  614. if (ret < 0)
  615. goto err_remove_mem_frontend;
  616. ret = frontend_init(dm1105dvb);
  617. if (ret < 0)
  618. goto err_disconnect_frontend;
  619. dvb_net_init(dvb_adapter, &dm1105dvb->dvbnet, dmx);
  620. dm1105_ir_init(dm1105dvb);
  621. INIT_WORK(&dm1105dvb->work, dm1105_dmx_buffer);
  622. ret = request_irq(pdev->irq, dm1105dvb_irq, IRQF_SHARED,
  623. DRIVER_NAME, dm1105dvb);
  624. if (ret < 0)
  625. goto err_free_irq;
  626. return 0;
  627. err_disconnect_frontend:
  628. dmx->disconnect_frontend(dmx);
  629. err_remove_mem_frontend:
  630. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  631. err_remove_hw_frontend:
  632. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  633. err_dvb_dmxdev_release:
  634. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  635. err_dvb_dmx_release:
  636. dvb_dmx_release(dvbdemux);
  637. err_dvb_unregister_adapter:
  638. dvb_unregister_adapter(dvb_adapter);
  639. err_i2c_del_adapter:
  640. i2c_del_adapter(&dm1105dvb->i2c_adap);
  641. err_dm1105dvb_hw_exit:
  642. dm1105dvb_hw_exit(dm1105dvb);
  643. err_free_irq:
  644. free_irq(pdev->irq, dm1105dvb);
  645. err_pci_iounmap:
  646. pci_iounmap(pdev, dm1105dvb->io_mem);
  647. err_pci_release_regions:
  648. pci_release_regions(pdev);
  649. err_pci_disable_device:
  650. pci_disable_device(pdev);
  651. err_kfree:
  652. pci_set_drvdata(pdev, NULL);
  653. kfree(dm1105dvb);
  654. return ret;
  655. }
  656. static void __devexit dm1105_remove(struct pci_dev *pdev)
  657. {
  658. struct dm1105dvb *dm1105dvb = pci_get_drvdata(pdev);
  659. struct dvb_adapter *dvb_adapter = &dm1105dvb->dvb_adapter;
  660. struct dvb_demux *dvbdemux = &dm1105dvb->demux;
  661. struct dmx_demux *dmx = &dvbdemux->dmx;
  662. dm1105_ir_exit(dm1105dvb);
  663. dmx->close(dmx);
  664. dvb_net_release(&dm1105dvb->dvbnet);
  665. if (dm1105dvb->fe)
  666. dvb_unregister_frontend(dm1105dvb->fe);
  667. dmx->disconnect_frontend(dmx);
  668. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  669. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  670. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  671. dvb_dmx_release(dvbdemux);
  672. dvb_unregister_adapter(dvb_adapter);
  673. if (&dm1105dvb->i2c_adap)
  674. i2c_del_adapter(&dm1105dvb->i2c_adap);
  675. dm1105dvb_hw_exit(dm1105dvb);
  676. synchronize_irq(pdev->irq);
  677. free_irq(pdev->irq, dm1105dvb);
  678. pci_iounmap(pdev, dm1105dvb->io_mem);
  679. pci_release_regions(pdev);
  680. pci_disable_device(pdev);
  681. pci_set_drvdata(pdev, NULL);
  682. kfree(dm1105dvb);
  683. }
  684. static struct pci_device_id dm1105_id_table[] __devinitdata = {
  685. {
  686. .vendor = PCI_VENDOR_ID_TRIGEM,
  687. .device = PCI_DEVICE_ID_DM1105,
  688. .subvendor = PCI_ANY_ID,
  689. .subdevice = PCI_DEVICE_ID_DW2002,
  690. }, {
  691. .vendor = PCI_VENDOR_ID_TRIGEM,
  692. .device = PCI_DEVICE_ID_DM1105,
  693. .subvendor = PCI_ANY_ID,
  694. .subdevice = PCI_DEVICE_ID_DW2004,
  695. }, {
  696. /* empty */
  697. },
  698. };
  699. MODULE_DEVICE_TABLE(pci, dm1105_id_table);
  700. static struct pci_driver dm1105_driver = {
  701. .name = DRIVER_NAME,
  702. .id_table = dm1105_id_table,
  703. .probe = dm1105_probe,
  704. .remove = __devexit_p(dm1105_remove),
  705. };
  706. static int __init dm1105_init(void)
  707. {
  708. return pci_register_driver(&dm1105_driver);
  709. }
  710. static void __exit dm1105_exit(void)
  711. {
  712. pci_unregister_driver(&dm1105_driver);
  713. }
  714. module_init(dm1105_init);
  715. module_exit(dm1105_exit);
  716. MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
  717. MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
  718. MODULE_LICENSE("GPL");